22 Feb, 2019

2 commits

  • Depending on the capabilities of the PCI controller/platform, the
    PCI-to-PCI bridge emulation behavior might need to be different. For
    example, on platforms that use the pci-mvebu code, we currently don't
    support prefetchable memory BARs, so the corresponding fields in the
    PCI-to-PCI bridge configuration space should be read-only.

    To implement this, extend pci_bridge_emul_init() to take a "flags"
    argument, with currently one flag supported:

    PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR

    that will make the prefetchable memory base and limit registers
    read-only.

    The pci-mvebu and pci-aardvark drivers are updated accordingly.

    Fixes: 1f08673eef123 ("PCI: mvebu: Convert to PCI emulated bridge config space")
    Reported-by: Luís Mendes
    Reported-by: Leigh Brown
    Tested-by: Leigh Brown
    Tested-by: Luis Mendes
    Signed-off-by: Thomas Petazzoni
    Signed-off-by: Lorenzo Pieralisi
    Cc: stable@vger.kernel.org
    Cc: Luís Mendes
    Cc: Leigh Brown

    Thomas Petazzoni
     
  • The behavior of the different registers of the PCI-to-PCI bridge is
    currently encoded in two global arrays, shared by all instances of
    PCI-to-PCI bridge emulation.

    However, we will need to tweak the behavior on a per-bridge basis, to
    accommodate for different capabilities of the platforms where this
    code is used. In preparation for this, create a per-bridge copy of the
    register behavior arrays, so that they can later be tweaked on a
    per-bridge basis.

    Fixes: 1f08673eef123 ("PCI: mvebu: Convert to PCI emulated bridge config space")
    Reported-by: Luís Mendes
    Reported-by: Leigh Brown
    Tested-by: Leigh Brown
    Tested-by: Luis Mendes
    Signed-off-by: Thomas Petazzoni
    Signed-off-by: Lorenzo Pieralisi
    Cc: stable@vger.kernel.org
    Cc: Luís Mendes
    Cc: Leigh Brown

    Thomas Petazzoni
     

19 Oct, 2018

1 commit

  • Some PCI host controllers do not expose a configuration space for the
    root port PCI bridge. Due to this, the Marvell Armada 370/38x/XP PCI
    controller driver (pci-mvebu) emulates a root port PCI bridge
    configuration space, and uses that to (among other things) dynamically
    create the memory windows that correspond to the PCI MEM and I/O
    regions.

    Since we now need to add a very similar logic for the Marvell Armada
    37xx PCI controller driver (pci-aardvark), instead of duplicating the
    code, we create in this commit a common logic called pci-bridge-emul.

    The idea of this logic is to emulate a root port PCI bridge
    configuration space by providing configuration space read/write
    operations, and faking behind the scenes the configuration space of a
    PCI bridge. A PCI host controller driver simply has to call
    pci_bridge_emul_conf_read() and pci_bridge_emul_conf_write() to
    read/write the configuration space of the bridge.

    By default, the PCI bridge configuration space is simply emulated by a
    chunk of memory, but the PCI host controller can override the behavior
    of the read and write operations on a per-register basis to do
    additional actions if needed. We take care of complying with the
    behavior of the PCI configuration space registers in terms of bits
    that are read-write, read-only, reserved and write-1-to-clear.

    Signed-off-by: Thomas Petazzoni
    Signed-off-by: Lorenzo Pieralisi
    Acked-by: Bjorn Helgaas
    Reviewed-by: Russell King

    Thomas Petazzoni