Eric Lee / smarc-fsl-linux-kernel

31 Jul, 2017

1 commit

  • a6f0102bb   ARM: dts: keystone-k2l: Add DSP nodes ... Browse Code »

    The Keystone 2 66AK2L SoCs have 4 TMS320C66x DSP Core Subsystems
    (C66x CorePacs), each with a 1.0 GHz or 1.2 GHz C66x Fixed /
    Floating-Point DSP Core, and 32 KB of L1P & L1D SRAMs and a 1 MB
    L2 SRAM. Add the DT nodes for these DSP processor sub-systems.
    The processors do not have an MMU, and use various IPC Generation
    registers and shared memory for inter-processor communication.
    The aliases with a stem 'rproc' have also been added for all the
    DSPs, they provide a fixed remoteproc id to each DSP processor.

    Signed-off-by: Suman Anna
    Signed-off-by: Sam Nelson
    Signed-off-by: Andrew F. Davis
    Signed-off-by: Santosh Shilimkar

    Suman Anna
     

26 May, 2017

1 commit

  • 791229f1d   ARM: dts: keystone-k2l: fix broken Ethernet due to disabled OSR ... Browse Code »

    Ethernet networking on K2L has been broken since v4.11-rc1. This was
    caused by commit 32a34441a9bd ("ARM: keystone: dts: fix netcp clocks
    and add names"). This commit inadvertently moves on-chip static RAM
    clock to the end of list of clocks provided for netcp. Since keystone
    PM domain support does not have a list of recognized con_ids, only the
    first clock in the list comes under runtime PM management. This means
    the OSR (On-chip Static RAM) clock remains disabled and that broke
    networking on K2L.

    The OSR is used by QMSS on K2L as an external linking RAM. However this
    is a standalone RAM that can be used for non-QMSS usage (as well as from
    DSP side). So add a SRAM device node for the same and add the OSR clock
    to the node.

    Remove the now redundant OSR clock node from netcp.

    To manage all clocks defined for netCP's use by runtime PM needs keystone
    generic power domain (genpd) driver support which is under works.
    Meanwhile, this patch restores K2L networking and is correct irrespective
    of any future genpd work since OSR is an independent module and not part
    of NetCP anyway.

    Signed-off-by: Murali Karicheri
    Acked-by: Tero Kristo
    [nsekhar@ti.com: commit message updates, port to latest mainline]
    Signed-off-by: Sekhar Nori
    Cc: stable@vger.kernel.org # for 4.11
    Acked-by: Santosh Shilimkar
    Signed-off-by: Arnd Bergmann

    Murali Karicheri
     

20 Jan, 2017

1 commit

  • 2ae4dad35   ARM: dts: keystone-k2l: Add PSC reset controller node ... Browse Code »

    The Power Sleep Controller (PSC) module contains specific
    memory-mapped registers that can be used to perform reset
    management using specific bits for the DSPs available on the
    SoC. The PSC is defined using a syscon node, and the reset
    functionality is defined using a child syscon reset controller
    node.

    Add this syscon reset controller node as well as the reset
    control data for the resets it supports for the 66AK2L SoCs.

    Signed-off-by: Andrew F. Davis
    Signed-off-by: Suman Anna
    Signed-off-by: Santosh Shilimkar

    Suman Anna
     

08 Jan, 2017

2 commits

  • 82d76b6a2   ARM: dts: keystone-k2l: Reserve MSM RAM for boot monitor ... Browse Code »

    The Keystone 2 boot monitor uses 32 KB of the MSM RAM @ 0x0c1f8000
    on 66AK2L SoCs, so add a reserved child node for the same.

    This address is aligned to the values used within the latest boot
    monitor firmware [1] as of commit cf8b431e8b3b ("soc: Move load
    address to end of MSMC").

    [1] git://git.ti.com/processor-firmware/ks2-boot-monitor.git

    Signed-off-by: Suman Anna
    Signed-off-by: Santosh Shilimkar

    Suman Anna
     
  • d29db5a15   ARM: dts: keystone-k2l: Add MSM RAM node ... Browse Code »

    Add the RAM managed by the Multicore Shared Memory Controller (MSMC)
    as a mmio-sram node. The 66AK2L SoCs have 2 MB of such memory. Any
    specific MSM memory range needed by a software module ought to be
    reserved using an appropriate child node.

    Signed-off-by: Suman Anna
    Signed-off-by: Santosh Shilimkar

    Suman Anna
     

07 Jan, 2017

1 commit

  • 1dd558135   ARM: dts: keystone: Add "ti,da830-uart" compatible string ... Browse Code »

    The TI Keystone SoCs have extra UART registers beyond the standard 8250
    registers, so we need a new compatible string to indicate this. Also, at
    least one of these registers uses the full 32 bits, so we need to specify
    reg-io-width in addition to reg-shift.

    "ns16550a" is left in the compatible specification since it does work as
    long as the bootloader configures the SoC UART power management registers.

    Signed-off-by: David Lechner
    Signed-off-by: Santosh Shilimkar

    David Lechner
     

07 Nov, 2016

1 commit

  • be76fd319   ARM: dts: Add #pinctrl-cells for pinctrl-single instances ... Browse Code »

    Drivers using pinctrl-single,pins have #pinctrl-cells = , while
    pinctrl-single,bits need #pinctrl-cells = .

    Note that this patch can be optionally applied separately from the
    driver changes as the driver supports also the legacy binding without
    #pinctrl-cells.

    Acked-by: Rob Herring
    Reviewed-by: Linus Walleij
    Signed-off-by: Tony Lindgren

    Tony Lindgren
     

09 Jun, 2016

1 commit

13 Apr, 2016

1 commit

  • 5edafc298   ARM: dts: k2*: Rename the k2* files to keystone-k2* files ... Browse Code »

    As reported in [1], rename the k2* dts files to keystone-* files
    this will force consistency throughout.

    Script for the same (and hand modified for Makefile and MAINTAINERS
    files):
    for i in arch/arm/boot/dts/k2*
    do
    b=`basename $i`;
    git mv $i arch/arm/boot/dts/keystone-$b;
    sed -i -e "s/$b/keystone-$b/g" arch/arm/boot/dts/*[si]
    done

    NOTE: bootloaders that depend on older dtb names will need to be
    updated as well.

    [1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2

    Reported-by: Olof Johansson
    Signed-off-by: Nishanth Menon
    Signed-off-by: Santosh Shilimkar

    Nishanth Menon