02 Aug, 2016
1 commit
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Pull ARM DT updates from Olof Johansson:
"Device tree contents continue to be the largest branches we submit.
This time around, some of the contents worth pointing out is:New SoC platforms:
- Freescale i.MX 7Solo
- Broadcom BCM23550
- Cirrus Logic EP7209 and EP7211 (clps711x platforms)_
- Hisilicon HI3519
- Renesas R8A7792Some of the other delta that is sticking out, line-count wise:
- Exynos moves of IP blocks under an SoC bus, which causes a large
delta due to indentation changes
- a new Tegra K1 board: Apalis
- a bunch of small updates to many Allwinner platforms; new hardware
support, some cleanup, etc"* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (426 commits)
ARM: dts: sun8i: Add dts file for inet86dz board
ARM: dts: sun8i: Add dts file for Polaroid MID2407PXE03 tablet
ARM: dts: sun8i: Use sun8i-reference-design-tablet for ga10h dts
ARM: dts: sun8i: Use sun8i-reference-design-tablet for polaroid mid2809pxe04
ARM: dts: sun8i: reference-design-tablet: Add drivevbus-supply
ARM: dts: Copy sun8i-q8-common.dtsi sun8i-reference-design-tablet.dtsi
ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for utoo p66 dts
ARM: dts: sun5i: Use sun5i-reference-design-tablet.dtsi for dit4350 dts
ARM: dts: sun5i: reference-design-tablet: Remove mention of q8
ARM: dts: sun5i: reference-design-tablet: Set lradc vref to avcc
ARM: dts: sun5i: Rename sun5i-q8-common.dtsi sun5i-reference-design-tablet.dtsi
ARM: dts: sun5i: Move q8 display bits to sun5i-a13-q8-tablet.dts
ARM: dts: sunxi: Rename sunxi-q8-common.dtsi sunxi-reference-design-tablet.dtsi
ARM: dts: at91: Don't build unnecessary dtbs
ARM: dts: at91: sama5d3x: separate motherboard gmac and emac definitions
ARM: dts: at91: at91sam9g25ek: fix isi endpoint node
ARM: dts: at91: move isi definition to at91sam9g25ek
ARM: dts: at91: fix i2c-gpio node name
ARM: dts: at91: vinco: fix regulator name
ARM: dts: at91: ariag25 : fix onewire node
...
28 Jul, 2016
1 commit
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Pull spi updates from Mark Brown:
"Quite a lot of cleanup and maintainence work going on this release in
various drivers, and also a fix for a nasty locking issue in the core:- A fix for locking issues when external drivers explicitly locked
the bus with spi_bus_lock() - we were using the same lock to both
control access to the physical bus in multi-threaded I/O operations
and exclude multiple callers.Confusion between these two caused us to have scenarios where we
were dropping locks. These are fixed by splitting into two
separate locks like should have been done originally, making
everything much clearer and correct.- Support for DMA in spi_flash_read().
- Support for instantiating spidev on ACPI systems, including some
test devices used in Windows validation.- Use of the core DMA mapping functionality in the McSPI driver.
- Start of support for ThunderX SPI controllers, involving a very big
set of changes to the Cavium driver.- Support for Braswell, Exynos 5433, Kaby Lake, Merrifield, RK3036,
RK3228, RK3368 controllers"* tag 'spi-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (64 commits)
spi: Split bus and I/O locking
spi: octeon: Split driver into Octeon specific and common parts
spi: octeon: Move include file from arch/mips to drivers/spi
spi: octeon: Put register offsets into a struct
spi: octeon: Store system clock freqency in struct octeon_spi
spi: octeon: Convert driver to use readq()/writeq() functions
spi: pic32-sqi: fixup wait_for_completion_timeout return handling
spi: pic32: fixup wait_for_completion_timeout return handling
spi: rockchip: limit transfers to (64K - 1) bytes
spi: xilinx: Return IRQ_NONE if no interrupts were detected
spi: xilinx: Handle errors from platform_get_irq()
spi: s3c64xx: restore removed comments
spi: s3c64xx: add Exynos5433 compatible for ioclk handling
spi: s3c64xx: use error code from clk_prepare_enable()
spi: s3c64xx: rename goto labels to meaningful names
spi: s3c64xx: document the clocks and the clock-name property
spi: s3c64xx: add exynos5433 spi compatible
spi: s3c64xx: fix reference leak to master in s3c64xx_spi_remove()
spi: spi-sh: Remove deprecated create_singlethread_workqueue
spi: spi-topcliff-pch: Remove deprecated create_singlethread_workqueue
...
25 Jul, 2016
17 commits
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* acpi-tables:
ACPI: Rename configfs.c to acpi_configfs.c to prevent link error
ACPI: add support for loading SSDTs via configfs
ACPI: add support for configfs
efi / ACPI: load SSTDs from EFI variables
spi / ACPI: add support for ACPI reconfigure notifications
i2c / ACPI: add support for ACPI reconfigure notifications
ACPI: add support for ACPI reconfiguration notifiers
ACPI / scan: fix enumeration (visited) flags for bus rescans
ACPI / documentation: add SSDT overlays documentation
ACPI: ARM64: support for ACPI_TABLE_UPGRADE
ACPI / tables: introduce ARCH_HAS_ACPI_TABLE_UPGRADE
ACPI / tables: move arch-specific symbol to asm/acpi.h
ACPI / tables: table upgrade: refactor function definitions
ACPI / tables: table upgrade: use cacheable map for tablesConflicts:
arch/arm64/include/asm/acpi.h -
The current SPI code attempts to use bus_lock_mutex for two purposes. One
is to implement spi_bus_lock() which grants exclusive access to the bus.
The other is to serialize access to the physical hardware. This duplicate
purpose causes confusion which leads to cases where access is not locked
when a caller holds the bus lock mutex. Fix this by splitting out the I/O
functionality into a new io_mutex.This means taking both mutexes in the DMA path, replacing the existing
mutex with the new I/O one in the message pump (the mutex now always
being taken in the message pump) and taking the bus lock mutex in
spi_sync(), allowing __spi_sync() to have no mutex handling.While we're at it hoist the mutex further up the message pump before we
power up the device so that all power up/down of the block is covered by
it and there are no races with in-line pumping of messages.Reported-by: Rich Felker
Tested-by: Rich Felker
Signed-off-by: Mark Brown -
…/ti-qspi', 'spi/topic/topcliff-pch' and 'spi/topic/txx9' into spi-next
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…pic/s3c64xx', 'spi/topic/sh' and 'spi/topic/sh-msiof' into spi-next
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…/topic/orion', 'spi/topic/pic32' and 'spi/topic/pic32-sqi' into spi-next
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…c/loopback', 'spi/topic/maintainers' and 'spi/topic/mpc52xx-psc' into spi-next
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…/topic/clps711x', 'spi/topic/doc' and 'spi/topic/dt' into spi-next
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Separate driver probing from SPI transfer functions.
Signed-off-by: Jan Glauber
Tested-by: Steven J. Hill
Signed-off-by: Mark Brown -
Move the register definitions to the drivers directory because they
are only used there.Signed-off-by: Jan Glauber
Tested-by: Steven J. Hill
Signed-off-by: Mark Brown -
Instead of hard-coding the register offsets put them into a struct
and set them in the probe function.Signed-off-by: Jan Glauber
Tested-by: Steven J. Hill
Signed-off-by: Mark Brown -
Storing the system clock frequency in struct octeon_spi avoids
calling the MIPS specific octeon_get_io_clock_rate() for every transfer.Signed-off-by: Jan Glauber
Tested-by: Steven J. Hill
Signed-off-by: Mark Brown -
Remove all calls to cvmx_read_csr()/cvmx_write_csr() and use
the portable readq()/writeq() functions.Signed-off-by: Steven J. Hill
Signed-off-by: Jan Glauber
Signed-off-by: Mark Brown -
wait_for_completion_timeout returns unsigned long not int so the check for
Signed-off-by: Mark Brown
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wait_for_completion_timeout returns unsigned long not int so the check for
Signed-off-by: Mark Brown
21 Jul, 2016
1 commit
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The Rockchip SPI controller's length register only supports 16-bits,
yielding a maximum length of 64KiB (the CTRLR1 register holds "length -
1"). Trying to transfer more than that (e.g., with a large SPI flash
read) will cause the driver to hang.Now, it seems that while theoretically we should be able to program
CTRLR1 with 0xffff, and get a 64KiB transfer, but that also seems to
cause the core to choke, so stick with a maximum of 64K - 1 bytes --
i.e., 0xffff.Signed-off-by: Brian Norris
Signed-off-by: Mark Brown
15 Jul, 2016
7 commits
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Return IRQ_NONE from the interrupt handler if the handler is running, but
no interrupt was detected. This allows the system to recover in case of an
interrupt storm due to an invalid interrupt configuration or faulty
hardware.Signed-off-by: Lars-Peter Clausen
Acked-by: Ricardo Ribalda Delgado
Signed-off-by: Mark Brown -
The Xilinx SPI driver can operate without an IRQ, but not every error
returned by platform_get_irq() means that no IRQ was specified. It will
also return an error if the IRQ specification is invalid or the IRQ
provider is not yet available (EPROBE_DEFER).So instead of ignoring all errors only ignore ENXIO, which means no IRQ was
specified, and propagate all other errors to device driver core.Signed-off-by: Lars-Peter Clausen
Acked-by: Ricardo Ribalda Delgado
Signed-off-by: Mark Brown -
Patch a9e93e8 has erroneously removed some comments which are
important to understand why the bus frequency is multiplied by
two during the spi transfer.Reword the previous comment to a more appropriate message.
Suggested-by: Sylwester Nawrocki
Signed-off-by: Andi Shyti
Reviewed-by: Michael Turquette
Signed-off-by: Mark Brown -
The new compatible is related to the Samsung Exynos5433 SoC. The
difference between the previous is that in the exynos5433 the SPI
controller is driven by three clocks instead of only one.The new clock (ioclk) is controlling the input/output clock
whenever the controller is slave or master.The presence of the clock line is detected from the compatibility
structure (exynos5433_spi_port_config) as a boolean value.The probe function checks whether the ioclk is present and if so,
it acquires.The runtime suspend and resume functions will handle the clock
enabling and disabling as well.Signed-off-by: Andi Shyti
Reviewed-by: Michael Turquette
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Mark Brown -
If clk_prepare_enable() fails do not return -EBUSY but use the
value provided by the function itself.Suggested-by: Krzysztof Kozlowski
Signed-off-by: Andi Shyti
Reviewed-by: Michael Turquette
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Mark Brown -
The goto labels of the style of
err4:
err3:
err2:
err1:are complex to insert in between new errors without renaming all
the goto statements. Replace the errX naming style to meaningful
names in order to make it easier to insert new goto exit points.Signed-off-by: Andi Shyti
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Michael Turquette
Signed-off-by: Mark Brown -
Once a spi_master_get() call succeeds, we need an additional
spi_master_put() call to free the memory, otherwise we will
leak a reference to master. Fix by removing the unnecessary
spi_master_get() call.Signed-off-by: Wei Yongjun
Reviewed-by: Andi Shyti
Signed-off-by: Mark Brown
12 Jul, 2016
3 commits
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Due to the newly upstreamed 'critical clocks' API we can now
safely handle clocking in the SPI and I2C drivers without fear
of catastrophically crippling the running platform.Signed-off-by: Lee Jones
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The workqueue has a single workitem(&ss->ws) and hence doesn't require
ordering. Also, it is not being used on a memory reclaim path. Hence, the
singlethreaded workqueue has been replaced with the use of system_wq.System workqueues have been able to handle high level of concurrency
for a long time now and hence it's not required to have a singlethreaded
workqueue just to gain concurrency. Unlike a dedicated per-cpu workqueue
created with create_singlethread_workqueue(), system_wq allows multiple
work items to overlap executions even on the same CPU; however, a
per-cpu workqueue doesn't have any CPU locality or global ordering
guarantee unless the target CPU is explicitly specified and thus the
increase of local concurrency shouldn't make any difference.Work item has been flushed in spi_sh_remove() to ensure that
there are no pending tasks while disconnecting the driver.Signed-off-by: Bhaktipriya Shridhar
Signed-off-by: Mark Brown -
The workqueue "wk" serves as a queue for carrying out execution
of requests. It has a single work item(&drv_data->work) and hence doesn't
require ordering. Also, it is not being used on a memory reclaim path.
Hence, the singlethreaded workqueue has been replaced with the use of
system_wq.System workqueues have been able to handle high level of concurrency
for a long time now and hence it's not required to have a singlethreaded
workqueue just to gain concurrency. Unlike a dedicated per-cpu workqueue
created with create_singlethread_workqueue(), system_wq allows multiple
work items to overlap executions even on the same CPU; however, a
per-cpu workqueue doesn't have any CPU locality or global ordering
guarantee unless the target CPU is explicitly specified and thus the
increase of local concurrency shouldn't make any difference.Work item has been flushed in pch_spi_free_resources() to ensure that
there are no pending tasks while disconnecting the driver.Also dropped the label 'err_return' since it's not being used anymore.
Signed-off-by: Bhaktipriya Shridhar
Signed-off-by: Mark Brown
09 Jul, 2016
1 commit
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This patch adds supports for SPI device enumeration and removal via
ACPI reconfiguration notifications that are send as a result of an
ACPI table load or unload operation.The code is very similar with the device tree reconfiguration code
with only small differences in the way we test and set the enumerated
state of the device:* the equivalent of device tree's OF_POPULATED flag is the
flags.visited field in the ACPI device and the following wrappers
are used to manipulate it: acpi_device_enumerated(),
acpi_device_set_enumerated() and acpi_device_clear_enumerated()* the device tree code checks of status of the OF_POPULATED flag to
avoid trying to create duplicate Linux devices in two places: once
when the controller is probed, and once when the reconfigure event
is received; in the ACPI code the check is performed only once when
the ACPI namespace is searched because this code path is invoked in
both of the two mentioned casesThe rest of the enumeration handling is similar with device tree: when
the Linux device is unregistered the ACPI device is marked as not
enumerated; also, when a device remove notification is received we
check that the device is in the enumerated state before continuing
with the removal of the Linux device.Signed-off-by: Octavian Purdila
Reviewed-by: Mika Westerberg
Acked-by: Mark Brown
Signed-off-by: Rafael J. Wysocki
08 Jul, 2016
2 commits
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Currently, the driver handles mapping buffers to be used by the DMA.
However, there are times that the current mapping implementation will
fail for certain buffers. Fortunately, the SPI framework can detect
and map buffers so its usable by the DMA.Update the driver to utilize the SPI framework for buffer
mapping instead. Also incorporate hooks that the framework uses to
determine if the DMA can or can not be used.This will result in the original omap2_mcspi_transfer_one function being
deleted and omap2_mcspi_work_one being renamed to
omap2_mcspi_transfer_one. Previously transfer_one was only responsible
for mapping and work_one handled the transfer. But now only transferring
needs to be handled by the driver.Signed-off-by: Franklin S Cooper Jr
Signed-off-by: Mark Brown -
The function sg_split will be used by spi-omap2-mcspi to handle a SoC
workaround in the SPI driver. Therefore, select SG_SPLIT so this function
is available to the driver.Signed-off-by: Franklin S Cooper Jr
Signed-off-by: Mark Brown
07 Jul, 2016
4 commits
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The commit 30f3a6ab44d8 ("spi: pxa2xx: Add support for both chip selects on
Intel Braswell") introduces a support of chipselects for Intel Braswell SPI
host controller. Though it missed to convert the PCI part of the driver.Do conversion here which enables both chipselects on Intel Braswell when
enumerated via PCI.We don't care about num_chipselect value since it is overrided inside core
driver.Signed-off-by: Andy Shevchenko
Acked-by: Mika Westerberg
Signed-off-by: Mark Brown -
It seems the commit e5262d0568dc ("spi: spi-pxa2xx: SPI support for Intel Quark
X1000") misses one place to be adapted for Intel Quark, i.e. in reset_sccr1().Clear all RFT bits when call reset_sccr1() on Intel Quark.
Fixes: e5262d0568dc ("spi: spi-pxa2xx: SPI support for Intel Quark X1000")
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
Cc: stable@vger.kernel.org -
This is a complex patch for refactoring CLPS711X SPI driver.
This change adds devicetree support and removes board support.Signed-off-by: Alexander Shiyan
Signed-off-by: Arnd Bergmann
Signed-off-by: Mark Brown -
When the clock is coming from the cmu it is not required to be
disabled and then re-enabled in order to change the rate.Besides, some exynos chipsets (e.g. exynos5433) do not deliver
any to the SFR if one from the pclk ("spi" in this case) or sclk
("busclk") is disabled.Remove the clock disabling/enabling to avoid falling into this
situation.Signed-off-by: Sylwester Nawrocki
Signed-off-by: Andi Shyti
Signed-off-by: Mark Brown
05 Jul, 2016
1 commit
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OMAP35x and OMAP37x mentions in the McSPI End-of-Transfer Sequences section
that if the McSPI is configured as a Master and only DMA RX is being
performed then the DMA transfer size needs to be reduced by 1 or 2.This was originally implemented by:
commit 57c5c28dbc83 ("spi: omap2_mcspi rxdma bugfix")This patch adds comments to clarify what is going on in the code since its
not obvious what problem its addressing.Signed-off-by: Franklin S Cooper Jr
Signed-off-by: Mark Brown
04 Jul, 2016
2 commits
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Some IoT and maker software stacks are using spidev to perform raw access
to the SPI bus instead of relying existing drivers provided by the kernel.
They then implement their own "drivers" in userspace on top of the spidev
raw interface. This is far from being an ideal solution but we do not want
to prevent using mainline Linux in these devices.Now, it turns out that Windows has similar SPI devices than spidev which
allow raw access on the SPI bus to userspace programs as described in the
link below:https://msdn.microsoft.com/windows/hardware/drivers/spb/spi-tests-in-mitt
These SPI test devices are also meant to be used during development and
testing.In order to allow usage of spidev for development and testing in Linux, add
those same ACPI IDs to the spidev driver (which is Linux counterpart of the
Windows SPI test devices), but complain loudly so that users know it is not
good idea to use it in production systems. Instead they should be using
proper drivers for peripherals connected to the SPI bus.Signed-off-by: Mika Westerberg
Signed-off-by: Mark Brown -
Simply sort header block alphabetically.
While here, sort devices by PCI ID and add a copyright line for Intel.
Signed-off-by: Andy Shevchenko
Signed-off-by: Mark Brown
