15 Oct, 2012
1 commit
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It was already pointed out how to fix these cases before the offending
patches were merged, but unsurprisingly, that didn't happen. As this
change is entirely superfluous to begin with, simply shut things up by
casting everything away.Signed-off-by: Paul Mundt
02 Oct, 2012
1 commit
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Pull ARM soc multiplatform enablement from Olof Johansson:
"This is a pretty significant branch. It's the introduction of the
first multiplatform support on ARM, and with this (and the later
branch) merged, it is now possible to build one kernel that contains
support for highbank, vexpress, mvebu, socfpga, and picoxcell. More
platforms will be convered over in the next few releases.Two critical last things had to be done for this to be practical and
possible:
* Today each platform has its own include directory under
mach-/include/mach/*, and traditionally that is where a lot
of driver/platform shared definitions have gone, such as platform
data structures. They now need to move out to a common location
instead, and this branch moves a large number of those out to
include/linux/platform_data.
* Each platform used to list the device trees to compile for its
boards in mach-/Makefile.boot.Both of the above changes will mean that there are some merge
conflicts to come (and some to resolve here). It's a one-time move
and once it settles in, we should be good for quite a while. Sorry
for the overhead."Fix conflicts as per Olof.
* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (51 commits)
ARM: add v7 multi-platform defconfig
ARM: msm: Move core.h contents into common.h
ARM: highbank: call highbank_pm_init from .init_machine
ARM: dtb: move all dtb targets to common Makefile
ARM: spear: move platform_data definitions
ARM: samsung: move platform_data definitions
ARM: orion: move platform_data definitions
ARM: vexpress: convert to multi-platform
ARM: initial multiplatform support
ARM: mvebu: move armada-370-xp.h in mach dir
ARM: vexpress: remove dependency on mach/* headers
ARM: picoxcell: remove dependency on mach/* headers
ARM: move all dtb targets out of Makefile.boot
ARM: picoxcell: move debug macros to include/debug
ARM: socfpga: move debug macros to include/debug
ARM: mvebu: move debug macros to include/debug
ARM: vexpress: move debug macros to include/debug
ARM: highbank: move debug macros to include/debug
ARM: move debug macros to common location
ARM: make mach/gpio.h headers optional
...
25 Sep, 2012
1 commit
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Some drivers need to switch pin states between GPIO and pin function at
runtime, which was inadvertently broken in the pinctrl driver for GPIOs
being bound to a specific direction.This fixes up the request path to ensure that previously configured GPIOs
don't cause us to inadvertently error out with an unsupported mux on
reconfig, which in practice is primarily aimed at trapping pull-up/down
users that have yet to be implemented under the new API.Fixes up regressions in the TPU PWM driver, amongst others.
Reported-by: Laurent Pinchart
Tested-by: Laurent Pinchart
Signed-off-by: Paul Mundt
18 Sep, 2012
1 commit
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The sh_pfc_gpio_request_enable() function acquires a spinlock but fails
to release it before returning if the requested mux type is not
supported. Fix this.Signed-off-by: Laurent Pinchart
Signed-off-by: Paul Mundt
14 Sep, 2012
1 commit
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Move custom shmobile gpio code to a sh-gpio.h to remove the dependency
on mach/gpio.h. shmobile always uses gpiolib, so we can remove
__GPIOLIB_COMPLEX define from mach/gpio.h.Signed-off-by: Rob Herring
Cc: Paul Mundt
Cc: Magnus Damm
20 Aug, 2012
1 commit
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In the multi-evt case we were accidentally associating the parent IRQ,
fix this up.Signed-off-by: Paul Mundt
09 Aug, 2012
1 commit
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Presently it's assumed that the irqdomain code handles the irq_desc
allocation for us, but this isn't necessarily the case when we've
pre-allocated IRQs via sparseirq. Previously we had a -EEXIST check in
the code that attempted to trap these cases and simply update them
in-place, but this behaviour was inadvertently lost in the transition to
irqdomains.This simply restores the previous behaviour, first attempting to let the
irqdomain core fetch the allocation for us, and falling back to an
in-place domain association in the extant IRQ case. Fixes up regressions
on platforms that pre-allocate legacy IRQs (specifically ARM-based
SH-Mobile platforms, as SH stopped pre-allocating vectors some time ago).Reported-by: Kuninori Morimoto
Signed-off-by: Paul Mundt
01 Aug, 2012
3 commits
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Trivial support for irq domains, using either a linear map or radix tree
depending on the vector layout.Signed-off-by: Paul Mundt
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Commit ca5481c68e9fbcea62bb3c78ae6cccf99ca8fb73 ("sh: pfc: Rudimentary
pinctrl-backed GPIO support.") introduced a regression for platforms that
were doing early GPIO API calls (from arch_initcall() or earlier),
leading to a situation where our two-stage registration logic would trip
itself up and we'd -ENODEV out of the pinctrl registration path,
resulting in endless -EPROBE_DEFER errors. Further lack of checking any
sort of errors from gpio_request() resulted in boot time warnings,
tripping on the FLAG_REQUESTED test-and-set in gpio_ensure_requested().As it turns out there's no particular need to bother with the two-stage
registration, as the platform bus is already available at the point that
we have to start caring. As such, it's easiest to simply fold these
together in to a single init path, the ordering of which is ensured
through the platform's mux registration, as usual.Reported-by: Rafael J. Wysocki
Reported-by: Kuninori Morimoto
Signed-off-by: Paul Mundt
25 Jul, 2012
1 commit
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pinctrl_remove_gpio_range() is now handled by the pinctrl core in the
unreg path for some reason, so use that instead.Signed-off-by: Paul Mundt
20 Jul, 2012
3 commits
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This implements simple support for adjusting the pin config value via the
pinctrl API. The pinconf-generic code is abandoned for now until we've
got a chance to revamp the pinmux_type state tracking that's needed by
legacy code.Signed-off-by: Paul Mundt
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While this code is still being shuffled around the KBUILD_MODNAME value
isn't particularly useful, switch to something a bit more useful.Signed-off-by: Paul Mundt
17 Jul, 2012
4 commits
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This follows the function support by simply doing 1 pin per group
encapsulation in order to keep with legacy behaviour. This will be
built on incrementally as SoCs define their own pin groups.Signed-off-by: Paul Mundt
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If we encounter invalid entries in the pinmux GPIO range, make sure we've
still got a dummy pin definition but don't otherwise map it.Signed-off-by: Paul Mundt
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symbol_request() requires the registration symbol to be exported, make
sure it is.Signed-off-by: Paul Mundt
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pinctrl support is required for correct operation, failure to locate
the init routine is fatal.Signed-off-by: Paul Mundt
11 Jul, 2012
2 commits
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Signed-off-by: Paul Mundt
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This maps out all of the function types to pinctrl function groups.
Presently this is restricted to one pin per function to maintain
compatability with legacy behaviour. This will be extended as groups
are introduced and exiting users migrated.Signed-off-by: Paul Mundt
10 Jul, 2012
2 commits
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This begins the migration of the PFC core to the pinctrl subsystem.
Initial support is very basic, with the bulk of the implementation simply
being nopped out in such a way to allow registration with the pinctrl
core to succeed.The gpio chip driver is stripped down considerably now relying purely on
pinctrl API calls to manage the bulk of its operations.This provides a basis for further PFC refactoring, including decoupling
pin functions from the GPIO API, establishing pin groups, and so forth.
These will all be dealt with incrementally so as to introduce as few
growing and migratory pains to tree-wide PFC pinmux users today.When the interfaces have been well established and in-tree users have
been migrated off of the legacy interfaces it will be possible to strip
down the core considerably, leading to eventual drivers/pinctrl rehoming.Signed-off-by: Paul Mundt
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This follows the intc/clk changes and shuffles the PFC support code under
its own directory. This will facilitate better code sharing, and allow us
to trim down the exported interface by quite a margin.Signed-off-by: Paul Mundt
21 Jun, 2012
1 commit
20 Jun, 2012
4 commits
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The encoding is tightly packed, and future changes (such as
pinconf-generic support) can easily lead to a situation where we violate
the encoding constraints and trample data bit/reg bits. This plugs in
some sanity checks by way of a BUILD_BUG_ON() to blow up if we fail to
fit.Signed-off-by: Paul Mundt
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This implements some Kconfig knobs for ensuring that the PFC gpio chip
can be disabled or built as a module in the cases where it's optional, or
forcibly enabled in cases where it's not.Signed-off-by: Paul Mundt
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This implements a bit of rework for the PFC code, making the core itself
slightly more pluggable and moving out the gpio chip handling completely.The API is preserved in such a way that platforms that depend on it for
early configuration are still able to do so, while making it possible to
migrate to alternate interfaces going forward.This is the first step of chainsawing necessary to support the pinctrl
API, with the eventual goal being able to decouple pin function state
from the gpio API while retaining gpio chip tie-in for gpio pin functions
only, relying on the pinctrl/pinmux API for non-gpio function demux.Signed-off-by: Paul Mundt
13 Jun, 2012
2 commits
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Conflicts:
drivers/sh/intc/dynamic.cSigned-off-by: Paul Mundt
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This switches to using irq_alloc_desc() directly for subgroup IRQs.
We still need to call activate_irq() on these in order to make them
requestable, at least up until these get moved in to their own irq
domain..Signed-off-by: Paul Mundt
25 May, 2012
7 commits
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This consolidates the div6/4 versions of the clk registration wrapper.
The existing wrappers with their own sh_clk_ops are maintained for API
compatability, though in the future it should be possible to be rid of
them entirely.Signed-off-by: Paul Mundt
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Everything with the exception of the _reparent ops are now shared, so
switch everything over to common types.Signed-off-by: Paul Mundt
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This introduces a new flag for clocks that need to have their divisor
ratio set back to their initial mask at disable time to prevent
interactivity problems with the clock stop bit (presently div6 only).
With this in place it's possible to handle the corner case on top of the
div4 op without any particular need for leaving things split out.Signed-off-by: Paul Mundt
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Follows the sh_clk_div_recalc() change.
Signed-off-by: Paul Mundt
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This generalizes the div4 recalc routine for use by div6 and others, then
makes it the default.Signed-off-by: Paul Mundt
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This plugs in a div_mask for the clock and sets it up for the existing
div6/4 cases. This will make it possible to support other div types, as
well as share more div6/4 infrastructure.Signed-off-by: Paul Mundt
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This plugs in a generic clk_div_table, based on the div4 version. div6 is
then adopted to use it for encapsulating its div table, which permits us
to start div6/4 unification, as well as preparation for other div types.Signed-off-by: Paul Mundt
24 May, 2012
1 commit
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Now that all of the users have been converted away, kill off the remnants
of the old API.Signed-off-by: Paul Mundt
22 May, 2012
1 commit
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At present reserving the IRLs in the IRQ bitmap in addition to the
dropping of the legacy IRQ pre-allocation prevent IRL IRQs from being
allocated for the x3proto board.The only reason to permit reservations was to lock down possible hardware
vectors prior to dynamic IRQ scanning, but this doesn't matter much given
that the hardware controller configuration is sorted before we get around
to doing any dynamic IRQ allocation anyways. Beyond that, all of the
tables are __init annotated, so quite a bit more work would need to be
done to support reconfiguring things like IRL controllers on the fly,
much more than would ever make it worth the hassle.Signed-off-by: Paul Mundt
12 Apr, 2012
1 commit
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This follows the MSTP clock change and implements variable access size
support for the rest of the CPG clocks, too. Upcoming SH-2A support has
need of this for 16-bit div4 clocks, while others will follow.Signed-off-by: Paul Mundt
11 Apr, 2012
1 commit
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The bulk of the MSTP users require 32-bit access, but this isn't the case
for some of the SH-2A parts, so add in some basic infrastructure to let
the CPU define its required access size in preparation.Requested-by: Phil Edworthy
Signed-off-by: Paul Mundt