04 Jul, 2018
2 commits
-
Data types 'cvmx_ciu_qlm0' and 'cvmx_ciu_qlm1' are identical in
their usage and structure. Combine them and update the PCIe code.Signed-off-by: Steven J. Hill
Signed-off-by: Paul Burton
Patchwork: https://patchwork.linux-mips.org/patch/19708/
Cc: linux-mips@linux-mips.org
Cc: Chandrakala Chavva -
Remove all unused data types. Verified with a 'make allyesconfig'
and Cavium platform.[paul.burton@mips.com:
- Also checked via convoluted grep invocation for use of all removed
structs & unions within arch/mips/ & drivers/.]Signed-off-by: Steven J. Hill
Signed-off-by: Paul Burton
Patchwork: https://patchwork.linux-mips.org/patch/19711/
Cc: linux-mips@linux-mips.org
Cc: Chandrakala Chavva
29 Jun, 2018
4 commits
-
Coldfire still provides its own variant of the clk API rather than using
the generic COMMON_CLK API. This generally works, but it causes some
link errors with drivers using the clk_round_rate(), clk_set_rate(),
clk_set_parent(), or clk_get_parent() functions when a platform lacks
those interfaces.This adds empty stub implementations for each of them, and I don't even
try to do something useful here but instead just print a WARN() message
to make it obvious what is going on if they ever end up being called.The drivers that call these won't be used on these platforms (otherwise
we'd get a link error today), so the added code is harmless bloat and
will warn about accidental use.Based on commit bd7fefe1f06ca6cc ("ARM: w90x900: normalize clk API").
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Paul Burton
Patchwork: https://patchwork.linux-mips.org/patch/19503/
Cc: Arnd Bergmann
Cc: linux-m68k@lists.linux-m68k.org
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: linux-kernel@vger.kernel.org -
The VDSO Makefile filters CFLAGS to select a subset which it uses whilst
building the VDSO ELF. One of the flags it allows through is the -march=
flag that selects the architecture/ISA to target.Unfortunately in cases where CONFIG_CPU_MIPS32_R{1,2}=y and the
toolchain defaults to building for MIPS64, the main MIPS Makefile ends
up using the short-form - flags in cflags-y. This is because the
calls to cc-option always fail to use the long-form -march= flag
due to the lack of an -mabi= flag in KBUILD_CFLAGS at the point
where the cc-option function is executed. The resulting GCC invocation
is something like:$ mips64-linux-gcc -Werror -march=mips32r2 -c -x c /dev/null -o tmp
cc1: error: '-march=mips32r2' is not compatible with the selected ABIThese short-form - flags are dropped by the VDSO Makefile's
filtering, and so we attempt to build the VDSO without specifying any
architecture. This results in an attempt to build the VDSO using
whatever the compiler's default architecture is, regardless of whether
that is suitable for the kernel configuration.One encountered build failure resulting from this mismatch is a
rejection of the sync instruction if the kernel is configured for a
MIPS32 or MIPS64 r1 or r2 target but the toolchain defaults to an older
architecture revision such as MIPS1 which did not include the sync
instruction:CC arch/mips/vdso/gettimeofday.o
/tmp/ccGQKoOj.s: Assembler messages:
/tmp/ccGQKoOj.s:273: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:329: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:520: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:714: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:1009: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:1066: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:1114: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:1279: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:1334: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:1374: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:1459: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:1514: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:1814: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:2002: Error: opcode not supported on this processor: mips1 (mips1) `sync'
/tmp/ccGQKoOj.s:2066: Error: opcode not supported on this processor: mips1 (mips1) `sync'
make[2]: *** [scripts/Makefile.build:318: arch/mips/vdso/gettimeofday.o] Error 1
make[1]: *** [scripts/Makefile.build:558: arch/mips/vdso] Error 2
make[1]: *** Waiting for unfinished jobs....This can be reproduced for example by attempting to build
pistachio_defconfig using Arnd's GCC 8.1.0 mips64 toolchain from
kernel.org:https://mirrors.edge.kernel.org/pub/tools/crosstool/files/bin/x86_64/8.1.0/x86_64-gcc-8.1.0-nolibc-mips64-linux.tar.xz
Resolve this problem by using the long-form -march= in all cases,
which makes it through the arch/mips/vdso/Makefile's filtering & is thus
consistently used to build both the kernel proper & the VDSO.The use of cc-option to prefer the long-form & fall back to the
short-form flags makes no sense since the short-form is just an
abbreviation for the also-supported long-form in all GCC versions that
we support building with. This means there is no case in which we have
to use the short-form - flags, so we can simply remove them.The manual redefinition of _MIPS_ISA is removed naturally along with the
use of the short-form flags that it accompanied, and whilst here we
remove the separate assembler ISA selection. I suspect that both of
these were only required due to the mips32 vs mips2 mismatch that was
introduced by commit 59b3e8e9aac6 ("[MIPS] Makefile crapectomy.") and
fixed but not cleaned up by commit 9200c0b2a07c ("[MIPS] Fix Makefile
bugs for MIPS32/MIPS64 R1 and R2.").I've marked this for backport as far as v4.4 where the MIPS VDSO was
introduced. In earlier kernels there should be no ill effect to using
the short-form flags.Signed-off-by: Paul Burton
Cc: Ralf Baechle
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # v4.4+
Reviewed-by: James Hogan
Patchwork: https://patchwork.linux-mips.org/patch/19579/ -
random_ether_addr is a #define for eth_random_addr which is
generally preferred in kernel code by ~3:1Convert the uses of random_ether_addr to enable removing the #define
Signed-off-by: Joe Perches
Signed-off-by: Paul Burton
Patchwork: https://patchwork.linux-mips.org/patch/19600/
Cc: Ralf Baechle
Cc: James Hogan
Cc: linux-mips@linux-mips.org -
Annotate cpu_wait implementations using the __cpuidle macro which
places these functions in the .cpuidle.text section. This allows
cpu_in_idle() to return true for PC values which fall within these
functions, allowing nmi_backtrace() to produce cleaner output for CPUs
running idle functions. For example:# echo l >/proc/sysrq-trigger
[ 38.587170] sysrq: SysRq : Show backtrace of all active CPUs
[ 38.593657] NMI backtrace for cpu 1
[ 38.597611] CPU: 1 PID: 161 Comm: sh Not tainted 4.18.0-rc1+ #27
[ 38.604306] Stack : 00000000 00000004 00000006 80486724 00000000 00000000 00000000 00000000
[ 38.613647] 80e17eda 00000034 00000000 00000000 80d20000 80b67e98 8e559c90 0ffe1e88
[ 38.622986] 00000000 00000000 80e70000 00000000 8f61db18 38312e34 722d302e 202b3163
[ 38.632324] 8e559d3c 8e559adc 00000001 6b636162 80d20000 80000000 00000000 80d1cfa4
[ 38.641664] 00000001 80d20000 80d19520 00000000 00000003 80836724 00000004 80e10004
[ 38.650993] ...
[ 38.653724] Call Trace:
[ 38.656499] [] show_stack+0xa0/0x144
[ 38.661475] [] dump_stack+0xe8/0x120
[ 38.666455] [] nmi_cpu_backtrace+0x1b4/0x1cc
[ 38.672189] [] nmi_trigger_cpumask_backtrace+0x130/0x1e4
[ 38.679081] [] __handle_sysrq+0xc0/0x180
[ 38.684421] [] write_sysrq_trigger+0x50/0x64
[ 38.690176] [] proc_reg_write+0xd0/0xfc
[ 38.695447] [] __vfs_write+0x54/0x194
[ 38.700500] [] vfs_write+0xe0/0x18c
[ 38.705360] [] ksys_write+0x7c/0xf0
[ 38.710238] [] syscall_common+0x34/0x58
[ 38.715558] Sending NMI from CPU 1 to CPUs 0,2-3:
[ 38.720916] NMI backtrace for cpu 0 skipped: idling at r4k_wait_irqoff+0x2c/0x34
[ 38.729186] NMI backtrace for cpu 3 skipped: idling at r4k_wait_irqoff+0x2c/0x34
[ 38.737449] NMI backtrace for cpu 2 skipped: idling at r4k_wait_irqoff+0x2c/0x34Without this we get register value & backtrace output from all CPUs,
which is generally useless for those running the idle function & serves
only to overwhelm & obfuscate the meaningful output from non-idle CPUs.Signed-off-by: Paul Burton
Cc: James Hogan
Cc: Ralf Baechle
Cc: Huacai Chen
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/19598/
25 Jun, 2018
34 commits
-
Remove the function sb1_dma_init() that is not used anywhere.
This was partially found by using a static code analysis program called cppcheck.
Signed-off-by: Rickard Strandqvist
Patchwork: https://patchwork.linux-mips.org/patch/8873/
Signed-off-by: Paul Burton
Cc: John Crispin
Cc: Thomas Bogendoerfer
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org -
Remove the function pci_enable_swapping() that is not used anywhere.
This was partially found by using a static code analysis program called cppcheck.
Signed-off-by: Rickard Strandqvist
Patchwork: https://patchwork.linux-mips.org/patch/8867/
Signed-off-by: Paul Burton
Cc: John Crispin
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org -
Remove the platform code used to power down the system, instead relying
upon the new PIIX4 poweroff driver. This reduces the amount of platform
code required for the Malta board in preparation for allowing it to be
part of a more generic kernel.Signed-off-by: Paul Burton
Patchwork: https://patchwork.linux-mips.org/patch/14282/ -
DMA coherence is not user-selectable in Kconfig, and Malta selects
CONFIG_DMA_MAYBE_COHERENT which in turn selects CONFIG_DMA_NONCOHERENT.
Remove #ifdefs whose conditions can therefore never be true for Malta.This removes a significant amount of code from bonito_quirks_setup(),
but the code is duplicated in plat_enable_iocoherency() anyway so we
lose nothing but duplication.Signed-off-by: Paul Burton
Patchwork: https://patchwork.linux-mips.org/patch/14188/ -
In systems that include a MIPS Coherency Manager, the icache always
fills from a cache which is coherent across all CPUs. In I6400 & I6500
systems the icache fills from the dcache which is coherent across all
CPUs. In all other CM-based systems the icache fills from the L2 cache
which is shared between all cores.This means that an icache will always see stores from remote CPUs
without needing to write them back any further than that L2, which is
what the cpu_icache_snoops_remote_store feature is used to test. In
order for it to return 1 without needing a per-platform override (which
is what Malta has relied upon so far) set the MIPS_IC_SNOOPS_REMOTE flag
when a CM is present.Signed-off-by: Paul Burton
Cc: Ralf Baechle
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16200/ -
This is a manual cherrypick of commit c7ddc3d137b7 from Alastair
Bridgewater's IP35 tree that replaces two cases of
"if (bus->number > 0)" with a more correct "if (!pci_is_root_bus(bus))"
in arch/mips/pci/ops-bridge.c.Cc: linux-mips@linux-mips.org
Cc: Alastair Bridgewater
Suggested-by: Alastair Bridgewater
Signed-off-by: Joshua Kinard
Patchwork: https://patchwork.linux-mips.org/patch/17501/
Signed-off-by: Paul Burton
Cc: Linux/MIPS -
Commit 6b8322576e9d ("MIPS: Force CPUs to lose FP context during mode
switches") ensures that we react to PR_SET_FP_MODE prctl syscalls
quickly by broadcasting an IPI in order to cause CPUs to lose FPU access
when necessary. Whilst it achieves that, unfortunately it causes all
sorts of strange race conditions because:1) The IPI may arrive at a point where the FPU is in the process of
being enabled, but that process is not yet complete leading to a
state we aren't prepared to handle. For example:[ 370.215903] do_cpu invoked from kernel context![#1]:
[ 370.221064] CPU: 0 PID: 963 Comm: fp-prctl Not tainted 4.9.0-rc5-00323-g210db32-dirty #226
[ 370.229420] task: a8000000fd672e00 task.stack: a8000000fd630000
[ 370.235399] $ 0 : 0000000000000000 0000000000000001 0000000000000001 a8000000fd630000
[ 370.243882] $ 4 : a8000000fd672e00 0000000000000000 0000000000000453 0000000000000000
[ 370.252317] $ 8 : 0000000000000000 a8000000fd637c28 1000000000000000 0000000000000010
[ 370.260753] $12 : 00000000140084e0 ffffffff80109c00 0000000000000000 0000000000000002
[ 370.269179] $16 : ffffffff8092f080 a8000000fd672e00 ffffffff80107fe8 a8000000fd485000
[ 370.277612] $20 : ffffffff8084d328 ffffffff80940000 0000000000000009 ffffffff80930000
[ 370.286038] $24 : 0000000000000000 900000001612048c
[ 370.294476] $28 : a8000000fd630000 a8000000fd637ac0 ffffffff80937300 ffffffff8010807c
[ 370.302909] Hi : 0000000000000000
[ 370.306595] Lo : 0000000000000200
[ 370.310376] epc : ffffffff80115d38 _save_fp+0x10/0xa0
[ 370.315784] ra : ffffffff8010807c prepare_for_fp_mode_switch+0x94/0x1b0
[ 370.322707] Status: 140084e2 KX SX UX KERNEL EXL
[ 370.327980] Cause : 1080002c (ExcCode 0b)
[ 370.332091] PrId : 0001a428 (MIPS P6600)
[ 370.336179] Modules linked in:
[ 370.339486] Process fp-prctl (pid: 963, threadinfo=a8000000fd630000, task=a8000000fd672e00, tls=00000000756e67d0)
[ 370.349724] Stack : 0000000000000000 a8000000fd557dc0 0000000000000000 ffffffff801ca8e0
[ 370.358161] 0000000000000000 a8000000fd637b9c 0000000000000009 ffffffff80923780
[ 370.366575] ffffffff80850000 ffffffff8011610c 00000000000000b8 ffffffff801a5084
[ 370.374989] ffffffff8084a370 ffffffff8084a388 ffffffff80923780 ffffffff80923828
[ 370.383395] 0000000000010000 ffffffff809237a8 0000000000020000 ffffffff80a40000
[ 370.391817] 000000000000007c 00000000004a0000 00000000756dedd0 ffffffff801a5188
[ 370.400230] a800000002014900 0000000000000001 ffffffff80923780 0000000080923828
[ 370.408644] ffffffff80923780 ffffffff80923780 ffffffff80923828 ffffffff801a521c
[ 370.417066] ffffffff80923780 ffffffff80923828 0000000000010000 ffffffff801a8f84
[ 370.425472] ffffffff80a40000 a8000000fd637c20 ffffffff80a39240 0000000000000001
[ 370.433885] ...
[ 370.436562] Call Trace:
[ 370.439222] [] _save_fp+0x10/0xa0
[ 370.444305] [] prepare_for_fp_mode_switch+0x94/0x1b0
[ 370.451035] [] flush_smp_call_function_queue+0xf8/0x230
[ 370.457991] [] ipi_call_interrupt+0xc/0x20
[ 370.463814] [] __handle_irq_event_percpu+0xc4/0x1a8
[ 370.470404] [] handle_irq_event_percpu+0x20/0x68
[ 370.476734] [] handle_irq_event+0x4c/0x88
[ 370.482486] [] handle_edge_irq+0x12c/0x210
[ 370.488316] [] generic_handle_irq+0x38/0x48
[ 370.494280] [] gic_handle_shared_int+0x194/0x268
[ 370.500616] [] generic_handle_irq+0x38/0x48
[ 370.506529] [] do_IRQ+0x18/0x28
[ 370.511445] [] plat_irq_dispatch+0xc4/0x140
[ 370.517339] [] ret_from_irq+0x0/0x4
[ 370.522583] [] do_ri+0x4fc/0x7e8
[ 370.527546] [] ret_from_exception+0x0/0x102) The IPI may arrive during kernel use of the FPU, since we generally
only disable preemption around use of the FPU & leave interrupts
enabled. This can lead to us unexpectedly losing access to the FPU
in places where it previously had not been possible. For example:do_cpu invoked from kernel context![#2]:
CPU: 2 PID: 7338 Comm: fp-prctl Tainted: G D 4.7.0-00424-g49b0c82
#2
task: 838e4000 ti: 88d38000 task.ti: 88d38000
$ 0 : 00000000 00000001 ffffffff 88d3fef8
$ 4 : 838e4000 88d38004 00000000 00000001
$ 8 : 3400fc01 801f8020 808e9100 24000000
$12 : dbffffff 807b69d8 807b0000 00000000
$16 : 00000000 80786150 00400fc4 809c0398
$20 : 809c0338 0040273c 88d3ff28 808e9d30
$24 : 808e9d30 00400fb4
$28 : 88d38000 88d3fe88 00000000 8011a2ac
Hi : 0040273c
Lo : 88d3ff28
epc : 80114178 _restore_fp+0x10/0xa0
ra : 8011a2ac mipsr2_decoder+0xd5c/0x1660
Status: 1400fc03 KERNEL EXL IE
Cause : 1080002c (ExcCode 0b)
PrId : 0001a920 (MIPS I6400)
Modules linked in:
Process fp-prctl (pid: 7338, threadinfo=88d38000, task=838e4000, tls=766527d0)
Stack : 00000000 00000000 00000000 88d3fe98 00000000 00000000 809c0398 809c0338
808e9100 00000000 88d3ff28 00400fc4 00400fc4 0040273c 7fb69e18 004a0000
004a0000 004a0000 7664add0 8010de18 00000000 00000000 88d3fef8 88d3ff28
808e9100 00000000 766527d0 8010e534 000c0000 85755000 8181d580 00000000
00000000 00000000 004a0000 00000000 766527d0 7fb69e18 004a0000 80105c20
...
Call Trace:
[] _restore_fp+0x10/0xa0
[] mipsr2_decoder+0xd5c/0x1660
[] do_ri+0x90/0x6b8
[] ret_from_exception+0x0/0x10At first glance a simple fix may seem to be to disable interrupts around
kernel use of the FPU rather than merely preemption, however this would
introduce further overhead outside of the mode switch path & doesn't
solve the third problem:3) The IPI may arrive whilst the kernel is running code that will lead
to a preempt_disable() call & FPU usage soon. If this happens then
the IPI will be serviced & we'll proceed to enable an FPU whilst the
mode switch is in progress, leading to strange & inconsistent
behaviour.Further to all of this is a separate but related problem:
4) There are various paths through which we may enable the FPU without
the user having triggered a coprocessor 1 disabled exception. These
paths are those in which we emulate instructions & then enable the
FPU with the expectation that the user might execute an FP
instruction shortly afterwards. However these paths have not
previously checked whether an FP mode switch is underway for the
task, and therefore could enable the FPU whilst such a mode switch
is in progress leading to strange & inconsistent behaviour for user
code.This patch fixes all of the above by taking a step back & re-examining
our approach to FP mode switches. Up until now we have taken these basic
steps:a) Prevent any threads that are part of the affected process from being
able to obtain ownership of the FPU.b) Cause any threads that are part of the affected process and already
have ownership of an FPU to lose it.c) Set the thread flags for each thread that is part of the affected
process to reflect the new FP mode.d) Allow threads to obtain ownership of the FPU again.
This approach is however more complex than necessary. All that we really
require is that the mode switch has occurred for all threads that are
part of the affected process before mips_set_process_fp_mode(), and thus
the PR_SET_FP_MODE prctl() syscall, returns. This doesn't require that
we stop threads from owning or using an FPU whilst a mode switch occurs,
only that we force them to relinquish it after the mode switch has
occurred such that they next own an FPU with the correct mode
configured. Our basic steps therefore simplify to:A) Set the thread flags for each thread that is part of the affected
process to reflect the new FP mode.B) Cause any threads that are part of the affected process and already
have ownership of an FPU to lose it.We implement B) by forcing each CPU which might be running a thread
which is part of the affected process to schedule a no-op function,
which causes the affected thread to lose its FPU ownership when it is
descheduled.The end result is simpler FP mode switching with less overhead in the
FPU enable path (ie. enable_restore_fp_context()) and fewer moving
parts.Signed-off-by: Paul Burton
Fixes: 9791554b45a2 ("MIPS,prctl: add PR_[GS]ET_FP_MODE prctl options for MIPS")
Fixes: 6b8322576e9d ("MIPS: Force CPUs to lose FP context during mode switches")
Cc: James Hogan
Cc: Ralf Baechle
Cc: linux-mips@linux-mips.org
Cc: stable # v4.0+ -
The DT core will call of_platform_default_populate, so it is not necessary
for arch specific code to call it unless there are custom match entries,
auxdata or parent device. Neither of those apply here, so remove the call.Cc: John Crispin
Cc: Ralf Baechle
Cc: Paul Burton
Cc: James Hogan
Cc: linux-mips@linux-mips.org
Signed-off-by: Rob Herring
Patchwork: https://patchwork.linux-mips.org/patch/19592/
Signed-off-by: Paul Burton
Cc: linux-kernel@vger.kernel.org -
The DT core will call of_platform_populate, so it is not necessary for
arch specific code to call it unless there are custom match entries,
auxdata or parent device. Neither of those apply here, so remove the call.Cc: Paul Burton
Cc: Ralf Baechle
Cc: James Hogan
Cc: linux-mips@linux-mips.org
Signed-off-by: Rob Herring
Patchwork: https://patchwork.linux-mips.org/patch/19591/
Signed-off-by: Paul Burton
Cc: linux-kernel@vger.kernel.org -
The DT core will register "simple-bus" by default, so it is not necessary
for arch specific code to do so unless there are custom match entries,
auxdata or parent device. Neither of those apply here, so remove the call.Cc: Kevin Cernekee
Cc: Florian Fainelli
Cc: Ralf Baechle
Cc: Paul Burton
Cc: James Hogan
Cc: linux-mips@linux-mips.org
Signed-off-by: Rob Herring
Patchwork: https://patchwork.linux-mips.org/patch/19590/
Signed-off-by: Paul Burton
Cc: linux-kernel@vger.kernel.org -
The DT core code will probe "simple-bus" by default, so remove
the Netlogic specific call. The probing of simple-bus happens at
arch_initcall_sync, so the call being removed here is already a nop.Cc: Ralf Baechle
Cc: Paul Burton
Cc: James Hogan
Cc: linux-mips@linux-mips.org
Signed-off-by: Rob Herring
Patchwork: https://patchwork.linux-mips.org/patch/19589/
Signed-off-by: Paul Burton
Cc: linux-kernel@vger.kernel.org -
of_platform_bus_probe is deprecated in favor of of_platform_populate.
of_platform_populate is stricter requiring compatible properties for
matching rather than name or type. Octeon uses compatible strings for
matching, so convert it to of_platform_populate.Cc: Ralf Baechle
Cc: Paul Burton
Cc: James Hogan
Cc: linux-mips@linux-mips.org
Signed-off-by: Rob Herring
Patchwork: https://patchwork.linux-mips.org/patch/19588/
Signed-off-by: Paul Burton
Cc: linux-kernel@vger.kernel.org -
On SMP systems, the shared ejtag debug buffer may be overwritten by
other cores, because every cores can generate ejtag exception at
same time.Unfortunately, in that context, it's difficult to relax more registers
to access per cpu buffers. so use ll/sc to serialize the access.[paul.burton@mips.com:
This could in theory be backported at least as far back as the
beginning of the git era, however in general it's exceedingly rare
that anyone would hit this without further changes, so it doesn't seem
worthwhile marking for backport.]Signed-off-by: Heiher
Patchwork: https://patchwork.linux-mips.org/patch/19507/
Signed-off-by: Paul Burton
Cc: jhogan@kernel.org
Cc: ralf@linux-mips.org -
Merge the build rule of vmlinux.{gz,bz2,lzma,lzo}.itb, and also move
'targets' close to the related code.[paul.burton@mips.com:
- Remove leading tabs from assignments to itb_addr_cells, since after
this patch moves the additions to the 'targets' variable the
assignments to itb_addr_cells wound up being treated as part of the
uImage rule above them, causing the .its to incorrectly be generated
with empty ADDR_CELLS.]Signed-off-by: Masahiro Yamada
Patchwork: https://patchwork.linux-mips.org/patch/19095/
Signed-off-by: Paul Burton
Cc: Kees Cook
Cc: linux-kernel@vger.kernel.org -
The build rule of vmlinux.*.its is invoked by $(call if_changed,...)
but it always rebuilds the target needlessly due to missing targets.Signed-off-by: Masahiro Yamada
Patchwork: https://patchwork.linux-mips.org/patch/19092/
Signed-off-by: Paul Burton
Cc: Kees Cook
Cc: linux-kernel@vger.kernel.org -
As Documentation/kbuild/makefile.txt says, it is a typical mistake
to forget the FORCE prerequisite for the rule invoked by if_changed.Add the FORCE to the prerequisite, but it must be filtered-out from
the files passed to the 'cat' command. Because this rule generates
.vmlinux.its.S.cmd, vmlinux.its.S must be specified as targets so
that the .cmd file is included.Signed-off-by: Masahiro Yamada
Patchwork: https://patchwork.linux-mips.org/patch/19097/
Signed-off-by: Paul Burton
Cc: Kees Cook
Cc: linux-kernel@vger.kernel.org -
$(CPP) is used here to perform macro replacement in ITS. Do not
pass $(cpp_flags) because it pulls in more options for dependency
file generation etc. but none of which is necessary here. ITS files
do not include any header file, so $(call if_change,...) is enough.Signed-off-by: Masahiro Yamada
Patchwork: https://patchwork.linux-mips.org/patch/19093/
Signed-off-by: Paul Burton
Cc: Kees Cook
Cc: linux-kernel@vger.kernel.org -
This reverts commit 0f9da844d87796ac31b04e81ee95e155e9043132.
It is true that commit 0f9da844d877 ("MIPS: boot: Define __ASSEMBLY__
for its.S build") fixed the build error, but it should not have
defined __ASSEMBLY__ just for textual substitution in arbitrary data.
The file is image tree source in this case, but the purpose of using
CPP is to replace some macros.I merged a better solution, commit a95b37e20db9 ("kbuild: get
out of "). The original
fix-up is no longer needed.Signed-off-by: Masahiro Yamada
Patchwork: https://patchwork.linux-mips.org/patch/19096/
Signed-off-by: Paul Burton
Cc: Kees Cook
Cc: linux-kernel@vger.kernel.org -
Booleans should be assigned true/false not 1/0 as comparison is not needed
Signed-off-by: Nicholas Mc Guire
Patchwork: https://patchwork.linux-mips.org/patch/19559/
Signed-off-by: Paul Burton
Cc: James Hogan
Cc: David Daney
Cc: "Steven J. Hill"
Cc: Joe Perches
Cc: Colin Ian King
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org -
Keep this file as light as possible as it gets pulled into every
driver using dma mapping APIs.Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19552/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
Now unused.
Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19551/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
Provide phys_to_dma/dma_to_phys helpers, and the special
arch_sync_dma_for_cpu_all hook, everything else is genericSigned-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19550/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
The MIPS bmips platform needs a global flush when transferring ownership
back to the CPU. Add a hook for that to the dma-noncoherent
implementation.Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19549/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
Jazz actually has a very basic IOMMU, so split the ops into a separate
implementation from the generic default support (which is about to go
away anyway).Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19548/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
Provide phys_to_dma/dma_to_phys helpers only if PCI support is
enabled, everything else is generic.Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19547/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
Provide phys_to_dma/dma_to_phys helpers, everything else is generic.
Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19546/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
Provide phys_to_dma/dma_to_phys helpers, everything else is generic.
Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19545/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
Convert everything not overriding dma-coherence.h to the generic
noncoherent ops. The new dma-noncoherent.c file duplicates a lot of
the code in dma-default.c, but that file will be gone by the end of
this series.Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19544/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
We want to be able to use it even when not building dma-default.c
in the near future.Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19543/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
IP27 is coherent and has a reasonably direct mapping, just with a little
per-bus offset added into the dma address.Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19542/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
Switch the simple cache coherent architectures that don't require any
DMA address translation to dma_direct_ops.We'll soon use at least parts of the direct DMA ops implementation for
all platforms, so select the symbol globally.Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19540/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
Loongson3 is dma coherent and uses swiotlb, so it will never used any
of these helpers.Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19541/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
Only loongson-3 is DMA coherent and uses swiotlb. So move the dma
address translations stubs directly to the loongson-3 code, and remove
a few Kconfig indirections.Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19539/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org -
No need to pull them into a global header.
Signed-off-by: Christoph Hellwig
Patchwork: https://patchwork.linux-mips.org/patch/19538/
Signed-off-by: Paul Burton
Cc: Florian Fainelli
Cc: David Daney
Cc: Kevin Cernekee
Cc: Jiaxun Yang
Cc: Tom Bogendoerfer
Cc: Huacai Chen
Cc: iommu@lists.linux-foundation.org
Cc: linux-mips@linux-mips.org
