12 Apr, 2018
2 commits
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NXP i.MX7ULP EVK boards all sensors connect with M4 core, A core
has to conmunicate with sensors by virtual io bus like rpmsg bus.
The driver implement the virtual sensor input driver to configure
sensors active/idle/delay actions and report the sensors' event to
user space.Supply below sysfs for user to enable/disable detector and counter,
set poll delay:
/sys/class/misc/step_counter/enable
/sys/class/misc/step_detector/enable
/sys/class/misc/step_counter/poll_delayReviewed-by: Elven Wang
Signed-off-by: Fugang Duan -
- To save power consumption, PHY related CLKs can be
gated off after the configurations are done.
- The impedance ratio should be configured refer to
differnet REXT values.
0x6c REXT valuse is 85Ohms
Default values 0x80 REXT value is 100Ohms.
- IMX8QM_HSIO_PHY_X1_APB_CLK is mandatory required when
access SATA PHY registers. Change the power domain to SATA.Signed-off-by: Richard Zhu
21 Mar, 2018
29 commits
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Signed-off-by: Antoine Bouyer
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Add gpio interrupt chip support that only support wakeup feature
by M4 core.Reviewed-by: Robin Gong
Signed-off-by: Fugang Duan -
The DSI-HDMI converter, ADV7535, driver uses four i2c memory maps: MAIN,
DSI-CEC, EDID and PACKET.
While the MAIN address is hard-coded in the ROM chip, the other three
can be programmed into the MAIN memory map.
Currently, the three memory maps addresses, that can be programmed, are
hard-coded into the code.
In order to avoid conflicts with other i2c clients on the bus, update
the driver to use configurable addresses specified in DTS file.Signed-off-by: Robert Chiras
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SCDC is a mechanism defined in the HDMI 2.0 specification that allows
the source and sink devices to communicate.This commit introduces helpers to access the SCDC and provides the
symbolic names for the various registers defined in the specification.V2: Rebase.
V3: Added R-B from Jose.
V4: Rebase
V5: Addressed review comments from Ville
- Handle the I2c return values in a better way (dp_dual_mode)
- Make the macros for SCDC Major/Minor more readable, by adding
a 'GET' in the macro names
V6: Rebase
V7: Rebase
V8: Rebase
V9: Rebase
V10: RebaseSigned-off-by: Thierry Reding
Signed-off-by: Shashank Sharma
Reviewed-by: Jose Abreu
Signed-off-by: Jani Nikula
Link: http://patchwork.freedesktop.org/patch/msgid/1489404244-16608-2-git-send-email-shashank.sharma@intel.com -
i.MX7ULP Clock functions are under joint control of the System
Clock Generation (SCG) modules, Peripheral Clock Control (PCC)
modules, and Core Mode Controller (CMC)1 blocksNote IMX7ULP has two clock domains: M4 and A7. This binding doc
is only for A7 clock domain.Cc: Anson Huang
Reviewed-by: Bai Ping
Signed-off-by: Dong Aisheng -
Adding NXP Low Power Timer/Pulse Width Modulation Module (TPM)
binding doc.Cc: Shenwei Wang
Reviewed-by: Bai Ping
Acked-by: Rob Herring
Signed-off-by: Dong Aisheng -
On MX7ULP, GPIO controller needs two necessary clocks:
Port module clock and GPIO module clock.Add them as optional clocks to use.
Acked-by: Fugang Duan
Signed-off-by: Dong Aisheng -
The Rapid General-Purpose Input and Output with 2 Ports (RGPIO2P)
on MX7ULP is similar to GPIO on Vibrid, except it has an extra
Port Data Direction Register (PDDR) used to configure the individual
port pins for input or output.Reviewed-by: Fugang Duan
Signed-off-by: Dong Aisheng -
add devicetree binding doc for add for EMVSIM
Signed-off-by: Gao Pan
Reviewed-by: Andy Duan -
add devicetree binding doc for SIMv2
Signed-off-by: Gao Pan
Reviewed-by: Andy Duan -
This glues SAI interface with AK4497 DAC codec on i.MX boards.
Signed-off-by: Daniel Baluta
Signed-off-by: Shengjiu Wang -
AK4497 is a 32-bit 2ch DAC, supporting up to 6 types
of digital filters and accepts up to 768kHz PCM data
and 22.4MHz DSD data.This is based on original code received from Asahi Kasei
with the following modifications:* there is now a .component_driver inside snd_soc_codec_driver holding
the controls, dapm_widgets and dap_routes.
* Remove akdbgprt
* Use module_i2c_driver
* Add NXP copyright
* Use symbolic names for registers
* Fix coding style issues
* fix function parameters indentation
* remove multiple empty newlines
* convert C++ style comments to C style comments
* fix spaces and tabs at the end of the line.
* remove braces {} for single block statements
* Make pointers const
* Fix lines over 80 chars
* Don't initialize statics to 0
* Use usleep_range instead of msleep
* Fx vendor prefix
* Add DT bindings documentation for ak4497 codec
* Remove regmap default functions
* Use devm_kzalloc
* Fix MAX_REGISTERS value
* Add $self as module author
* Remove .owner field
* Make ak4497_init_reg return voidSigned-off-by: Daniel Baluta
Signed-off-by: Shengjiu Wang -
Add machine driver for i.MX boards that have AK5558 ADC attached to SAI.
Signed-off-by: Mihai Serban
Signed-off-by: Shengjiu Wang -
The AK555x series is a 32-bit, 768 kHz sampling, differential input A/D
converter for digital audio systems. The datasheet is available here:
https://www.akm.com/akm/en/file/datasheet/AK5558VN.pdfSigned-off-by: Mihai Serban
Signed-off-by: Shengjiu Wang -
Add machine driver for i.MX boards that have AK4458 DAC attached to SAI.
Signed-off-by: Mihai Serban
Signed-off-by: Shengjiu Wang -
The AK4458 is a 32-bit 8ch Premium DAC, its datasheet is available here:
https://www.akm.com/akm/en/file/datasheet/AK4458VN.pdfSigned-off-by: Mihai Serban
Signed-off-by: Shengjiu Wang -
Add a new property "adi,dsi-channel" to allow the user specify the DSI
channel to be used when communicating with DSI peripheral.Signed-off-by: Robert Chiras
Reviewed-by: Laurentiu Palcu -
Normally CAN FD capable device must work on FD mode as it has different
statically claimed bittiming capability.
This patch provides users to disable CAN FD capability if users want
to only work at normal mode.Acked-by: Jason Liu
Signed-off-by: Dong Aisheng -
Add max_snk_mw property for power sink to know the max power.
Because the max mw may be smaller than the max ma multiplied by
max mv:
max-mw
Signed-off-by: Li Jun -
Some chipidea hardware needs to disable low power mode for controller
due to IC issue or hardware issue, add one quirk for it.Acked-by: Jun Li
Signed-off-by: Peter Chen -
Add imx7ulp and imx8qm compatible.
Acked-by: Jun Li
Signed-off-by: Peter Chen -
This patch adds DPR support for fetchdecode in the DPU base driver.
Signed-off-by: Liu Ying
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The Display Prefetch Resolve(DPR) is a processor of fetching display data
before the display pipeline which needs data to drive pixels in the active
display region. The data is transformed, or resolved from a variety of
tiled buffer formats into linear format. The DPR transaction sequences are
issued with a high level of DRAM efficiency. This patch adds the base
driver support for i.MX8qm/qxp DPR.Signed-off-by: Liu Ying
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The Pretch Resolve Gasket(PRG) is a digital core function as a gasket
interface between RTRAM controller and DPU. The main function of PRG
is to convert the AXI interface to RTRAM interface and remapping the
ARADDR to a RTRAM address. This patch adds the base driver support
for i.MX8qm/qxp PRG.Signed-off-by: Liu Ying
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For stability issues, we want to limit the maximum resolution supported
by the MXSFB (eLCDIF) driver.
This patch adds a new property which we can use to impose such
limitation.Signed-off-by: Robert Chiras
Reviewed-by: Laurentiu Palcu <laurentiu.palcu@nxp.com -
To allow the PLL to become stable before enabling the clocks, we may
need a delay. This patch adds a new property to specify this delay from
DTS file.Reviewed-by: Laurentiu Palcu
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Add a new dt property to the nwl_dsi-imx driver: sync-pol.
This property represents the sync polarity of the input signal to it's
internal DPI-to-DSI block.Signed-off-by: Robert Chiras
Reviewed-by: Laurentiu Palcu -
Add pdm mic support on imx8mq evk platform
Hardware modifications connect PDM mic:PDM pin SAI-3 pad Test point
------------------------------------
BCLK SAI3_RXC TP1802
DATA SAI3_RXD TP1804Signed-off-by: Adrian Alonso
Reviewed-by: Shengjiu Wang -
Add definition of CAAM page 0 in the device tree.
This page is only accessible by the CPU in secure world.
this is defined by the secure-status.Signed-off-by: Cedric Neveux
20 Mar, 2018
9 commits
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There is already one quirk for usb3 xhci flag XHCI_MISSING_CAS, for
those platform with OF we can use usb3-resume-missing-cas to enable
this quirk to work around usb3 resume from system sleep.Signed-off-by: Li Jun
Acked-by: Peter Chen -
TCPCI stands for typec port controller interface, its implementation
has full typec port control with power delivery support, it's a
standard i2c slave with GPIO input as irq interface, detail see spec
"Universal Serial Bus Type-C Port Controller Interface Specification
Revision 1.0, Version 1.1"Signed-off-by: Li Jun
Acked-by: Peter Chen -
port-type is required for any typec port; default-role is only required
for drp; power source capable needs src-pdos; power sink capable needs
snk-pdos, max-snk-mv, max-snk-ma, op-snk-mw.Signed-off-by: Li Jun
Acked-by: Peter Chen -
The JDI TX26D202VM0BWA LCD panel is a 10.1" panel
with a 1920x1200 (WUXGA) resolution.
The panel has dual LVDS channels.Signed-off-by: Liu Ying
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Acked-by: Andreas Dannenberg
Signed-off-by: Jens Wiklander
(cherry picked from commit 6a6e77006fcdba89708214556c6d560323e850fc) -
Initial patch for generic TEE subsystem.
This subsystem provides:
* Registration/un-registration of TEE drivers.
* Shared memory between normal world and secure world.
* Ioctl interface for interaction with user space.
* Sysfs implementation_id of TEE driverA TEE (Trusted Execution Environment) driver is a driver that interfaces
with a trusted OS running in some secure environment, for example,
TrustZone on ARM cpus, or a separate secure co-processor etc.The TEE subsystem can serve a TEE driver for a Global Platform compliant
TEE, but it's not limited to only Global Platform TEEs.This patch builds on other similar implementations trying to solve
the same problem:
* "optee_linuxdriver" by among others
Jean-michel DELORME and
Emmanuel MICHEL
* "Generic TrustZone Driver" by Javier GonzálezAcked-by: Andreas Dannenberg
Tested-by: Jerome Forissier (HiKey)
Tested-by: Volodymyr Babchuk (RCAR H3)
Tested-by: Scott Branden
Reviewed-by: Javier González
Signed-off-by: Jens Wiklander
(cherry picked from commit 967c9cca2cc50569efc65945325c173cecba83bd) -
Introduces linaro prefix and adds bindings for ARM TrustZone based OP-TEE
implementation.Acked-by: Rob Herring
Signed-off-by: Jens Wiklander
(cherry picked from commit c8bfafb1594435889b571b79325011e8b7fd087b) -
- Add the clk_req property for imx8 pcie, make sure that
the clk_req would be active.
- Correct the spell mistake of pcie pinctrl on imx8qxp.
- Fix the potential conflication with the usage of SC MU,
remove the useless "fsl,imx8-mu" of rpmsg.Signed-off-by: Richard Zhu
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Currently, the Northwest Logic MIPI-DSI controller host specific code
resides under drm/bridge, but is not a real drm_bridge. It creates a
drm_bridge and adds itself to the drm_encoder that handles this file,
but this is wrong, since it does not implement the drm_bridge_funcs.The correct way to implement a drm_bridge is to add the drm_bridge and
let other components (another bridge or a drm_encoder) to attach to this
bridge.
Since we are doing this, a new compatible strings can be used for this
driver: "nwl,mipi-dsi".Since this was used by nwl_dsi-imx.c, update that driver to use this
bridge correctly.This is needed in order to add support for MIPI-DSI on 8MQ. The IMX_NWL
driver will either add a DSI encoder to DRM, or a DSI bridge.
The encoder will be used by imx-drm-core driver, while the bridge
will be used by MXSFB driver (which creates a simple display pipe).Signed-off-by: Robert Chiras
