10 Apr, 2015

6 commits

  • This updated the generic SHA-1 implementation to use the generic
    shared SHA-1 glue code.

    It also implements a .finup hook crypto_sha1_finup() and exports
    it to other modules. The import and export() functions and the
    .statesize member are dropped, since the default implementation
    is perfectly suitable for this module.

    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Herbert Xu

    Ard Biesheuvel
     
  • To reduce the number of copies of boilerplate code throughout
    the tree, this patch implements generic glue for the SHA-512
    algorithm. This allows a specific arch or hardware implementation
    to only implement the special handling that it needs.

    The users need to supply an implementation of

    void (sha512_block_fn)(struct sha512_state *sst, u8 const *src, int blocks)

    and pass it to the SHA-512 base functions. For easy casting between the
    prototype above and existing block functions that take a 'u64 state[]'
    as their first argument, the 'state' member of struct sha512_state is
    moved to the base of the struct.

    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Herbert Xu

    Ard Biesheuvel
     
  • To reduce the number of copies of boilerplate code throughout
    the tree, this patch implements generic glue for the SHA-256
    algorithm. This allows a specific arch or hardware implementation
    to only implement the special handling that it needs.

    The users need to supply an implementation of

    void (sha256_block_fn)(struct sha256_state *sst, u8 const *src, int blocks)

    and pass it to the SHA-256 base functions. For easy casting between the
    prototype above and existing block functions that take a 'u32 state[]'
    as their first argument, the 'state' member of struct sha256_state is
    moved to the base of the struct.

    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Herbert Xu

    Ard Biesheuvel
     
  • To reduce the number of copies of boilerplate code throughout
    the tree, this patch implements generic glue for the SHA-1
    algorithm. This allows a specific arch or hardware implementation
    to only implement the special handling that it needs.

    The users need to supply an implementation of

    void (sha1_block_fn)(struct sha1_state *sst, u8 const *src, int blocks)

    and pass it to the SHA-1 base functions. For easy casting between the
    prototype above and existing block functions that take a 'u32 state[]'
    as their first argument, the 'state' member of struct sha1_state is
    moved to the base of the struct.

    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Herbert Xu

    Ard Biesheuvel
     
  • A cipher instance is added to the list of instances unconditionally
    regardless of whether the associated test failed. However, a failed
    test implies that during another lookup, the cipher instance will
    be added to the list again as it will not be found by the lookup
    code.

    That means that the list can be filled up with instances whose tests
    failed.

    Note: tests only fail in reality in FIPS mode when a cipher is not
    marked as fips_allowed=1. This can be seen with cmac(des3_ede) that does
    not have a fips_allowed=1. When allocating the cipher, the allocation
    fails with -ENOENT due to the missing fips_allowed=1 flag (which
    causes the testmgr to return EINVAL). Yet, the instance of
    cmac(des3_ede) is shown in /proc/crypto. Allocating the cipher again
    fails again, but a 2nd instance is listed in /proc/crypto.

    The patch simply de-registers the instance when the testing failed.

    Signed-off-by: Stephan Mueller
    Signed-off-by: Herbert Xu

    Stephan Mueller
     
  • We currently initialise the crypto_alg ref count in the function
    __crypto_register_alg. As one of the callers of that function
    crypto_register_instance needs to obtain a ref count before it
    calls __crypto_register_alg, we need to move the initialisation
    out of there.

    Since both callers of __crypto_register_alg call crypto_check_alg,
    this is the logical place to perform the initialisation.

    Signed-off-by: Herbert Xu
    Acked-by: Stephan Mueller

    Herbert Xu
     

08 Apr, 2015

13 commits

  • The AES implementation still assumes, that the hw_desc[0] has a valid
    key as long as no new key needs to be set; consequentialy it always
    sets the AES key header for the first descriptor and puts data into
    the second one (hw_desc[1]).

    Change this to only update the key in the hardware, when a new key is
    to be set and use the first descriptor for data otherwise.

    Signed-off-by: Steffen Trumtrar
    Signed-off-by: Herbert Xu

    Steffen Trumtrar
     
  • With commit

    7e77bdebff5cb1e9876c561f69710b9ab8fa1f7e crypto: af_alg - fix backlog handling

    in place, the backlog works under all circumstances where it previously failed, atleast
    for the sahara driver. Use it.

    Signed-off-by: Steffen Trumtrar
    Signed-off-by: Herbert Xu

    Steffen Trumtrar
     
  • The function crypto_alg_match returns an algorithm without taking
    any references on it. This means that the algorithm can be freed
    at any time, therefore all users of crypto_alg_match are buggy.

    This patch fixes this by taking a reference count on the algorithm
    to prevent such races.

    Signed-off-by: Herbert Xu

    Herbert Xu
     
  • The output buffer is used for CPU access, so
    the API should be dma_sync_single_for_cpu which
    makes the cache line invalid in order to reload
    the value in memory.

    Signed-off-by: Leilei Zhao
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • The input buffer and output buffer are mapped for DMA transfer
    in Atmel AES driver. But they are also be used by CPU when
    the requested crypt length is not bigger than the threshold
    value 16. The buffers will be cached in cache line when CPU
    accessed them. When DMA uses the buffers again, the memory
    can happened to be flushed by cache while DMA starts transfer.

    So using API dma_sync_single_for_device and dma_sync_single_for_cpu
    in DMA to ensure DMA coherence and CPU always access the correct
    value. This fix the issue that the encrypted result periodically goes
    wrong when doing performance test with OpenSSH.

    Signed-off-by: Leilei Zhao
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • Kernel will report "BUG: spinlock lockup suspected on CPU#0"
    when CONFIG_DEBUG_SPINLOCK is enabled in kernel config and the
    spinlock is used at the first time. It's caused by uninitialized
    spinlock, so just initialize it in probe.

    Signed-off-by: Leilei Zhao
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • Kernel will report "BUG: spinlock lockup suspected on CPU#0"
    when CONFIG_DEBUG_SPINLOCK is enabled in kernel config and the
    spinlock is used at the first time. It's caused by uninitialized
    spinlock, so just initialize it in probe.

    Signed-off-by: Leilei Zhao
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • The maximum source and destination burst size is 16
    according to the datasheet of Atmel DMA. And the value
    is also checked in function at_xdmac_csize of Atmel
    DMA driver. With the restrict, the value beyond maximum
    value will not be processed in DMA driver, so SHA384 and
    SHA512 will not work and the program will wait forever.

    So here change the max burst size of all the cases to 16
    in order to make SHA384 and SHA512 work and keep consistent
    with DMA driver and datasheet.

    Signed-off-by: Leilei Zhao
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • Kernel will report "BUG: spinlock lockup suspected on CPU#0"
    when CONFIG_DEBUG_SPINLOCK is enabled in kernel config and the
    spinlock is used at the first time. It's caused by uninitialized
    spinlock, so just initialize it in probe.

    Signed-off-by: Leilei Zhao
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • Having a zero length sg doesn't mean it is the end of the sg list. This
    case happens when calculating HMAC of IPSec packet.

    Signed-off-by: Leilei Zhao
    Signed-off-by: Ludovic Desroches
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • When a hash is requested on data bigger than the buffer allocated by the
    SHA driver, the way DMA transfers are performed is quite strange:
    The buffer is filled at each update request. When full, a DMA transfer
    is done. On next update request, another DMA transfer is done. Then we
    wait to have a full buffer (or the end of the data) to perform the dma
    transfer. Such a situation lead sometimes, on SAMA5D4, to a case where
    dma transfer is finished but the data ready irq never comes. Moreover
    hash was incorrect in this case.

    With this patch, dma transfers are only performed when the buffer is
    full or when there is no more data. So it removes the transfer whose size
    is equal the update size after the full buffer transmission.

    Signed-off-by: Ludovic Desroches
    Signed-off-by: Leilei Zhao
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Ludovic Desroches
     
  • Add new version of atmel-sha available with SAMA5D4 devices.

    Signed-off-by: Leilei Zhao
    Signed-off-by: Ludovic Desroches
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     
  • Add new version of atmel-aes available with SAMA5D4 devices.

    Signed-off-by: Leilei Zhao
    Signed-off-by: Ludovic Desroches
    Acked-by: Nicolas Ferre
    Signed-off-by: Herbert Xu

    Leilei Zhao
     

07 Apr, 2015

3 commits


03 Apr, 2015

4 commits

  • Add Andy Polyakov's optimized assembly and NEON implementations for
    SHA-256/224.

    The sha256-armv4.pl script for generating the assembly code is from
    OpenSSL commit 51f8d095562f36cdaa6893597b5c609e943b0565.

    Compared to sha256-generic these implementations have the following
    tcrypt speed improvements on Motorola Nexus 6 (Snapdragon 805):

    bs b/u sha256-neon sha256-asm
    16 16 x1.32 x1.19
    64 16 x1.27 x1.15
    64 64 x1.36 x1.20
    256 16 x1.22 x1.11
    256 64 x1.36 x1.19
    256 256 x1.59 x1.23
    1024 16 x1.21 x1.10
    1024 256 x1.65 x1.23
    1024 1024 x1.76 x1.25
    2048 16 x1.21 x1.10
    2048 256 x1.66 x1.23
    2048 1024 x1.78 x1.25
    2048 2048 x1.79 x1.25
    4096 16 x1.20 x1.09
    4096 256 x1.66 x1.23
    4096 1024 x1.79 x1.26
    4096 4096 x1.82 x1.26
    8192 16 x1.20 x1.09
    8192 256 x1.67 x1.23
    8192 1024 x1.80 x1.26
    8192 4096 x1.85 x1.28
    8192 8192 x1.85 x1.27

    Where bs refers to block size and b/u to bytes per update.

    Signed-off-by: Sami Tolvanen
    Cc: Andy Polyakov
    Signed-off-by: Herbert Xu

    Sami Tolvanen
     
  • This patch makes crypto_unregister_instance take a crypto_instance
    instead of a crypto_alg. This allows us to remove a duplicate
    CRYPTO_ALG_INSTANCE check in crypto_unregister_instance.

    Signed-off-by: Herbert Xu

    Herbert Xu
     
  • There are multiple problems in crypto_unregister_instance:

    1) The cra_refcnt BUG_ON check is racy and can cause crashes.
    2) The cra_refcnt check shouldn't exist at all.
    3) There is no reference on tmpl to protect the tmpl->free call.

    This patch rewrites the function using crypto_remove_spawn which
    now morphs into crypto_remove_instance.

    Signed-off-by: Herbert Xu

    Herbert Xu
     
  • kmap_atomic() gives only the page address of the input page.
    Driver should take care of adding the offset of the scatterlist
    within the page to the returned page address.
    omap-sham driver is not adding the offset to page and directly operates
    on the return vale of kmap_atomic(), because of which the following
    error comes when running crypto tests:

    00000000: d9 a1 1b 7c aa 90 3b aa 11 ab cb 25 00 b8 ac bf
    [ 2.338169] 00000010: c1 39 cd ff 48 d0 a8 e2 2b fa 33 a1
    [ 2.344008] alg: hash: Chunking test 1 failed for omap-sha256

    So adding the scatterlist offset to vaddr.

    Signed-off-by: Lokesh Vutla
    Signed-off-by: Herbert Xu

    Vutla, Lokesh
     

01 Apr, 2015

9 commits


31 Mar, 2015

5 commits