22 Mar, 2011
40 commits
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This patch introduces lcdc->lcdcon_pol_negative which set CONTRAST_CTR
register to inverted polarity.Signed-off-by: Andreas Bießmann
Signed-off-by: Paul Mundt -
Return PTR_ERR(sfb->bus_clk) instead of 0 if clk_get fails.
Signed-off-by: Axel Lin
Acked-by: Kyungmin Park
Signed-off-by: Paul Mundt -
with an PAT-enabled kernel, when using uvesafb or vesafb, these drivers will
create uncached-minus PAT entries for the framebuffer memory because they use
ioremap() (not the *_cache or *_wc variants). When the framebuffer memory
intersects with the video RAM used by Xorg, the complete video RAM will be
mapped uncached-minus what results in a serve performance penalty.Here are the correct MTRR entries created by uvesafb:
schlicht@netbook:~$ cat /proc/mtrr
reg00: base=0x000000000 ( 0MB), size= 2048MB, count=1: write-back
reg01: base=0x06ff00000 ( 1791MB), size= 1MB, count=1: uncachable
reg02: base=0x070000000 ( 1792MB), size= 256MB, count=1: uncachable
reg03: base=0x0d0000000 ( 3328MB), size= 16MB, count=1: write-combiningAnd here are the problematic PAT entries:
schlicht@netbook:~$ sudo cat /sys/kernel/debug/x86/pat_memtype_list
PAT memtype list:
write-back @ 0x0-0x1000
uncached-minus @ 0x6fedd000-0x6fee3000
uncached-minus @ 0x6fee2000-0x6fee3000
uncached-minus @ 0x6fee2000-0x6fee3000
uncached-minus @ 0x6fee2000-0x6fee3000
uncached-minus @ 0x6fee2000-0x6fee3000
uncached-minus @ 0x6fee2000-0x6fee3000
uncached-minus @ 0x6fee2000-0x6fee3000
uncached-minus @ 0x6fee2000-0x6fee3000
uncached-minus @ 0x6fee3000-0x6fee4000
uncached-minus @ 0x6fee3000-0x6fee4000
uncached-minus @ 0x6fee3000-0x6fee4000
uncached-minus @ 0xd0000000-0xe0000000
Signed-off-by: Paul Mundt -
Current implementation calls of_iounmap for par->fbc twice in error path.
In the case of goto out_unmap_dac, we should call of_iounmap for par->dac.Signed-off-by: Axel Lin
Acked-by: David S. Miller
Signed-off-by: Paul Mundt -
Some Radeon cards have an I2C-based thermal sensor chip connected to
the "monid" I2C bus. Set the I2C probing class of this bus properly so
that hwmon drivers can detect devices on it and bind to them.This closes kernel.org bug #26172.
We exclude PPC for the time being, as Benjamin doesn't want us to
mess up with them without explicit testing, and there is no evidence
that this change is needed for them either.Reported-by: Alexander Goomenyuk
Signed-off-by: Jean Delvare
Cc: Benjamin Herrenschmidt
Signed-off-by: Paul Mundt -
backlight_device_register() returns an ERR_PTR. It doesn't return NULL.
Signed-off-by: Dan Carpenter
Signed-off-by: Paul Mundt -
The size calculation is done incorrectly in request_mem_region because
it should include both the start and end (end - start + 1).Signed-off-by: Axel Lin
Signed-off-by: Paul Mundt -
The size calculation is done incorrectly here because it should include
both the start and end (end - start + 1).Signed-off-by: Axel Lin
Signed-off-by: Paul Mundt -
Use "new" start address register 0x69 (bits 16-20) instead of "old" 0x31
(bits 16-17) and 0x51 (bits 18-19). This is needed for panning to work
correctly on Trio3D/2X cards (and does no harm on other ones).Signed-off-by: Ondrej Zary
Acked-by: Ondrej Zajicek
Signed-off-by: Paul Mundt -
Enable Data Transfer Position Control (DTPC). This is needed at least on
Virge/DX to correctly display at higher pixclocks.Signed-off-by: Ondrej Zary
Acked-by: Ondrej Zajicek
Signed-off-by: Paul Mundt -
Enable pixel multiplexing in 15/16bpp modes when pixclock is over 115MHz
on Trio3D (86C365) cards to fix artifacts on the left side of screen.Signed-off-by: Ondrej Zary
Acked-by: Ondrej Zajicek
Signed-off-by: Paul Mundt -
Add support for S3 Trio3D (86C365) cards to s3fb driver. Tested with one 4MB card.
Signed-off-by: Ondrej Zary
Acked-by: Ondrej Zajicek
Signed-off-by: Paul Mundt -
Maximize virtual vertical framebuffer size during init to allow fast scrolling
(accelerated by panning).Signed-off-by: Ondrej Zary
Acked-by: Ondrej Zajicek
Signed-off-by: Paul Mundt -
This allows the driver to work in multi-domain PCI
configurations.Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
This allows the driver to work in multi-domain PCI
configurations.Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
This allows the driver to work in multi-domain PCI
configurations.Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Instead of just plain NULL.
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Instead of just plain NULL.
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Instead of just plain NULL.
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
And use vga_{r,w}().
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Instead of magic register location constants.
Signed-off-by: David S. Miller
Signed-off-by: Paul Mundt -
Add support for ZGI Z9 DDR2 POST. The init sequence is from XGI's
xgifb driver.Tested with ARM board using a PCI card with XGI Z9s and 32 MB DDR2
memory. After a cold reset the POST succeeds.Signed-off-by: Aaro Koskinen
Cc: Thomas Winischhofer
Signed-off-by: Paul Mundt -
Move DDR2 register setting code into separate subroutines. No changes
in functionality.Signed-off-by: Aaro Koskinen
Cc: Thomas Winischhofer
Signed-off-by: Paul Mundt -
Detect the XGI Z9 RAM type as "documented" by the XGI's xgifb driver.
Signed-off-by: Aaro Koskinen
Cc: Thomas Winischhofer
Signed-off-by: Paul Mundt -
Z7 and Z9 have the same PCI ID, so additional checking is needed to
detect Z9. The method was "documented" in XGI's xgifb driver.Signed-off-by: Aaro Koskinen
Cc: Thomas Winischhofer
Signed-off-by: Paul Mundt -
Move XGI POST RAM type detection into a separate subroutine to make
further code changes easier. No changes in functionalitySigned-off-by: Aaro Koskinen
Cc: Thomas Winischhofer
Signed-off-by: Paul Mundt