19 Jun, 2015

1 commit


15 Jun, 2015

1 commit

  • The '__init aesni_init()' function calls the '__exit crypto_fpu_exit()'
    function directly. Since they are in different sections, this generates
    a warning.

    make CONFIG_DEBUG_SECTION_MISMATCH=y
    ...
    WARNING: arch/x86/crypto/aesni-intel.o(.init.text+0x12b): Section
    mismatch in reference from the function init_module() to the function
    .exit.text:crypto_fpu_exit()
    The function __init init_module() references
    a function __exit crypto_fpu_exit().
    This is often seen when error handling in the init function
    uses functionality in the exit path.
    The fix is often to remove the __exit annotation of
    crypto_fpu_exit() so it may be used outside an exit section.

    Fix the warning by removing the __exit annotation.

    Signed-off-by: Jeremiah Mahler
    Signed-off-by: Herbert Xu

    Jeremiah Mahler
     

09 Jun, 2015

1 commit

  • nios2 is the only architecture that does not inline get_cycles
    and does not export it. This breaks crypto as it uses get_cycles
    in a number of modules.

    Reported-by: Guenter Roeck
    Signed-off-by: Herbert Xu

    Herbert Xu
     

03 Jun, 2015

2 commits


28 May, 2015

2 commits


22 May, 2015

1 commit

  • Multitheaded tests showed that the icv buffer in the current ghash
    implementation is not handled correctly. A move of this working ghash
    buffer value to the descriptor context fixed this. Code is tested and
    verified with an multithreaded application via af_alg interface.

    Cc: stable@vger.kernel.org
    Signed-off-by: Harald Freudenberger
    Signed-off-by: Gerald Schaefer
    Reported-by: Herbert Xu
    Signed-off-by: Herbert Xu

    Harald Freudenberger
     

18 May, 2015

3 commits


13 May, 2015

1 commit


11 May, 2015

5 commits

  • Si5351 clock generator on CuBox uses XTAL as clock reference, name the
    clock phandle accordingly.

    Signed-off-by: Sebastian Hesselbarth

    Sebastian Hesselbarth
     
  • This trims off a couple of instructions of the total size of the
    core AES transform by reordering the final branch in the AES-192
    code path with the rounds that are performed regardless of whether
    the branch is taken or not. Other than the slight size reduction,
    this has no performance benefit.

    Fix up a comment regarding the prototype of this function while
    we're at it.

    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Herbert Xu

    Ard Biesheuvel
     
  • This replaces the SHA-512 NEON module with the faster and more
    versatile implementation from the OpenSSL project. It consists
    of both a NEON and a generic ASM version of the core SHA-512
    transform, where the NEON version reverts to the ASM version
    when invoked in non-process context.

    This patch is based on the OpenSSL upstream version b1a5d1c65208
    of sha512-armv4.pl, which can be found here:

    https://git.openssl.org/gitweb/?p=openssl.git;h=b1a5d1c65208

    Performance relative to the generic implementation (measured
    using tcrypt.ko mode=306 sec=1 running on a Cortex-A57 under
    KVM):

    input size block size asm neon old neon

    16 16 1.39 2.54 2.21
    64 16 1.32 2.33 2.09
    64 64 1.38 2.53 2.19
    256 16 1.31 2.28 2.06
    256 64 1.38 2.54 2.25
    256 256 1.40 2.77 2.39
    1024 16 1.29 2.22 2.01
    1024 256 1.40 2.82 2.45
    1024 1024 1.41 2.93 2.53
    2048 16 1.33 2.21 2.00
    2048 256 1.40 2.84 2.46
    2048 1024 1.41 2.96 2.55
    2048 2048 1.41 2.98 2.56
    4096 16 1.34 2.20 1.99
    4096 256 1.40 2.84 2.46
    4096 1024 1.41 2.97 2.56
    4096 4096 1.41 3.01 2.58
    8192 16 1.34 2.19 1.99
    8192 256 1.40 2.85 2.47
    8192 1024 1.41 2.98 2.56
    8192 4096 1.41 2.71 2.59
    8192 8192 1.51 3.51 2.69

    Acked-by: Jussi Kivilinna
    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Herbert Xu

    Ard Biesheuvel
     
  • Add the asm ICSWX and ICSWEPX opcodes. Add definitions for the
    Coprocessor Request structures needed to use the icswx calls to
    coprocessors. Add icswx() function to perform the ICSWX asm
    using the provided Coprocessor Command Word value and
    Coprocessor Request Block structure.

    This is required for communication with the NX-842 coprocessor on
    a PowerNV system.

    Signed-off-by: Dan Streetman
    Signed-off-by: Herbert Xu

    Dan Streetman
     
  • Export the of_get_ibm_chip_id() function. This will be used by the
    PowerNV NX-842 driver.

    Signed-off-by: Dan Streetman
    Signed-off-by: Herbert Xu

    Dan Streetman
     

07 May, 2015

3 commits


02 May, 2015

1 commit

  • Whereas for Armada 370 and XP the main PLL frequency was 2GHz for the
    Armada 375, 38x and 39x, the frequency is 1GHz. When writing support
    for these last SoCs, there was no official value for the PLL. Now that
    we have it, this patch fixes it in the device tree.

    This value is currently only used by the NAND driver for the setting
    the NAND timing. Fortunately it is not actually used: all the mainline
    board with a NAND flash comes with a NAND device tree node using the
    "marvell,nand-keep-config" property. With this property the timings
    are not modified in the kernel driver and are kept from the
    bootloader.

    Signed-off-by: Gregory CLEMENT
    Acked-by: Andrew Lunn
    Acked-by: Marcin Wojtas

    Gregory CLEMENT
     

27 Apr, 2015

7 commits

  • There is no crystal connected to the internal RTC on the Open Block
    AX3. So let's disable it in order to prevent the kernel probing the
    driver uselessly. Eventually this patches removes the following
    warning message from the boot log:
    "rtc-mv d0010300.rtc: internal RTC not ticking"

    Acked-by: Andrew Lunn
    Signed-off-by: Gregory CLEMENT
    Cc: # v3.8 +

    Gregory CLEMENT
     
  • AMD CPUs don't reinitialize the SS descriptor on SYSRET, so SYSRET with
    SS == 0 results in an invalid usermode state in which SS is apparently
    equal to __USER_DS but causes #SS if used.

    Work around the issue by setting SS to __KERNEL_DS __switch_to, thus
    ensuring that SYSRET never happens with SS set to NULL.

    This was exposed by a recent vDSO cleanup.

    Fixes: e7d6eefaaa44 x86/vdso32/syscall.S: Do not load __USER32_DS to %ss
    Signed-off-by: Andy Lutomirski
    Cc: Peter Anvin
    Cc: Borislav Petkov
    Cc: Denys Vlasenko
    Cc: Brian Gerst
    Signed-off-by: Linus Torvalds

    Andy Lutomirski
     
  • Pull fourth vfs update from Al Viro:
    "d_inode() annotations from David Howells (sat in for-next since before
    the beginning of merge window) + four assorted fixes"

    * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
    RCU pathwalk breakage when running into a symlink overmounting something
    fix I_DIO_WAKEUP definition
    direct-io: only inc/dec inode->i_dio_count for file systems
    fs/9p: fix readdir()
    VFS: assorted d_backing_inode() annotations
    VFS: fs/inode.c helpers: d_inode() annotations
    VFS: fs/cachefiles: d_backing_inode() annotations
    VFS: fs library helpers: d_inode() annotations
    VFS: assorted weird filesystems: d_inode() annotations
    VFS: normal filesystems (and lustre): d_inode() annotations
    VFS: security/: d_inode() annotations
    VFS: security/: d_backing_inode() annotations
    VFS: net/: d_inode() annotations
    VFS: net/unix: d_backing_inode() annotations
    VFS: kernel/: d_inode() annotations
    VFS: audit: d_backing_inode() annotations
    VFS: Fix up some ->d_inode accesses in the chelsio driver
    VFS: Cachefiles should perform fs modifications on the top layer only
    VFS: AF_UNIX sockets should call mknod on the top layer only

    Linus Torvalds
     
  • Pull crypto fixes from Herbert Xu:
    "This push fixes a build problem with img-hash under non-standard
    configurations and a serious regression with sha512_ssse3 which can
    lead to boot failures"

    * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
    crypto: img-hash - CRYPTO_DEV_IMGTEC_HASH should depend on HAS_DMA
    crypto: x86/sha512_ssse3 - fixup for asm function prototype change

    Linus Torvalds
     
  • Pull arch/cris updates from Jesper Nilsson:
    "Some much needed love for the CRIS-port.

    There's a bunch of changes this time, giving the CRISv32 port a bit of
    modern makeover with device-tree, irq domain and gpiolib support, and
    more switchover to generic frameworks.

    Some small fixes and removal of the theoretical SMP support brings up
    the rear"

    * tag 'cris-for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/jesper/cris:
    cris: fix integer overflow in ELF_ET_DYN_BASE
    CRISv32: use GENERIC_SCHED_CLOCK
    CRISv32: use MMIO clocksource
    CRISv32: use generic clockevents
    CRIS: use generic headers via Kbuild
    CRIS: use generic cmpxchg.h
    CRIS: use generic atomic.h
    CRIS: use generic atomic bitops
    CRISv10: remove redundant macros from system.h
    CRIS: remove SMP code
    CRISv32: don't enable irqs in INIT_THREAD
    CRISv32: handle multiple signals
    CRISv32: prevent bogus restarts on sigreturn
    CRISv32: don't attempt syscall restart on irq exit
    Add binding documentation for CRIS
    CRIS: add Axis 88 board device tree
    CRISv32: add device tree support
    CRISv32: add irq domains support
    CRIS: enable GPIOLIB

    Linus Torvalds
     
  • Pull powerpc fixes from Michael Ellerman:

    - fix for mm_dec_nr_pmds() from Scott.

    - fixes for oopses seen with KVM + THP from Aneesh.

    - build fixes from Aneesh & Shreyas.

    * tag 'powerpc-4.1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux:
    powerpc/mm: Fix build error with CONFIG_PPC_TRANSACTIONAL_MEM disabled
    powerpc/kvm: Fix ppc64_defconfig + PPC_POWERNV=n build error
    powerpc/mm/thp: Return pte address if we find trans_splitting.
    powerpc/mm/thp: Make page table walk safe against thp split/collapse
    KVM: PPC: Remove page table walk helpers
    KVM: PPC: Use READ_ONCE when dereferencing pte_t pointer
    powerpc/hugetlb: Call mm_dec_nr_pmds() in hugetlb_free_pmd_range()

    Linus Torvalds
     
  • Pull second batch of KVM changes from Paolo Bonzini:
    "This mostly includes the PPC changes for 4.1, which this time cover
    Book3S HV only (debugging aids, minor performance improvements and
    some cleanups). But there are also bug fixes and small cleanups for
    ARM, x86 and s390.

    The task_migration_notifier revert and real fix is still pending
    review, but I'll send it as soon as possible after -rc1"

    * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (29 commits)
    KVM: arm/arm64: check IRQ number on userland injection
    KVM: arm: irqfd: fix value returned by kvm_irq_map_gsi
    KVM: VMX: Preserve host CR4.MCE value while in guest mode.
    KVM: PPC: Book3S HV: Use msgsnd for signalling threads on POWER8
    KVM: PPC: Book3S HV: Translate kvmhv_commence_exit to C
    KVM: PPC: Book3S HV: Streamline guest entry and exit
    KVM: PPC: Book3S HV: Use bitmap of active threads rather than count
    KVM: PPC: Book3S HV: Use decrementer to wake napping threads
    KVM: PPC: Book3S HV: Don't wake thread with no vcpu on guest IPI
    KVM: PPC: Book3S HV: Get rid of vcore nap_count and n_woken
    KVM: PPC: Book3S HV: Move vcore preemption point up into kvmppc_run_vcpu
    KVM: PPC: Book3S HV: Minor cleanups
    KVM: PPC: Book3S HV: Simplify handling of VCPUs that need a VPA update
    KVM: PPC: Book3S HV: Accumulate timing information for real-mode code
    KVM: PPC: Book3S HV: Create debugfs file for each guest's HPT
    KVM: PPC: Book3S HV: Add ICP real mode counters
    KVM: PPC: Book3S HV: Move virtual mode ICP functions to real-mode
    KVM: PPC: Book3S HV: Convert ICS mutex lock to spin lock
    KVM: PPC: Book3S HV: Add guest->host real mode completion counters
    KVM: PPC: Book3S HV: Add helpers for lock/unlock hpte
    ...

    Linus Torvalds
     

26 Apr, 2015

1 commit


25 Apr, 2015

1 commit

  • Pull slave-dmaengine updates from Vinod Koul:

    - new drivers for:
    - Ingenic JZ4780 controller
    - APM X-Gene controller
    - Freescale RaidEngine device
    - Renesas USB Controller

    - remove device_alloc_chan_resources dummy handlers

    - sh driver cleanups for peri peri and related emmc and asoc patches
    as well

    - fixes and enhancements spread over the drivers

    * 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (59 commits)
    dmaengine: dw: don't prompt for DW_DMAC_CORE
    dmaengine: shdmac: avoid unused variable warnings
    dmaengine: fix platform_no_drv_owner.cocci warnings
    dmaengine: pch_dma: fix memory leak on failure path in pch_dma_probe()
    dmaengine: at_xdmac: unlock spin lock before return
    dmaengine: xgene: devm_ioremap() returns NULL on error
    dmaengine: xgene: buffer overflow in xgene_dma_init_channels()
    dmaengine: usb-dmac: Fix dereferencing freed memory 'desc'
    dmaengine: sa11x0: report slave capabilities to upper layers
    dmaengine: vdma: Fix compilation warnings
    dmaengine: fsl_raid: statify fsl_re_chan_probe
    dmaengine: Driver support for FSL RaidEngine device.
    dmaengine: xgene_dma_init_ring_mngr() can be static
    Documentation: dma: Add documentation for the APM X-Gene SoC DMA device DTS binding
    arm64: dts: Add APM X-Gene SoC DMA device and DMA clock DTS nodes
    dmaengine: Add support for APM X-Gene SoC DMA engine driver
    dmaengine: usb-dmac: Add Renesas USB DMA Controller (USB-DMAC) driver
    dmaengine: renesas,usb-dmac: Add device tree bindings documentation
    dmaengine: edma: fixed wrongly initialized data parameter to the edma callback
    dmaengine: ste_dma40: fix implicit conversion
    ...

    Linus Torvalds
     

24 Apr, 2015

10 commits

  • Pull second batch of devicetree updates from Rob Herring:
    "As Grant mentioned in the first devicetree pull request, here is the
    2nd batch of DT changes for 4.1. The main remaining item here is the
    endianness bindings and related 8250 driver support.

    - DT endianness specification bindings

    - big-endian 8250 serial support

    - DT overlay unittest updates

    - various DT doc updates

    - compile fixes for OF_IRQ=n"

    * tag 'devicetree-for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
    frv: add io{read,write}{16,32}be functions
    mn10300: add io{read,write}{16,32}be functions
    Documentation: DT bindings: add doc for Altera's SoCFPGA platform
    of: base: improve of_get_next_child() kernel-doc
    Doc: dt: arch_timer: discourage clock-frequency use
    of: unittest: overlay: Keep track of created overlays
    of/fdt: fix allocation size for device node path
    serial: of_serial: Support big-endian register accesses
    serial: 8250: Add support for big-endian MMIO accesses
    of: Document {little,big,native}-endian bindings
    of/fdt: Add endianness helper function for early init code
    of: Add helper function to check MMIO register endianness
    of/fdt: Remove "reg" data prints from early_init_dt_scan_memory
    of: add vendor prefix for Artesyn
    of: Add dummy of_irq_to_resource_table() for IRQ_OF=n
    of: OF_IRQ should depend on IRQ_DOMAIN

    Linus Torvalds
     
  • Pull initial ACPI support for arm64 from Will Deacon:
    "This series introduces preliminary ACPI 5.1 support to the arm64
    kernel using the "hardware reduced" profile. We don't support any
    peripherals yet, so it's fairly limited in scope:

    - MEMORY init (UEFI)

    - ACPI discovery (RSDP via UEFI)

    - CPU init (FADT)

    - GIC init (MADT)

    - SMP boot (MADT + PSCI)

    - ACPI Kconfig options (dependent on EXPERT)

    ACPI for arm64 has been in development for a while now and hardware
    has been available that can boot with either FDT or ACPI tables. This
    has been made possible by both changes to the ACPI spec to cater for
    ARM-based machines (known as "hardware-reduced" in ACPI parlance) but
    also a Linaro-driven effort to get this supported on top of the Linux
    kernel. This pull request is the result of that work.

    These changes allow us to initialise the CPUs, interrupt controller,
    and timers via ACPI tables, with memory information and cmdline coming
    from EFI. We don't support a hybrid ACPI/FDT scheme. Of course,
    there is still plenty of work to do (a serial console would be nice!)
    but I expect that to happen on a per-driver basis after this core
    series has been merged.

    Anyway, the diff stat here is fairly horrible, but splitting this up
    and merging it via all the different subsystems would have been
    extremely painful. Instead, we've got all the relevant Acks in place
    and I've not seen anything other than trivial (Kconfig) conflicts in
    -next (for completeness, I've included my resolution below). Nearly
    half of the insertions fall under Documentation/.

    So, we'll see how this goes. Right now, it all depends on EXPERT and
    I fully expect people to use FDT by default for the immediate future"

    * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (31 commits)
    ARM64 / ACPI: make acpi_map_gic_cpu_interface() as void function
    ARM64 / ACPI: Ignore the return error value of acpi_map_gic_cpu_interface()
    ARM64 / ACPI: fix usage of acpi_map_gic_cpu_interface
    ARM64: kernel: acpi: honour acpi=force command line parameter
    ARM64: kernel: acpi: refactor ACPI tables init and checks
    ARM64: kernel: psci: let ACPI probe PSCI version
    ARM64: kernel: psci: factor out probe function
    ACPI: move arm64 GSI IRQ model to generic GSI IRQ layer
    ARM64 / ACPI: Don't unflatten device tree if acpi=force is passed
    ARM64 / ACPI: additions of ACPI documentation for arm64
    Documentation: ACPI for ARM64
    ARM64 / ACPI: Enable ARM64 in Kconfig
    XEN / ACPI: Make XEN ACPI depend on X86
    ARM64 / ACPI: Select ACPI_REDUCED_HARDWARE_ONLY if ACPI is enabled on ARM64
    clocksource / arch_timer: Parse GTDT to initialize arch timer
    irqchip: Add GICv2 specific ACPI boot support
    ARM64 / ACPI: Introduce ACPI_IRQ_MODEL_GIC and register device's gsi
    ACPI / processor: Make it possible to get CPU hardware ID via GICC
    ACPI / processor: Introduce phys_cpuid_t for CPU hardware ID
    ARM64 / ACPI: Parse MADT for SMP initialization
    ...

    Linus Torvalds
     
  • Pull ARM fixes from Russell King:
    "A few fixes for the recently merged development updates:

    - the update to convert a code branch in the procinfo structure
    forgot to update the nommu code.

    - VDSO only supported for V7 CPUs and later.

    - VDSO build creates files which should be ignored by git but are not.

    - ensure that make arch/arm/vdso/ doesn't build if it isn't enabled"

    * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
    ARM: 8344/1: VDSO: honor CONFIG_VDSO in Makefile
    ARM: 8343/1: VDSO: add build artifacts to .gitignore
    ARM: Fix nommu booting
    ARM: 8342/1: VDSO: depend on CPU_V7

    Linus Torvalds
     
  • Pull arch/nios2 updates from Ley Foon Tan:

    - update cache management code

    - rework trap handler with new define trap #.

    - fix on check header warning.

    * tag 'nios2-v4.1-rc1' of git://git.rocketboards.org/linux-socfpga-next:
    nios2: rework cache
    nios2: Add types.h header required for __u32 type
    nios2: rework trap handler
    nios2: remove end address checking for initda

    Linus Torvalds
     
  • …realmz6/blackfin-linux

    Pull blackfin updates from Steven Miao.

    * tag 'blackfin-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/realmz6/blackfin-linux:
    eth: bf609 eth clock: add pclk clock for stmmac driver probe
    blackfin: Wire up missing syscalls
    arch: blackfin: kernel: kgdb: Remove unused function
    dma: fix build error after update to v3.19
    blackfin: io: define __raw_readx/writex with bfin_readx/writex
    bf609: add resources for lcd nl8048
    pm: sometimes wake up from suspend to RAM would fail
    debug-mmrs: Eliminate all traces of the USB_PHY_TEST MMR
    bf609: remove softswitch i2c configuration from adv7842 and adv7511 platform data
    bf609: add platform data for soft switch devices on the video extenders
    bf609: enable soft switch gpio driver by default
    bf609: add gpio soft switch platform data for mcp23017 i2c devices
    bf609: use new SND_BF6XX_PCM to choose audio pcm driver
    bug[220] kgdb: change the smp cross core function entry
    arch: blackfin: kernel: setup.c: Cleaning up missing null-terminate in conjunction with strncpy
    blackfin: defconfigs: cleanup unused CONFIG_MTD_CHAR, add MTD_SPI_NOR for BF537-STAMP

    Linus Torvalds
     
  • Pull Metag architecture updates from James Hogan:
    "Just the one change for v4.1-rc1. A minor cleanup of copy_thread()"

    * tag 'metag-for-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/metag:
    metag: copy_thread(): rename 'arg' argument to 'kthread_arg'

    Linus Torvalds
     
  • Pull ARC updates from Vineet Gupta:

    - perf fixes/improvements

    - misc cleanups

    * tag 'arc-4.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
    ARC: perf: don't add code for impossible case
    ARC: perf: Rename DT binding to not confuse with power mgmt
    ARC: perf: add user space attribution in callchains
    ARC: perf: Add kernel callchain support
    ARC: perf: support cache hit/miss ratio
    ARC: perf: Add some comments/debug stuff
    ARC: perf: make @arc_pmu static global
    ARC: mem init spring cleaning - No functional changes
    ARC: Fix RTT boot printing
    ARC: fold __builtin_constant_p() into test_bit()
    ARC: rename unhandled exception handler
    ARC: cosmetic: Remove unused ECR bitfield masks
    ARC: Fix WRITE_BCR
    ARC: [nsimosci] Update defconfig
    arc: copy_thread(): rename 'arg' argument to 'kthread_arg'

    Linus Torvalds
     
  • Commit cae2a173fe94 ("x86: clean up/fix 'copy_in_user()' tail zeroing")
    fixed the failure case tail zeroing of one special case of the x86-64
    generic user-copy routine, namely when used for the user-to-user case
    ("copy_in_user()").

    But in the process it broke an even more unusual case: using the user
    copy routine for kernel-to-kernel copying.

    Now, normally kernel-kernel copies are obviously done using memcpy(),
    but we have a couple of special cases when we use the user-copy
    functions. One is when we pass a kernel buffer to a regular user-buffer
    routine, using set_fs(KERNEL_DS). That's a "normal" case, and continued
    to work fine, because it never takes any faults (with the possible
    exception of a silent and successful vmalloc fault).

    But Jan Beulich pointed out another, very unusual, special case: when we
    use the user-copy routines not because it's a path that expects a user
    pointer, but for a couple of ftrace/kgdb cases that want to do a kernel
    copy, but do so using "unsafe" buffers, and use the user-copy routine to
    gracefully handle faults. IOW, for probe_kernel_write().

    And that broke for the case of a faulting kernel destination, because we
    saw the kernel destination and wanted to try to clear the tail of the
    buffer. Which doesn't work, since that's what faults.

    This only triggers for things like kgdb and ftrace users (eg trying
    setting a breakpoint on read-only memory), but it's definitely a bug.
    The fix is to not compare against the kernel address start (TASK_SIZE),
    but instead use the same limits "access_ok()" uses.

    Reported-and-tested-by: Jan Beulich
    Cc: stable@vger.kernel.org # 4.0
    Signed-off-by: Linus Torvalds

    Linus Torvalds
     
  • Patch e68410ebf626 ("crypto: x86/sha512_ssse3 - move SHA-384/512
    SSSE3 implementation to base layer") changed the prototypes of the
    core asm SHA-512 implementations so that they are compatible with
    the prototype used by the base layer.

    However, in one instance, the register that was used for passing the
    input buffer was reused as a scratch register later on in the code,
    and since the input buffer param changed places with the digest param
    -which needs to be written back before the function returns- this
    resulted in the scratch register to be dereferenced in a memory write
    operation, causing a GPF.

    Fix this by changing the scratch register to use the same register as
    the input buffer param again.

    Fixes: e68410ebf626 ("crypto: x86/sha512_ssse3 - move SHA-384/512 SSSE3 implementation to base layer")
    Reported-By: Bobby Powers
    Tested-By: Bobby Powers
    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Herbert Xu

    Ard Biesheuvel
     
  • - flush dcache before flush instruction cache
    - remork update_mmu_cache and flush_dcache_page
    - add shmparam.h

    Signed-off-by: Ley Foon Tan

    Ley Foon Tan