17 May, 2019
1 commit
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Pull ARM SoC-related driver updates from Olof Johansson:
"Various driver updates for platforms and a couple of the small driver
subsystems we merge through our tree:Among the larger pieces:
- Power management improvements for TI am335x and am437x (RTC
suspend/wake)- Misc new additions for Amlogic (socinfo updates)
- ZynqMP FPGA manager
- Nvidia improvements for reset/powergate handling
- PMIC wrapper for Mediatek MT8516
- Misc fixes/improvements for ARM SCMI, TEE, NXP i.MX SCU drivers"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits)
soc: aspeed: fix Kconfig
soc: add aspeed folder and misc drivers
spi: zynqmp: Fix build break
soc: imx: Add generic i.MX8 SoC driver
MAINTAINERS: Update email for Qualcomm SoC maintainer
memory: tegra: Fix a typos for "fdcdwr2" mc client
Revert "ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+"
memory: tegra: Replace readl-writel with mc_readl-mc_writel
memory: tegra: Fix integer overflow on tick value calculation
memory: tegra: Fix missed registers values latching
ARM: tegra: cpuidle: Handle tick broadcasting within cpuidle core on Tegra20/30
optee: allow to work without static shared memory
soc/tegra: pmc: Move powergate initialisation to probe
soc/tegra: pmc: Remove reset sysfs entries on error
soc/tegra: pmc: Fix reset sources and levels
soc: amlogic: meson-gx-pwrc-vpu: Add support for G12A
soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask
fpga manager: Adding FPGA Manager support for Xilinx zynqmp
dt-bindings: fpga: Add bindings for ZynqMP fpga driver
firmware: xilinx: Add fpga API's
...
26 Apr, 2019
17 commits
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Many nvmem providers are not very keen on having default sysfs
nvmem entry, as most of the usecases for them are inside kernel
itself. And in some cases read/writes to some areas in nvmem are
restricted and trapped at secure monitor level, so accessing them
from userspace would result in board reboots.This patch adds new NVMEM_SYSFS Kconfig to make binary sysfs entry
an optional one. This provision will give more flexibility to users.
This patch also moves existing sysfs code to a new file so that its
not compiled in when its not really required.Signed-off-by: Srinivas Kandagatla
Reviewed-by: Mika Westerberg
Reviewed-by: Gaurav Kohli
Tested-by: Gaurav Kohli
Signed-off-by: Greg Kroah-Hartman -
Add support for H6's SID controller. It supports 4K-bit
EFUSE, bigger than before.Signed-off-by: Yangtao Li
Acked-by: Maxime Ripard
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Updates license to use SPDX-License-Identifier.
Acked-by: Maxime Ripard
Signed-off-by: Yangtao Li
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Use the new helper devm_platform_ioremap_resource() which wraps the
platform_get_resource() and devm_ioremap_resource() together, to
simplify the code.Signed-off-by: Anson Huang
Reviewed-by: Mukesh Ojha
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Use the new helper devm_platform_ioremap_resource() which wraps the
platform_get_resource() and devm_ioremap_resource() together, to
simplify the code.Signed-off-by: Anson Huang
Reviewed-by: Mukesh Ojha
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Use the new helper devm_platform_ioremap_resource() which wraps the
platform_get_resource() and devm_ioremap_resource() together, to
simplify the code.Signed-off-by: Anson Huang
Reviewed-by: Mukesh Ojha
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
When the bit_offset in the cell is zero, the pointer to the msb will
not be properly initialized (ie, will still be pointing to the first
byte in the buffer).This being the case, if there are bits to clear in the msb, those will
be left untouched while the mask will incorrectly clear bit positions
on the first byte.This commit also makes sure that any byte unused in the cell is
cleared.Signed-off-by: Jorge Ramirez-Ortiz
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Add nvmem_cell_read_u16() helper to ease read of an u16 value on consumer
side. This is inspired by nvmem_cell_read_u32() function.
This helper is useful on stm32 that has 16 bits data cells stored in non
volatile memory.Signed-off-by: Fabrice Gasnier
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
On STM32MP15, OTP area may be read/written by using BSEC (boot, security
and OTP control). BSEC registers set is composed of various regions, among
which control registers and OTP shadow registers.
Secure monitor calls are involved in this process to allow (or deny)
access to the full range of OTP data.
This adds support for reading and writing OTP data using SMC services.
Data content can be aligned on 16-bits or 8-bits. Then take care of it,
since BSEC data is 32-bits wide.Signed-off-by: Fabrice Gasnier
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Add a read only nvmem driver for STM32 factory-programmed memory area
(on-chip non-volatile storage).Signed-off-by: Fabrice Gasnier
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
The device tree binding already lists compatible strings for these two
SoCs. They don't have the defect as seen on the H3, and the size and
register layout is the same as the A64. Furthermore, the driver does
not include nvmem cell definitions.Add support for these two compatible strings, re-using the config for
the A64.Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Originally the SID e-fuses were thought to be in big-endian format.
Later sources show that they are in fact native or little-endian.
The most compelling evidence is the thermal sensor calibration data,
which is a set of one to three 16-bit values. In native-endian they
are in 16-bit cells with increasing offsets, whereas with big-endian
they are in the wrong order, and a gap with no data will show if there
are one or three cells.Switch to a native endian representation for the nvmem device. For the
H3, the register read-out method was already returning data in native
endian. This only affects the other SoCs.Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
The sunxi_sid driver currently uses a statically allocated nvmem_config
structure that is updated at probe time. This is sub-optimal as it
limits the driver to one instance, and also takes up space even if the
device is not present.Modify the driver to allocate the nvmem_config structure at probe time,
plugging in the desired parameters along the way.Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
SID cells are 32-bit aligned, and a multiple of 32 bits in length. The
only outlier is the thermal sensor calibration data, which is 16 bits
per sensor. However a whole 64 bits is allocated for this purpose, so
we could consider it conforming to the rule above.Also, the register read-out method assumes native endian, unlike the
direct MMIO method, which assumes big endian. Thus no endian conversion
is involved.Under these assumptions, the register read-out method can be slightly
optimized. Instead of reading one word then discarding 3 bytes, read
the whole word directly into the buffer. However, for reads under 4
bytes or trailing bytes, we still use a scratch buffer to extract the
requested bytes.We could go one step further if .word_size was 4, but changing that
would affect the sysfs interface's behavior.Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Since the reg_read callbacks already support arbitrary, but 4-byte
aligned. offsets and lengths into the SID, there is no need for another
for loop just to use it to read 1 byte at a time.Read out the whole SID block in one go.
Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
The i.MX OCOTP controller is used in numerous Freescale/NXP
SoCs from the MXC family, so the strict dependency on the
i.MX6 SoC is too narrow. Broaden it to cover all the MXC
familiy members.Signed-off-by: Lucas Stach
Reviewed-by: Abel Vesa
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
The i.MX8MQ uses the same OCOTP block as the i.MX7D, but with
fourfold increase in fuse banks.Signed-off-by: Lucas Stach
Reviewed-by: Abel Vesa
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
18 Mar, 2019
1 commit
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Driver needs ZynqMP firmware interface to call EEMI
APIs. In case firmware is not ready, dependent drivers
should wait until the firmware is ready.Signed-off-by: Rajan Vaja
Signed-off-by: Jolly Shah
Signed-off-by: Michal Simek
07 Mar, 2019
1 commit
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Pull char/misc driver updates from Greg KH:
"Here is the big char/misc driver patch pull request for 5.1-rc1.The largest thing by far is the new habanalabs driver for their AI
accelerator chip. For now it is in the drivers/misc directory but will
probably move to a new directory soon along with other drivers of this
type.Other than that, just the usual set of individual driver updates and
fixes. There's an "odd" merge in here from the DRM tree that they
asked me to do as the MEI driver is starting to interact with the i915
driver, and it needed some coordination. All of those patches have
been properly acked by the relevant subsystem maintainers.All of these have been in linux-next with no reported issues, most for
quite some time"* tag 'char-misc-5.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (219 commits)
habanalabs: adjust Kconfig to fix build errors
habanalabs: use %px instead of %p in error print
habanalabs: use do_div for 64-bit divisions
intel_th: gth: Fix an off-by-one in output unassigning
habanalabs: fix little-endiancpu conversion warnings
habanalabs: use NULL to initialize array of pointers
habanalabs: fix little-endiancpu conversion warnings
habanalabs: soft-reset device if context-switch fails
habanalabs: print pointer using %p
habanalabs: fix memory leak with CBs with unaligned size
habanalabs: return correct error code on MMU mapping failure
habanalabs: add comments in uapi/misc/habanalabs.h
habanalabs: extend QMAN0 job timeout
habanalabs: set DMA0 completion to SOB 1007
habanalabs: fix validation of WREG32 to DMA completion
habanalabs: fix mmu cache registers init
habanalabs: disable CPU access on timeouts
habanalabs: add MMU DRAM default page mapping
habanalabs: Dissociate RAZWI info from event types
misc/habanalabs: adjust Kconfig to fix build errors
...
19 Feb, 2019
1 commit
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blocking_notifier_call_chain() returns the value returned by the last
registered callback. A positive return value doesn't indicate an error
and an nvmem device should correctly register irrespective of any
notifier callback failures. Drop the retval check.Fixes: bee1138bea15 ("nvmem: add a notifier chain")
Cc: stable@vger.kernel.org
Signed-off-by: Bartosz Golaszewski
Acked-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
05 Feb, 2019
1 commit
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This patch adds zynqmp nvmem firmware driver to access the
SoC revision information from the hardware register.Signed-off-by: Nava kishore Manne
Acked-by: Srinivas Kandagatla
Signed-off-by: Michal Simek
03 Feb, 2019
1 commit
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The imx-ocotp nvmem driver supports the i.MX 7D SoC too. Allow to select
the imx-ocotp driver even if only the i.MX 7D SoC has been selected.Fixes: 711d45477931 ("nvmem: octop: Add i.MX7D support")
Signed-off-by: Stefan Agner
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
31 Jan, 2019
11 commits
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Once the correct cell has been found there is no need to continue
iterating, just stop there. While at it replace the goto used to leave
the loop with simple break statements.Signed-off-by: Alban Bedel
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
__nvmem_device_get() make use of bus_find_device() to get the relevant
device and this function increase the reference count of the device
found, however this is not accounted for anywhere. Fix
__nvmem_device_get() and __nvmem_device_put() to properly release this
reference count.Signed-off-by: Alban Bedel
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
In nvmem_device_get(), when the device lookup fails with DT it
currently fallback on nvmem_find() which is wrong for two reasons.
First nvmem_find() return NULL when nothing is found instead of an
ERR_PTR. But nvmem_find() also just lookup the device, it doesn't
reference the module and increment the reference count like it is done
in the DT path.To fix this we replace the call to nvmem_find() with a call to
__nvmem_device_get() which does all the referencing and return a
proper ERR_PTR in case of error.Signed-off-by: Alban Bedel
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
of_nvmem_device_get() would crash if NULL was passed as a connection
ID. Rework this to use the usual sementic of assuming the first
connection when no connection ID is given.Furthermore of_nvmem_device_get() would return -EINVAL when it failed
to resolve the connection, making it impossible to properly implement
an optional connection. Return -ENOENT instead to let the caller know
that the connection doesn't exists.Signed-off-by: Alban Bedel
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
If the cell list is not empty and nvmem_find_cell_by_node/name() is
called for a cell that is not present in the list they will return an
invalid pointer instead of NULL. This happen because
list_for_each_entry() stop once it reach the list head again, but as
the list head is not contained in a struct nvmem_cell the iteration
variable then contains an invalid value.This is easily solved by using a variable to iterate over the list and
one to return the cell found.Signed-off-by: Alban Bedel
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
of_nvmem_cell_get() should return -ENOENT when a cell isn't defined,
otherwise callers can't distinguish between a missing cell and other
errors.Signed-off-by: Alban Bedel
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
If no write callback is given the device should be marked as read-only.
While at it also move from a bit or to a logical or as that is a logical
expression.Signed-off-by: Alban Bedel
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
In comparision to the i.MX6UL the lower cost variants i.MX6ULL/ULZ only
supports 8 OTP banks a 8 words.Signed-off-by: Stefan Wahren
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
i.MX7ULP is a new SoC of i.MX family which has 8 kbit eFuse OTP,
enable ocotp driver support for this SoC.Signed-off-by: Anson Huang
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Add ACPI support to bcm ocotp driver
This patch is based on Linux-4.20-rc7.
Signed-off-by: Srinath Mannam
Acked-by: Scott Branden
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
The Spreadtrum SC27XX efuse data are organized by blocks and each block
contains 2 bytes data. Moreover the nvmem core always pass the offset
in byte to the controller, so we should change the offset in byte to
the correct block index and block offset to read the data.Signed-off-by: Freeman Liu
Signed-off-by: Baolin Wang
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
06 Dec, 2018
5 commits
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We want to add nvmem support for MTD. TI DaVinci is the first platform
that will be using it, but only in non-DT mode. In order not to
introduce any new interface to supporting of which we would have to
commit - add a new config option that tells nvmem not to use the DT
node of the parent device.This way we won't be creating nvmem devices corresponding with MTD
partitions defined in device tree. By default MTD will set this new
field to true.Once a set of bindings for MTD nvmem cells is agreed upon, we'll be
able to remove this option.Signed-off-by: Bartosz Golaszewski
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Since we put static variable to a header file it's copied to each module
that includes the header. But not all of them are actually using it.Move nvmem_type_str array to its only user to make a compiler happy:
In file included from include/linux/rtc.h:18,
from drivers/rtc/rtc-proc.c:15:
include/linux/nvmem-provider.h:29:27: warning: 'nvmem_type_str'
defined but not used [-Wunused-const-variable=]
static const char * const nvmem_type_str[] = {
^~~~~~~~~~~~~~Suggested-by: Alexandre Belloni
Suggested-by: Joe Perches
Cc: Srinivas Kandagatla
Signed-off-by: Andy Shevchenko
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Get and enable the peripheral clock required by the efuse device.
The driver has been handle to work without it so far because the
clock was left enabled by default but it won't be the case soon.Signed-off-by: Jerome Brunet
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Add an explicit error message when SM_EFUSE_USER_MAX command fails
Signed-off-by: Jerome Brunet
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman -
Add a type attribute so userspace is able to know how the data is stored as
this can help taking the correct decision when selecting which device to
use. This will also help program display the proper warnings when burning
fuses for example.Signed-off-by: Alexandre Belloni
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Greg Kroah-Hartman
12 Nov, 2018
1 commit
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NVMEM DT support seems to be totally broken after
commit e888d445ac33 ("nvmem: resolve cells from DT at registration time")
Fix this!Index used in of_nvmem_cell_get() to find cell is specific to
consumer, It can not be used for searching the cell in provider.
Use device_node instead of this to find the matching cell in device
tree case.Fixes: e888d445ac33 ("nvmem: resolve cells from DT at registration time")
Reported-by: Niklas Cassel
Signed-off-by: Srinivas Kandagatla
Tested-by: Niklas Cassel
Signed-off-by: Greg Kroah-Hartman