03 Apr, 2019
2 commits
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There are a few remaining drivers/staging/*/Makefile files that do not
have SPDX identifiers in them. Add the correct GPL-2.0 identifier to
them to make scanning tools happy.Reviewed-by: Mukesh Ojha
Signed-off-by: Greg Kroah-Hartman -
There are a few remaining drivers/staging/*/Kconfig files that do not
have SPDX identifiers in them. Add the correct GPL-2.0 identifier to
them to make scanning tools happy.Signed-off-by: Greg Kroah-Hartman
01 Apr, 2019
1 commit
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We want those fixes and this resolves an erofs merge conflict.
Signed-off-by: Greg Kroah-Hartman
18 Mar, 2019
2 commits
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Add depends on PCI for PCI_MT7621
Signed-off-by: Maxim Zhukov
Signed-off-by: Greg Kroah-Hartman -
Remove comparison to NULL in the if statement expression
to match the Linux Kernel coding style.
CHECK: Comparison to NULL could be written "res"Signed-off-by: Branden Bonaby
Signed-off-by: Greg Kroah-Hartman
19 Feb, 2019
5 commits
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Each enabled port is being checked in 'mt7621_pcie_enable_ports"
function calling 'mt7621_pcie_enable_port'. The return value for
this function on success is zero, so the check is reversed. Fix it.Fixes: 802a2f7b2fe3: staging: mt7621-pci: factor out 'mt7621_pcie_enable_port' function
Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
There is no need to write IO and memory space window Host PCI bridge
registers before doing anything else. Just use its default values which
should be ok.Signed-off-by: Sergio Paracuellos
Reviewed-by: NeilBrown
Signed-off-by: Greg Kroah-Hartman -
To properly follow kernel style replace spaces with tabs in comment
where link status bits are explained.Signed-off-by: Sergio Paracuellos
Reviewed-by: NeilBrown
Signed-off-by: Greg Kroah-Hartman -
There are two definitions which are not being used at all.
Remove them.Signed-off-by: Sergio Paracuellos
Reviewed-by: NeilBrown
Signed-off-by: Greg Kroah-Hartman -
There is still a reset line which is not being handled using reset_control
properly and just being accessing writing registers. Use reset_control
instead for pcie general reset line.Signed-off-by: Sergio Paracuellos
Reviewed-by: NeilBrown
Signed-off-by: Greg Kroah-Hartman
11 Feb, 2019
2 commits
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Some of the things included in driver's TODO file have
been properly achieved. Update file accordly.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Fix some space required coding style.
Signed-off-by: Guilherme Tadashi Maeoka
Signed-off-by: Greg Kroah-Hartman
18 Jan, 2019
1 commit
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These drivers can be useful on other MT76xx SoCs, which have compatible
peripherals. The drivers were selectable in Kconfig, but they were
quietly excluded from the build because the SOC_MT7621 chip was not
selected. So, make the Makefiles use the same flags as Kconfig for
these drivers.mt7621-dma and mt7621-dts are left alone because they truly do require
that SoC.I have personally confirmed that the mt7621-spi driver works on the
MT7688, which was what prompted this change.Cc: linux-kernel@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Cc: NeilBrown
Cc: sergio.paracuellos@gmail.com
Signed-off-by: George Hilliard
Signed-off-by: Greg Kroah-Hartman
15 Jan, 2019
1 commit
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Seting up ports to enable PCI_COMMAND_MASTER is using '0x4' as a
hardcore value and '0x4' also for PCI_COMMAND register instead
of use definitions from linux pci system headers. Replace both.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman
07 Jan, 2019
1 commit
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Phy part of this driver has been moved to a new 'pci-mt7621-phy' driver.
Change code to use kernel's generic phy API removing also no more need
moved code.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman
05 Dec, 2018
1 commit
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To avoid people reading this code being very confused, add a comment
clarifying the need for invert resets on some chip revisions.Suggested-by: Dan Carpenter
Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman
27 Nov, 2018
4 commits
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There is no clock driver for ralink mips and clk_enable
are no-ops for this architecture. This has been also tested
without using clocks and seems to work so avoid to use them
in this driver.Fixes: ad9c87e129d1: "staging: mt7621-pci: parse and init
port data from device tree"
Reported-by: NeilBrownSigned-off-by: Sergio Paracuellos
Tested-by: NeilBrown
Signed-off-by: Greg Kroah-Hartman -
Depending of chip revision reset lines are inverted. It is also
necessary to read PCIE_FTS_NUM register before enabling the phy.
Hence update the code to achieve this.Fixes: 745eeeac68d7 ("staging: mt7621-pci: factor out 'mt7621_pcie_enable_port' function")
Reported-by: NeilBrown
Signed-off-by: Sergio Paracuellos
Tested-by: NeilBrown
Signed-off-by: Greg Kroah-Hartman -
The sysctl register are already claimed by palmbus, so
pci fails to claim it. Device tree has been updated to not
use it at all with pcie. Update bindings documentation.Signed-off-by: Sergio Paracuellos
Tested-by: NeilBrown
Signed-off-by: Greg Kroah-Hartman -
The sysctl register are already claimed by palmbus, so
pci fails to claim it. The best way to access the sysc registers
is to use rt_sysc_[rwm]32().Fixes: 89e9f6e6adfc: staging: mt7621-pci: remap and use sysctl from device tree
Reported-by: NeilBrown
Signed-off-by: Sergio Paracuellos
Tested-by: NeilBrown
Signed-off-by: Greg Kroah-Hartman
12 Nov, 2018
20 commits
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This commit adds pci device tree bindings for the Mt7621 pci controller.
This is a temporal file included in staging driver directory and will be
moved to its correct location when this driver gets out of staging.Cc: Rob Herring
Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Function 'mt7621_pcie_init_ports' is never called in atomic context.
It calls mdelay() to busily wait, which is not necessary. mdelay()
can be replaced with msleep().Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Some clocks bits related code is in driver probe function and can
perfectly be moved into 'mt7621_pcie_init_ports' function which is
a more accurate place for it.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Function 'mt7621_pcie_enable_ports' tries to enable all PCI ports.
To make it more readable the single port initialization part has
been factor out into a new 'mt7621_pcie_enable_port' function.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Interrupt is being enabled in port initialization when the port phy
has not been initialized yet. Just enable the interrupt when the port
is being enabled which is a more accurate place for this.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
PCIE_PORT_LINKUP is defined and can be used to check if link is up
for each controller. Use it instead of use a hardcode value.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Driver is using gpio control instead of each port PERST_N
bit. Use PERST_N bit of each port cleaning all the ugly
gpio code in driver probe function.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Instead of use hardcoded values when calling 'rt_sysc_m32' for enabling
and disabling RALINK_PCIE_CLK_GEN and RALINK_PCIE_CLK_GEN1 create
some preprocessor definitions.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
There are some hardcoded values in the process for enabling and
disabling some stuff inside 'mt7621_pcie_enable_ports' function.
Create some preprocessor definitions to make code more readable.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
The RC FTS configuration is done using hardcoded registers
and bitshift operations. Make it a bit clean defining some
prepocessor definitions and simple macros.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Make some function definition changes in order to get all the
functions in the code with the same style.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
There is a comment at the beggining which has no sense at all.
Remove it.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Reorder a bit register definitions and some values into
logical groups adding some comments for each group. Also
unify all of register to use 16 bit in definitions instead
of having some with 16 bits and some with 8 bits.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
There are some preprocessor definition which are not being used at
all. Remove them cleaning the code a bit.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Instead of just inline this code in the probe driver function factor
out a new 'mt7621_pcie_init_ports' function to achieve this.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
'pcie_link_status' is a global variable which is being used as a
mask to know which virtual bridges are or not enabled. Instead of
this extract a new 'mt7621_pcie_init_virtual_bridges' function where
a similar local variable is used for the same task. This allow us to
properly configure the virtual PCI-PCI bridges in configuration
registers of the mt7621 pci controller. For a correct initiation of
which is connected use 'enabled' field of 'mt7621_pcie_port' struct.
With this change driver probe function gets a bit cleaner and readable.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Driver probe function check for a bit in 'pcie_link_status' for
enabling the pcie port or not. Instead of this add 'enabled' field
in 'mt7621_pcie_port' structure and check its value to achieve this
inside a new 'mt7621_pcie_enable_ports' function. The offsets for
the correct port are derived from the slot of the port. This field
'enabled' is properly initilized in 'mt7621_pcie_init_port'. Also
depending of the number of ports enabled we have to properly init
its registers taking into account that we will use virtual bridges
from zero to num_slots_enabled as follows:
- Only one enabled -> only enable virtual bridge 0.
- Two enabled -> enable virtual bridges 0 and 1.
- Three enabled -> enable virtual bridges 0, 1 and 2.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
checkpatch script is complaining about the use of printk instead
of use more proper dev_* kernel functions. Replace all of them
removing warnings.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
Chackpatch script is compalining about one comment which
is not following the kernel style. Fix it.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman -
There are some pointer read and writes which can be replaced
properly using sysctl registers readed from device tree. Remap
sysctl registers and replace in proper places.Signed-off-by: Sergio Paracuellos
Signed-off-by: Greg Kroah-Hartman