Eric Lee / smarc-fsl-linux-kernel

25 Aug, 2016

1 commit

  • 759fa9613   clk: vt8500: Migrate to clk_hw based registration APIs ... Browse Code »

    Now that we have clk_hw based provider APIs to register clks, we
    can get rid of struct clk pointers while registering clks in
    these drivers, allowing us to move closer to a clear split of
    consumer and provider clk APIs.

    Cc: Sebastian Hesselbarth
    Cc: Tony Prisk
    Signed-off-by: Stephen Boyd
    Signed-off-by: Stephen Boyd

    Stephen Boyd
     

21 Jun, 2016

2 commits

  • c03d795be   clk: vt8500: rework wm8650_find_pll_bits() ... Browse Code »

    PLL clock on WM8650 is calculated in the following way:

    M * parent [O1] => / P [O2] => / D [O3]

    Where O2 is 600MHz >= (M * parent) / P >= 300MHz.

    Current algorithm does not met this requirement, so that the
    function may return rates which are not supported by the hardware.

    This patch fixes the algorithm and simplifies the code, reducing
    the calculation time by ~10000 times (according to usermode app) by
    removing the nested loops.

    Signed-off-by: Roman Volkov
    Signed-off-by: Stephen Boyd

    Roman Volkov
     
  • 27a0becc2   clk: vt8500: fix gcc-4.9 warnings ... Browse Code »

    This fixes some false positive warnings we get with older compiler
    versions:

    clk-vt8500.c: In function ‘wm8650_find_pll_bits’:
    clk-vt8500.c:430:12: ‘best_div2’ may be used uninitialized in this function
    clk-vt8500.c:429:12: ‘best_div1’ may be used uninitialized in this function
    clk-vt8500.c:428:14: ‘best_mul’ may be used uninitialized in this function
    clk-vt8500.c: In function ‘wm8750_find_pll_bits’:
    clk-vt8500.c:509:12: ‘best_div2’ may be used uninitialized in this function
    clk-vt8500.c:508:12: ‘best_div1’ may be used uninitialized in this function
    clk-vt8500.c:507:14: ‘best_mul’ may be used uninitialized in this function
    clk-vt8500.c: In function ‘wm8850_find_pll_bits’:
    clk-vt8500.c:560:12: ‘best_div2’ may be used uninitialized in this function
    clk-vt8500.c:559:12: ‘best_div1’ may be used uninitialized in this function
    clk-vt8500.c:558:14: ‘best_mul’ may be used uninitialized in this function

    As the local variables are only use for temporaries, we can just
    as well assign the final values directly, which also makes the
    code slightly shorter.

    Signed-off-by: Arnd Bergmann
    Signed-off-by: Roman Volkov
    Signed-off-by: Stephen Boyd

    Arnd Bergmann
     

03 Feb, 2016

1 commit

  • 7001ec560   clk: vt8500: don't return possibly uninitialized data ... Browse Code »

    The clk-vt8500.c driver would previously enter an endless loop
    when invalid settings got requested, this was now fixed. However,
    the driver will now return uninitialized data for a subset of those
    cases instead, as the gcc correctly warns:

    clk/clk-vt8500.c: In function 'wm8650_find_pll_bits':
    clk/clk-vt8500.c:423:12: error: 'best_div2' may be used uninitialized in this function [-Werror=maybe-uninitialized]
    *divisor2 = best_div2;
    ^
    clk/clk-vt8500.c:422:12: error: 'best_div1' may be used uninitialized in this function [-Werror=maybe-uninitialized]
    *divisor1 = best_div1;
    ^
    clk/clk-vt8500.c:421:14: error: 'best_mul' may be used uninitialized in this function [-Werror=maybe-uninitialized]
    *multiplier = best_mul;

    This reworks the error handling in the driver so we now return
    -EINVAL from clk_round_rate() and clk_set_rate() when we get
    impossible inputs.

    Signed-off-by: Arnd Bergmann
    Fixes: 090341b0a95d ("clk: vt8500: fix sign of possible PLL values")
    Signed-off-by: Stephen Boyd

    Arnd Bergmann
     

30 Jan, 2016

1 commit

  • 090341b0a   clk: vt8500: fix sign of possible PLL values ... Browse Code »

    With unsigned values underflow in loops can occur resulting in
    theoretically infinite loops.

    The problem has been detected using proposed semantic patch
    scripts/coccinelle/tests/unsigned_lesser_than_zero.cocci [1].

    [1]: http://permalink.gmane.org/gmane.linux.kernel/2038576

    Signed-off-by: Andrzej Hajda
    Signed-off-by: Stephen Boyd

    Andrzej Hajda
     

20 Dec, 2013

1 commit

30 Sep, 2013

2 commits

  • f44089a7f   ARM: vt8500: prepare for arch-wide .init_time callback ... Browse Code »

    Current vt8500 board init calls of_clk_init() from vtwm_clk_init. To allow
    consolidation of DT driven .time_init, move of_clock_init() to a temporary
    .time_init callback that will be removed when arch-wide callback is available.
    With previous pmc_base parsing helper for vt8500 clock providers, we can also
    safely remove the call to vtwm_clk_init() and get rid of some includes.

    Signed-off-by: Sebastian Hesselbarth
    Acked-by: Tony Prisk
    Acked-by: Mike Turquette

    Sebastian Hesselbarth
     
  • f9e4a18de   clk: vt8500: parse pmc_base from clock driver ... Browse Code »

    Currently, clock providers for vt8500 depend on machine_init providing
    pmc_base address before calling of_clk_init. With upcoming arch-wide
    .time_init calling of_clk_init, we should make clock providers independent
    of mach code. This adds a pmc_base parsing helper to current clock provider
    that gets called if there is no pmc_base set, yet.

    Signed-off-by: Sebastian Hesselbarth
    Acked-by: Tony Prisk
    Acked-by: Mike Turquette

    Sebastian Hesselbarth
     

04 Jul, 2013

1 commit

  • 92295f632   Merge tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linux ... Browse Code »

    Pull clock framework updates from Mike Turquette:
    "The common clock framework changes for 3.11 include new clock drivers
    across several different platforms and architectures, fixes to
    existing drivers, a MAINTAINERS file fix and improvements to the basic
    clock types that allow them to be of use to more platforms than before.

    Only a few fixes to the core framework are included with most all of
    the changes landing in the various clock drivers themselves."

    * tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linux: (55 commits)
    clk: tegra: fix ifdef for tegra_periph_reset_assert inline
    clk: tegra: provide tegra_periph_reset_assert alternative
    clk: exynos4: Fix clock aliases for cpufreq related clocks
    clk: samsung: Add MUX_FA macro to pass flag and alias
    clk: add support for Rockchip gate clocks
    clk: vexpress: Make the clock drivers directly available for arm64
    clk: vexpress: Use full node name to identify individual clocks
    clk: tegra: T114: add DFLL DVCO reset control
    clk: tegra: T114: add DFLL source clocks
    clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL
    clk: gate: add CLK_GATE_HIWORD_MASK
    clk: divider: add CLK_DIVIDER_HIWORD_MASK flag
    clk: mux: add CLK_MUX_HIWORD_MASK
    clk: Always notify whole subtree when reparenting
    MAINTAINERS: make drivers/clk entry match subdirs
    clk: honor CLK_GET_RATE_NOCACHE in clk_set_rate
    clk: use clk_get_rate() for debugfs
    clk: tegra: Use override bits when needed
    clk: tegra: override bits for Tegra30 PLLM
    clk: tegra: override bits for Tegra114 PLLM
    ...

    Linus Torvalds
     

30 May, 2013

3 commits

  • 419e321df   clk: vt8500: Fix unbalanced spinlock in vt8500_dclk_set_rate() ... Browse Code »

    With the addition of a DVO clock, a bug is now evident in the vt8500
    clock code:
    [ 0.290000] WARNING: at init/main.c:698 do_one_initcall+0x158/0x18c()
    [ 0.300000] initcall wm8505fb_driver_init+0x0/0xc returned with disabled int

    This is caused by an unbalanced spinlock in vt8500_dclk_set_rate().
    Replace the second call to spin_lock_irqsave() with spin_unlock_irqrestore().

    Signed-off-by: Tony Prisk
    Signed-off-by: Mike Turquette

    Tony Prisk
     
  • 65f2c58f0   clk: vt8500: Remove unnecessary divisor adjustment in vtwm_dclk_set_rate() ... Browse Code »

    The divisor adjustment code to ensure that a divisor is not rounded down,
    thereby giving a rate higher than requested, is unnecessary and in some
    instances results in the actual rate being much lower than requested due to
    rounding errors.

    The test is already performed in vtwm_dclk_round_rate(), which is always
    called when clk_set_rate is called. Due to rounding errors in the line:
    divisor = parent_rate / rate (clk-vt8500.c:160) we will sometimes end up
    adjusting the divisor twice - first in round_rate and then again in set_rate.

    This patch removes the test/adjustment in vtwm_dclk_set_rate.

    Signed-off-by: Tony Prisk
    Signed-off-by: Mike Turquette

    Tony Prisk
     
  • 518d4709f   clk: vt8500: Add support for clocks on the WM8850 SoCs ... Browse Code »

    The WM8850 has a different PLL clock to the previous versions. This
    patch adds support for the WM8850-style PLL clocks.

    Signed-off-by: Tony Prisk
    Signed-off-by: Mike Turquette

    Tony Prisk
     

30 Apr, 2013

1 commit

  • 362ed48de   Merge tag 'clk-for-linus-3.10' of git://git.linaro.org/people/mturquette/linux ... Browse Code »

    Pull clock framework update from Michael Turquette:
    "The common clock framework changes for 3.10 include many fixes for
    existing platforms, as well as adoption of the framework by new
    platforms and devices.

    Some long-needed fixes to the core framework are here as well as new
    features such as improved initialization of clocks from DT as well as
    framework reentrancy for nested clock operations."

    * tag 'clk-for-linus-3.10' of git://git.linaro.org/people/mturquette/linux: (44 commits)
    clk: add clk_ignore_unused option to keep boot clocks on
    clk: ux500: fix mismatched types
    clk: vexpress: Add separate SP810 driver
    clk: si5351: make clk-si5351 depend on CONFIG_OF
    clk: export __clk_get_flags for modular clock providers
    clk: vt8500: Missing breaks in vtwm_pll_round_rate/_set_rate.
    clk: sunxi: Unify oscillator clock
    clk: composite: allow fixed rates & fixed dividers
    clk: composite: rename 'div' references to 'rate'
    clk: add si5351 i2c common clock driver
    clk: add device tree fixed-factor-clock binding support
    clk: Properly handle notifier return values
    clk: ux500: abx500: Define clock tree for ab850x
    clk: ux500: Add support for sysctrl clocks
    clk: mvebu: Fix valid value range checking for cpu_freq_select
    clk: Fixup locking issues for clk_set_parent
    clk: Fixup errorhandling for clk_set_parent
    clk: Restructure code for __clk_reparent
    clk: sunxi: drop an unnecesary kmalloc
    clk: sunxi: drop CLK_IGNORE_UNUSED
    ...

    Linus Torvalds
     

14 Apr, 2013

1 commit

15 Mar, 2013

1 commit

25 Jan, 2013

1 commit

16 Jan, 2013

4 commits

10 Nov, 2012

1 commit

21 Sep, 2012

1 commit