12 May, 2020
1 commit
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When the nvmem subsystem is not initialised at boot, the probe
will fail and an error message will be displayed.
In this case the message should not be printed as the driver will
be probed later.This patch checks the error code from nvmem before printing the
message.It also fixes the cleaning path as the driver was not exiting
properly.Signed-off-by: Franck LENORMAND
Reviewed-by: Iuliana Prodan
04 May, 2020
1 commit
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The function snvs_reader uses a switch case with intentionnal
fall through which is an error displayed at compilation.This patch uses the keyword "fallthrough" to fix the issue.
Signed-off-by: Franck LENORMAND
Reviewed-by: Horia Geantă
26 Mar, 2020
1 commit
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Some power domain need to be runtime always on to keep
the peripherals's weekup ability, for such power domain,
add the 'GENPD_FLAG_RPM_ALWAYS_ON' flag.Signed-off-by: Jacky Bai
Reviewed-by: Anson Huang
18 Mar, 2020
1 commit
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Add the active wakeup flag if a power domain has such requirement.
Signed-off-by: Jacky Bai
Reviewed-by: Anson Huang
14 Mar, 2020
2 commits
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Report to audit framework in case a secure violation is
reported to the driver.Signed-off-by: Franck LENORMAND
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The driver register an IRQ handle to SCU for security
violation interrupt.When an interruption is fired, the driver inform the user.
Signed-off-by: Franck LENORMAND
08 Mar, 2020
1 commit
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Merge Linux stable release v5.4.24 into imx_5.4.y
* tag 'v5.4.24': (3306 commits)
Linux 5.4.24
blktrace: Protect q->blk_trace with RCU
kvm: nVMX: VMWRITE checks unsupported field before read-only field
...Signed-off-by: Jason Liu
Conflicts:
arch/arm/boot/dts/imx6sll-evk.dts
arch/arm/boot/dts/imx7ulp.dtsi
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
drivers/clk/imx/clk-composite-8m.c
drivers/gpio/gpio-mxc.c
drivers/irqchip/Kconfig
drivers/mmc/host/sdhci-of-esdhc.c
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
drivers/net/can/flexcan.c
drivers/net/ethernet/freescale/dpaa/dpaa_eth.c
drivers/net/ethernet/mscc/ocelot.c
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
drivers/net/phy/realtek.c
drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
drivers/perf/fsl_imx8_ddr_perf.c
drivers/tee/optee/shm_pool.c
drivers/usb/cdns3/gadget.c
kernel/sched/cpufreq.c
net/core/xdp.c
sound/soc/fsl/fsl_esai.c
sound/soc/fsl/fsl_sai.c
sound/soc/sof/core.c
sound/soc/sof/imx/Kconfig
sound/soc/sof/loader.c
05 Mar, 2020
1 commit
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[ Upstream commit 6f4ecbe284df5f22e386a640d9a4b32cede62030 ]
If only Tegra194 support is enabled, the tegra30_fuse_read() and
tegra30_fuse_init() function are not declared and cause a build failure.
Add Tegra194 to the preprocessor guard to make sure these functions are
available for Tegra194-only builds as well.Link: https://lore.kernel.org/r/20200203143114.3967295-1-thierry.reding@gmail.com
Reported-by: kbuild test robot
Signed-off-by: Thierry Reding
Signed-off-by: Olof Johansson
Signed-off-by: Sasha Levin
28 Feb, 2020
2 commits
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Remove one extra space
Signed-off-by: Frank Li
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SCU IMX_SC_MISC_FUNC_UNIQUE_ID don't return value by scu
return value from SCU is undefined.Signed-off-by: Frank Li
26 Feb, 2020
2 commits
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The imx SC api strongly assumes that messages are composed out of
4-bytes words but some of our message structs have sizeof "6" and "7".This produces many oopses with CONFIG_KASAN=y:
BUG: KASAN: stack-out-of-bounds in imx_mu_send_data+0x108/0x1f0
It shouldn't cause an issues in normal use because these structs are
always allocated on the stack.Also upstream: https://patchwork.kernel.org/patch/11376909/
Reported-by: Iuliana Prodan
Signed-off-by: Leonard Crestez
Reviewed-by: Jason Liu
Reviewed-by: Aisheng Dong
Signed-off-by: Dong Aisheng
(cherry picked from commit 8ca6d9eb2725152404a5764fc8916f77ee82aa29) -
The dpio irqs must be registered when you can actually
receive interrupts, ie when the dpios are created.
Kernel goes through NULL pointer dereference errors
followed by kernel panic because the dpio irqs are
enabled before the dpio is created.Tested-by: Grigore Popescu
Reviewed-by: Ioana Ciornei
Signed-off-by: Laurentiu Tudor
Signed-off-by: Grigore Popescu
(cherry picked from commit 50722e6685488ddadf15804c85b6da0a107d6847)
24 Feb, 2020
1 commit
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[ Upstream commit 2d9ea1934f8ef0dfb862d103389562cc28b4fc03 ]
Trying to read out Chip ID before APBMISC registers are mapped won't
succeed, in a result Tegra124 gets a wrong address for the HW straps
register if machine uses an old outdated device tree.Fixes: 297c4f3dcbff ("soc/tegra: fuse: Restrict legacy code to 32-bit ARM")
Signed-off-by: Dmitry Osipenko
Signed-off-by: Thierry Reding
Signed-off-by: Sasha Levin
15 Feb, 2020
1 commit
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commit 5d0d4d42bed0090d3139e7c5ca1587d76d48add6 upstream.
The 'active_only' attribute was accidentally never set to true for any
power domains meaning that all the code handling this attribute was
dead.NOTE that the RPM power domain code (as opposed to the RPMh one) gets
this right.Acked-by: Rajendra Nayak
Reviewed-by: Stephen Boyd
Fixes: 279b7e8a62cc ("soc: qcom: rpmhpd: Add RPMh power domain driver")
Signed-off-by: Douglas Anderson
Link: https://lore.kernel.org/r/20190214173633.211000-1-dianders@chromium.org
Signed-off-by: Bjorn Andersson
Signed-off-by: Greg Kroah-Hartman
13 Feb, 2020
1 commit
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Add soc id for imx8dxl soc.
Signed-off-by: Teo Hall
Reviewed-by: Anson Huang
06 Feb, 2020
1 commit
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[ Upstream commit 03729cfa0d543bc996bf959e762ec999afc8f3d2 ]
Any user of wkup_m3_ipc calls wkup_m3_ipc_get to get a handle and this
checks the value of the static variable m3_ipc_state to see if the
wkup_m3 is ready. Currently this is populated during probe before
rproc_boot has been called, meaning there is a window of time that
wkup_m3_ipc_get can return a valid handle but the wkup_m3 itself is not
ready, leading to invalid IPC calls to the wkup_m3 and system
instability.To avoid this, move the population of the m3_ipc_state variable until
after rproc_boot has succeeded to guarantee a valid and usable handle
is always returned.Reported-by: Suman Anna
Signed-off-by: Dave Gerlach
Acked-by: Santosh Shilimkar
Signed-off-by: Tony Lindgren
Signed-off-by: Sasha Levin
26 Jan, 2020
4 commits
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commit a4e55ccd4392e70f296d12e81b93c6ca96ee21d5 upstream.
snoop_file_poll() is defined as returning 'unsigned int' but the
.poll method is declared as returning '__poll_t', a bitwise type.Fix this by using the proper return type and using the EPOLL
constants instead of the POLL ones, as required for __poll_t.Link: https://lore.kernel.org/r/20191121051851.268726-1-joel@jms.id.au
Fixes: 3772e5da4454 ("drivers/misc: Aspeed LPC snoop output using misc chardev")
Signed-off-by: Luc Van Oostenryck
Reviewed-by: Joel Stanley
Reviewed-by: Andrew Jeffery
Signed-off-by: Joel Stanley
Signed-off-by: Olof Johansson
Signed-off-by: Greg Kroah-Hartman -
commit 4194b583c104922c6141d6610bfbce26847959df upstream.
If the DTB for a device with an RZ/A2 SoC lacks a device node for the
BSID register, the ID validation code falls back to using a register at
address 0x0, which leads to undefined behavior (e.g. reading back a
random value).This could be fixed by letting fam_rza2.reg point to the actual BSID
register. However, the hardcoded fallbacks were meant for backwards
compatibility with old DTBs only, not for new SoCs. Hence fix this by
validating renesas_family.reg before using it.Fixes: 175f435f44b724e3 ("soc: renesas: identify RZ/A2")
Signed-off-by: Geert Uytterhoeven
Link: https://lore.kernel.org/r/20191016143306.28995-1-geert+renesas@glider.be
Signed-off-by: Greg Kroah-Hartman -
commit 2bfd3e7651addcaf48f12d4f11ea9d8fca6c3aa8 upstream.
We'll end up with debugfs collisions if we don't give names to the
regmaps created by this driver. Change the name of the config before
registering it so we don't collide in debugfs.Fixes: 7f9c136216c7 ("soc: qcom: Add broadcast base for Last Level Cache Controller (LLCC)")
Cc: Venkata Narendra Kumar Gutta
Reviewed-by: Evan Green
Signed-off-by: Stephen Boyd
Signed-off-by: Bjorn Andersson
Signed-off-by: Greg Kroah-Hartman -
commit c9e753767a9c75d2044fb7343950a6a992d34a16 upstream.
Interrupts that don't have an associated wake event or GPIO wake events
end up with an associate IRQ chip that is NULL and which causes IRQ code
to crash. This is because we don't implicitly set the parent IRQ chip by
allocating the interrupt at the parent. However, there really isn't a
corresponding interrupt at the parent, so we need to work around this by
setting the special no_irq_chip as the IRQ chip for these interrupts.Fixes: 19906e6b1667 ("soc/tegra: pmc: Add wake event support")
Signed-off-by: Thierry Reding
Signed-off-by: Greg Kroah-Hartman
23 Jan, 2020
2 commits
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commit c67aafd60d7e323fe74bf45fab60148f84cf9b95 upstream.
pm_genpd_init() can return an error. Propagate the error code to prevent
the driver from indicating that it successfully probed while there were
errors during pm_genpd_init().Fixes: eef3c2ba0a42a6 ("soc: amlogic: Add support for Everything-Else power domains controller")
Signed-off-by: Martin Blumenstingl
Signed-off-by: Kevin Hilman
Signed-off-by: Greg Kroah-Hartman -
commit 0766d65e6afaea8b80205a468207de9f18cd7ec8 upstream.
of_genpd_add_provider_onecell() can return an error. Propagate the error
so the driver registration fails when of_genpd_add_provider_onecell()
did not work.Fixes: eef3c2ba0a42a6 ("soc: amlogic: Add support for Everything-Else power domains controller")
Signed-off-by: Martin Blumenstingl
Signed-off-by: Kevin Hilman
Signed-off-by: Greg Kroah-Hartman
26 Dec, 2019
1 commit
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Add support for i.MX8MP SoC ID driver.
Signed-off-by: Anson Huang
Reviewed-by: Peng Fan
20 Dec, 2019
1 commit
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Setting the software portal configuration DE(dequeue stashing
enable) bit. This should enable the ACP (Accelerator Coherency
Port).During test this improved performance on the LS2088a slightly. No
effect on the LX2160a.Signed-off-by: Youri Querry
19 Dec, 2019
1 commit
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When DRAM PLL clock is changed in TF-A, the DRAM PLL clock rate needs
to be updated, previous implementation uses dram_pll_clk which is
clock gate and it will NOT trigger clock rate update, need to use PLL
type clock which has CLK_GET_RATE_NOCACHE flag set and will trigger
clock rate recalculation. Otherwise, when system enters low bus mode,
checking clock rate via "cat /sys/kernel/debug/clk/dram_core_clk/clk_rate"
will NOT return the latest dram core clk rate.Signed-off-by: Anson Huang
Reviewed-by: Robin Gong
16 Dec, 2019
1 commit
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This is the 5.4.3 stable release
Conflicts:
drivers/cpufreq/imx-cpufreq-dt.c
drivers/spi/spi-fsl-qspi.cThe conflict is very minor, fixed it when do the merge. The imx-cpufreq-dt.c
is just one line code-style change, using upstream one, no any function change.The spi-fsl-qspi.c has minor conflicts when merge upstream fixes: c69b17da53b2
spi: spi-fsl-qspi: Clear TDH bits in FLSHCR registerAfter merge, basic boot sanity test and basic qspi test been done on i.mx
Signed-off-by: Jason Liu
13 Dec, 2019
1 commit
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commit 47b6b604b2bf396e110e7c2e074fef459bf07b4f upstream.
Fixup a issue was caused by the previous fixup patch.
Fixes: 1a92f989126e ("soc: mediatek: cmdq: reorder the parameter")
Link: https://lore.kernel.org/r/20191127165428.19662-1-matthias.bgg@gmail.com
Cc:
Signed-off-by: Bibby Hsieh
Reviewed-by: CK Hu
Signed-off-by: Matthias Brugger
Signed-off-by: Olof Johansson
Signed-off-by: Greg Kroah-Hartman
05 Dec, 2019
2 commits
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This removes build warning,
drivers/soc/fsl/rcpm.c: In function ‘rcpm_pm_prepare’:
drivers/soc/fsl/rcpm.c:126:37: warning: left shift count >= width of type [-Wshift-count-overflow]
(u32)(((u64)(reg_offset[1] << (sizeof(u32) * 8) |
^~
drivers/soc/fsl/rcpm.c:131:38: warning: left shift count >= width of type [-Wshift-count-overflow]
(u32)(((u64)(reg_offset[1] << (sizeof(u32) * 8) |Reviewed-by: Ran Wang
Signed-off-by: Biwen Li -
Description:
- Reading configuration register RCPM_IPPDEXPCR1
always return zeroWorkaround:
- Save register RCPM_IPPDEXPCR1's value to
register SCFG_SPARECR8.(uboot's psci also
need reading value from the register SCFG_SPARECR8
to set register RCPM_IPPDEXPCR1)Impact:
- FlexTimer module will cannot wakeup system in
deep sleep on SoC LS1021AReviewed-by: Ran Wang
Signed-off-by: Biwen Li
02 Dec, 2019
11 commits
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* qe/next: (6 commits)
config/qe: add irq-qeic support.
QE: remove PPCisms for QE
irqchip/qeic: remove PPCisms for QEIC
irqchip/qeic: merge qeic_of_init into qe_ic_init
irqchip/qeic: merge qeic init code from platforms to a common function
... -
* pm/next: (54 commits)
drivers/soc/fsl: add EPU FSM configuration for deep sleep
fsl_pmc: update device bindings
soc: fsl: add RCPM driver
Documentation: dt: binding: fsl: Add 'little-endian' and update Chassis define
MLK-22992 firmware: imx: scu-pd: fix wu_num
... -
This change of algorithm will enable faster bulk enqueue.
This will grately benefit XDP bulk enqueue.Signed-off-by: Youri Querry
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We are making the access decision in the initialization and
setting the function pointers accordingly.Signed-off-by: Youri Querry
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Update of QMAN the interface to enqueue frame. We now support multiple
enqueue (qbman_swp_enqueue_multiple) and multiple enqueue with
a table of descriptor (qbman_swp_enqueue_multiple_desc).Signed-off-by: Youri Querry
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Alignment requirement on ARM is lenient (In Linux) for regions
mapped as "Memory Type" but have very strict policy for regions
mapped as "Device Type". Unaligned access to regions mapped
as "Device Type" will always result to unaligned fault.DPIO driver have un-aligned access to QBman cacheable region
and the Linux driver maps the region as "Memory Type". On Host
Linux this works because MMU Stage-1 configured by driver allows
unaligned access. In Virtual Machine cases, final region mapping type
is governed by combination of Stage-1 and Stage-2 MMU mapping.Linux driver in VM controls maps the region as "Memory Type" in
Stage-1 MMU while Stage-2 is controlled by KVM. And current KVM
implementation does not allow device region to be mapped as
"Memory Type". Till we have a working/upstream-able solution
for Virtual Machine, we need to change un-aligned access in DPIO
driver to be alignedWhile we reached to this point as we observed below alignment
exception in Virtual Machine when accessing qbman cacheable region.kvm [2347]: Unsupported FSC: EC=0x24 xFSC=0x21
ESR_EL2=0x92000061
error: kvm run failed Bad address
PC=ffff000008398e78 SP=ffff800009bcb540
X00=ffff000008041000 X01=ffff800009bcb580 X02=ffff800009bcb650
X03=0000000000000180
X04=ffff000008041001 X05=ffff800009bcb581 X06=0200000000000000
X07=0000000000000000
X08=0000000000000000 X09=ffff000008041000 X10=0000000000000001
X11=0000000000de6cb0
X12=00000000fa83b2da X13=0000000000000001 X14=000000007f605ec8
X15=00000000e26f5d5e
X16=000000008521af1e X17=000000001076277e X18=ffff800009bcb5c0
X19=ffff800079da2b00
X20=ffff800009bcb650 X21=0000000000000002 X22=0000000000000000
X23=0000000000000000
X24=0000000000000000 X25=ffff8000099e7440 X26=ffff000008da6000
X27=ffff000008e7f000
X28=00000000499e7440 X29=ffff800009bcb540 X30=ffff00000839a160
PSTATE=20000145 --C- EL1hSigned-off-by: Bharat Bhushan
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The mechanism for indicating to HW that a frame was dropped
when performing HW order restoration changed in QBMan 5.0 to
use a management command instead of a special enqueue command.
This patch implements that change when running on a QBMan 5.0
and above device.Signed-off-by: Roy Pledge
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Add DPIO support for HW assisted order restoration
Signed-off-by: Roy Pledge
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Use the cpu affine DPIO unless there isn't one which can happen
if less DPIOs than cores are assign to the kernel.Signed-off-by: Roy Pledge
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Once we enable the cacheable portal memory, we need to do
cache flush for enqueue, vdq, buffer release, and management
commands, as well as invalidate and prefetch for the valid bit
of management command response and next index of dqrr.Signed-off-by: Haiying Wang
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Change cache enabled regsiter accessed to be cacheable
plus non-shareable to meet the performance requirement.
QMan's CENA region contains registers and structures that
are 64byte in size and are inteneded to be accessed using a
single 64 byte bus transaction, therefore this portal
memory should be configured as cache-enabled. Also because
the write allocate stash transcations of QBMan should be
issued as cachable and non-coherent(non-sharable), we
need to configure this region to be non-shareable.Signed-off-by: Haiying Wang
