Eric Lee / smarc-fsl-linux-kernel

03 Oct, 2020

1 commit

  • d7071743d   RISC-V: Add EFI stub support. ... Browse Code »

    Add a RISC-V architecture specific stub code that actually copies the
    actual kernel image to a valid address and jump to it after boot services
    are terminated. Enable UEFI related kernel configs as well for RISC-V.

    Signed-off-by: Atish Patra
    Link: https://lore.kernel.org/r/20200421033336.9663-4-atish.patra@wdc.com
    [ardb: - move hartid fetch into check_platform_features()
    - use image_size not reserve_size
    - select ISA_C
    - do not use dram_base]
    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Palmer Dabbelt

    Atish Patra
     

31 Jul, 2020

1 commit

10 Apr, 2020

1 commit

  • eab400266   Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux ... Browse Code »

    Pull RISC-V updates from Palmer Dabbelt:
    "This contains a handful of new features:

    - Partial support for the Kendryte K210.

    There are still a few outstanding issues that I have patches for,
    but I don't actually have a board to test them so they're not
    included yet.

    - SBI v0.2 support.

    - Fixes to support for building with LLVM-based toolchains. The
    resulting images are known not to boot yet.

    I don't anticipate a part two, but I'll probably have something early
    in the RCs to finish up the K210 support"

    * tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (38 commits)
    riscv: create a loader.bin boot image for Kendryte SoC
    riscv: Kendryte K210 default config
    riscv: Add Kendryte K210 device tree
    riscv: Select required drivers for Kendryte SOC
    riscv: Add Kendryte K210 SoC support
    riscv: Add SOC early init support
    riscv: Unaligned load/store handling for M_MODE
    RISC-V: Support cpu hotplug
    RISC-V: Add supported for ordered booting method using HSM
    RISC-V: Add SBI HSM extension definitions
    RISC-V: Export SBI error to linux error mapping function
    RISC-V: Add cpu_ops and modify default booting method
    RISC-V: Move relocate and few other functions out of __init
    RISC-V: Implement new SBI v0.2 extensions
    RISC-V: Introduce a new config for SBI v0.1
    RISC-V: Add SBI v0.2 extension definitions
    RISC-V: Add basic support for SBI v0.2
    RISC-V: Mark existing SBI as 0.1 SBI.
    riscv: Use macro definition instead of magic number
    riscv: Add support to dump the kernel page tables
    ...

    Linus Torvalds
     

27 Mar, 2020

1 commit

  • bd6f20333   RISC-V: Only select essential drivers for SOC_VIRT config ... Browse Code »

    The kconfig select causes build failues for SOC_VIRT config becaus
    we are selecting lot of VIRTIO drivers without selecting all required
    dependencies.

    Better approach is to only select essential drivers from SOC_VIRT
    config option and enable required VIRTIO drivers using defconfigs.

    Fixes: 759bdc168181 ("RISC-V: Add kconfig option for QEMU virt machine")
    Signed-off-by: Anup Patel
    Acked-by: Michael S. Tsirkin
    Signed-off-by: Palmer Dabbelt

    Anup Patel
     

06 Mar, 2020

3 commits

04 Mar, 2020

1 commit

  • 2fab7a156   riscv: Delete CONFIG_SYSFS_SYSCALL from defconfigs ... Browse Code »

    According to init/Kconfig:
    "sys_sysfs is an obsolete system call no longer supported in libc.
    Note that disabling this option is more secure but might break
    compatibility with some systems."

    This syscall is not required for new architectures. Since the config
    defaults to 'y'. Set this to 'n' exlicitly.

    Signed-off-by: Deepa Dinamani
    Signed-off-by: Palmer Dabbelt

    Deepa Dinamani
     

23 Nov, 2019

2 commits

19 Sep, 2019

1 commit

14 Aug, 2019

1 commit

01 Aug, 2019

1 commit

02 Jul, 2019

2 commits

  • bbc5dc515   riscv: defconfig: enable SOC_SIFIVE ... Browse Code »

    Enable SOC_SIFIVE so the default upstream config is bootable on the SiFive
    Unleashed Board.
    And have basic support for future boards based on the same SoC.

    Signed-off-by: Loys Ollivier
    Reviewed-by: Palmer Dabbelt
    [paul.walmsley@sifive.com: updated to apply]
    Signed-off-by: Paul Walmsley

    Loys Ollivier
     
  • 6dd91e0ea   RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS ... Browse Code »

    This patch enables NO_HZ_IDLE (idle dynamic ticks) and HIGH_RES_TIMERS
    (hrtimers) in RV32 and RV64 defconfigs.

    Both of the above options are enabled by default for architectures
    such as x86, ARM, and ARM64.

    The idle dynamic ticks helps use save power by stopping timer ticks
    when the system is idle whereas hrtimers is a much improved timer
    subsystem compared to the old "timer wheel" based system.

    This patch is tested on SiFive Unleashed board and QEMU Virt machine.

    Signed-off-by: Anup Patel
    Reviewed-by: Palmer Dabbelt
    Signed-off-by: Paul Walmsley

    Anup Patel
     

27 Jun, 2019

1 commit

  • ff8391e1b   RISC-V: defconfig: enable MMC & SPI for RISC-V ... Browse Code »

    Currently, riscv upstream defconfig doesn't let you boot
    through userspace if rootfs is on the SD card.

    Let's enable MMC & SPI drivers as well so that one can boot
    to the user space using default config in upstream kernel.

    While here, enable automatic mounting of devtmpfs to simplify
    kernel testing with minimal root filesystems. (pjw)

    Signed-off-by: Atish Patra
    Reviewed-by: Palmer Dabbelt
    [paul.walmsley@sifive.com: mention the DEVTMPFS_MOUNT change in the
    patch description]
    Signed-off-by: Paul Walmsley

    Atish Patra
     

11 Jun, 2019

1 commit

24 Jan, 2019

3 commits

18 Dec, 2018

1 commit

13 Nov, 2018

1 commit

  • 4ab49461d   RISC-V: defconfig: Enable printk timestamps ... Browse Code »

    The printk timestamps are very useful information to visually see
    where kernel is spending time during boot. It also helps us see
    the timing of hotplug events at runtime.

    This patch enables printk timestamps in RISC-V defconfig so that
    we have it enabled by default (similar to other architectures
    such as x86_64, arm64, etc).

    Signed-off-by: Anup Patel
    Acked-by: Olof Johansson
    Signed-off-by: Palmer Dabbelt

    Anup Patel
     

02 Nov, 2018

1 commit

  • ba1f0d955   RISC-V: refresh defconfig ... Browse Code »

    This patch updates defconfig using savedefconfig on Linux-4.19. It is
    intended to have no functional change.

    Signed-off-by: Anup Patel
    Reviewed-by: Palmer Dabbelt
    Signed-off-by: Palmer Dabbelt

    Anup Patel
     

13 Aug, 2018

1 commit

  • 8237f8bc4   irqchip: add a SiFive PLIC driver ... Browse Code »

    Add a driver for the SiFive implementation of the RISC-V Platform Level
    Interrupt Controller (PLIC). The PLIC connects global interrupt sources
    to the local interrupt controller on each hart.

    This driver is based on the driver in the RISC-V tree from Palmer Dabbelt,
    but has been almost entirely rewritten since, and includes many fixes
    from Atish Patra.

    Signed-off-by: Christoph Hellwig
    Acked-by: Thomas Gleixner
    Reviewed-by: Atish Patra
    [Binding update by Palmer]
    Signed-off-by: Palmer Dabbelt

    Christoph Hellwig
     

12 Jun, 2018

1 commit

03 Apr, 2018

1 commit

08 Jan, 2018

1 commit

  • 33c57c0d3   RISC-V: Add a basic defconfig ... Browse Code »

    This patch provides a basic defconfig for the RISC-V
    architecture that enables enough kernel features to run a
    basic Linux distribution on qemu's "virt" board for native
    software development. Features include:

    - serial console
    - virtio block and network device support
    - VFAT and ext2/3/4 filesystem support
    - NFS client and NFS rootfs support
    - an assortment of other kernel features required for
    running systemd

    It also enables a number of drivers for physical hardware
    that target the "SiFive U500" SoC and the corresponding
    development platform. These include:

    - PCIe host controller support for the FPGA-based U500
    development platform (PCIE_XILINX)
    - USB host controller support (OHCI/EHCI/XHCI)
    - USB HID (keyboard/mouse) support
    - USB mass storage support (bulk and UAS)
    - SATA support (AHCI)
    - ethernet drivers (MACB for a SoC-internal MAC block, microsemi
    ethernet phy, E1000E and R8169 for PCIe-connected external devices)
    - DRM and framebuffer console support for PCIe-connected
    Radeon graphics chips

    Signed-off-by: Karsten Merker
    Signed-off-by: Palmer Dabbelt

    Karsten Merker
     

27 Sep, 2017

1 commit

  • fbe934d69   RISC-V: Build Infrastructure ... Browse Code »

    This patch contains all the build infrastructure that actually enables
    the RISC-V port. This includes Makefiles, linker scripts, and Kconfig
    files. It also contains the only top-level change, which adds RISC-V to
    the list of architectures that need a sed run to produce the ARCH
    variable when building locally.

    Signed-off-by: Palmer Dabbelt

    Palmer Dabbelt