29 May, 2011
1 commit
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Now that the serial code has been unified in bfin_serial.h, and the
Blackfin UART driver pushed its resources to the boards files, we
don't need these headers anymore.Signed-off-by: Mike Frysinger
28 May, 2011
1 commit
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* git://git.infradead.org/mtd-2.6: (97 commits)
mtd: kill CONFIG_MTD_PARTITIONS
mtd: remove add_mtd_partitions, add_mtd_device and friends
mtd: convert remaining users to mtd_device_register()
mtd: samsung onenand: convert to mtd_device_register()
mtd: omap2 onenand: convert to mtd_device_register()
mtd: txx9ndfmc: convert to mtd_device_register()
mtd: tmio_nand: convert to mtd_device_register()
mtd: socrates_nand: convert to mtd_device_register()
mtd: sharpsl: convert to mtd_device_register()
mtd: s3c2410 nand: convert to mtd_device_register()
mtd: ppchameleonevb: convert to mtd_device_register()
mtd: orion_nand: convert to mtd_device_register()
mtd: omap2: convert to mtd_device_register()
mtd: nomadik_nand: convert to mtd_device_register()
mtd: ndfc: convert to mtd_device_register()
mtd: mxc_nand: convert to mtd_device_register()
mtd: mpc5121_nfc: convert to mtd_device_register()
mtd: jz4740_nand: convert to mtd_device_register()
mtd: h1910: convert to mtd_device_register()
mtd: fsmc_nand: convert to mtd_device_register()
...Fixed up trivial conflicts in
- drivers/mtd/maps/integrator-flash.c: removed in ARM tree
- drivers/mtd/maps/physmap.c: addition of afs partition probe type
clashing with removal of CONFIG_MTD_PARTITIONS
25 May, 2011
8 commits
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We plan to remove cpu_possible_map and cpu_present_map later and we
have proper init_cpu_possible() and init_cpu_present() APIs.Therefore this patch rewrites platform_init_cpus and platform_prepare_cpus
by their APIs.Signed-off-by: KOSAKI Motohiro
Signed-off-by: Mike Frysinger -
Both the BF548-EZKIT and the BF561-EZKIT use top boot flashes, so now
that Das U-Boot uses the last small sector for its environment, update
their nor layout in the kernel accordingly.Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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After some cache setup reordering changesets, the blackfin_cpudata init
was left behind. While cpu0's data was correct, cpu1's data was not.
Not that big of a deal as these are only used in the cpuinfo output, but
should still be fixed. So move the setup of these fields to the common
cache setup function to avoid this happening again in the future.Signed-off-by: Mike Frysinger
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This brings the parts in line with newer ones, and makes things easier
to read at a glance.Signed-off-by: Mike Frysinger
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These files had a lot of whitespace damage, mostly due to copying and
pasting original files that had damage.The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so
punt them all.Signed-off-by: Mike Frysinger
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Start a new common IRQ header and move all of the CEC pieces there. This
lets the individual part headers worry just about its SIC defines.Signed-off-by: Mike Frysinger
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Convert to mtd_device_register() and remove the CONFIG_MTD_PARTITIONS
preprocessor conditionals as partitioning is always available.Cc: Mike Frysinger
Signed-off-by: Jamie Iles
Signed-off-by: Artem Bityutskiy
Signed-off-by: David Woodhouse
29 Mar, 2011
1 commit
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Use the trigger type in irq_data and check level type instead of
looking at desc->handle_irq.Signed-off-by: Thomas Gleixner
Cc: Mike Frysinger
Cc: uclinux-dist-devel@blackfin.uclinux.org
23 Mar, 2011
1 commit
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When CoreB wakes up, it needs to read variables that CoreA might have
modified, and might be in CoreB's cache. So kill CoreB's cache before
going to sleep so that when we wake up, we are in a coherent state.Signed-off-by: Graf Yang
Signed-off-by: Mike Frysinger
18 Mar, 2011
5 commits
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Signed-off-by: Mike Frysinger
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Signed-off-by: Thomas Gleixner
Signed-off-by: Mike Frysinger -
In order to safely work around anomaly 05000491, we have to execute IFLUSH
from L1 instruction sram. The trouble with multi-core systems is that all
L1 sram is visible only to the active core. So we can't just place the
functions into L1 and call it directly. We need to setup a jump table and
place the entry point in external memory. This will call the right func
based on the active core.In the process, convert from the manual relocation of a small bit of code
into Core B's L1 to the more general framework we already have in place
for loading arbitrary pieces of code into L1.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger -
Re-use some of the existing cpu hotplugging code in the process.
Signed-off-by: Graf Yang
Signed-off-by: Mike Frysinger -
Since coreb_trampoline_start() calls coreb_start(), they need to be in
the same section.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger
10 Jan, 2011
16 commits
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Signed-off-by: Mike Frysinger
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When run kgdb testing, it looks like coreb hangs in single step or trap
exception without handling anomaly 05000257 properly on bf561 v0.5. But,
the anomaly list says it apply to bf561 v0.4 and bellow. Apply its work
around to 0.5 temporarily until the behavior and the root cause can be
confirmed by the hardware team.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger -
KGDB single step in SMP kernel may hang forever in flushinv without a
CSYNC ahead. This is because the core internal write buffers need to
be flushed before invalidating the data cache to make sure the insn
fetch is not out of sync.Signed-off-by: Sonic Zhang
Signed-off-by: Mike Frysinger -
Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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Currently, sending an interprocessor interrupt (IPI) requires building up
a message dynamically which means memory allocation. But often times, we
will want to send an IPI in low level contexts where allocation is not
possible which may lead to a panic(). So create a per-cpu static array
for the message queue and use that instead.Further, while we have two supplemental interrupts, we are currently only
using one of them. So use the second one for the most common IPI message
of all -- smp_send_reschedule(). This avoids ugly contention for locks
which in turn would require an IPI message ...In general, this improves SMP performance, and in some cases allows the
SMP port to work in places it wouldn't before. Such as the PREEMPT_RT
state where the slab is protected by a per-cpu spin lock. If the slab
kmalloc/kfree were to put the task to sleep, and that task was actually
the IPI handler, then the system falls down yet again.After running some various stress tests on the system, the static limit
of 5 messages seems to work. On the off chance even this overflows, we
simply panic(), and we can review that scenario to see if the limit needs
to be increased a bit more.Signed-off-by: Yi Li
Signed-off-by: Mike Frysinger -
The BF561 mem_map.h header has the __ASSEMBLY__/CONFIG_SMP checks out
of order which leads to build errors for assembly code that happens to
include this file.Signed-off-by: Graf Yang
Signed-off-by: Mike Frysinger -
This function takes an irq_handler_t function, but the prototype in
the header doesn't match the function definition. This is due to the
smp headers needing to avoid circular dependencies. So change the
function to take a simple pointer.Signed-off-by: Graf Yang
Signed-off-by: Mike Frysinger -
Looks like I missed a few new spots when renaming the SICA macros.
Signed-off-by: Mike Frysinger
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These were only included because of the irq handling of the PLL funcs,
and those PLL funcs have been moved out into their own header now.Signed-off-by: Mike Frysinger
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The main asm/blackfin.h header will pull in mach/blackfin.h to get
all the fun Blackfin defines. So having any of the sub-mach headers
trying to include asm/blackfin.h makes no sense -- punt it.The mach/blackfin.h header takes care of including the part-specific
def headers which in turn will include any other needed def file.
Similarly, it takes care of pulling in the part-specific cdef header.
So move this logic out of the blackfin.h when necessary.Further, make sure the cdef headers do not waste time including the
def headers again.Since all parts need the common def/cdef headers, move this logic
out of the part-specific headers and into the mach/blackfin.h file.Finally, we need to split the BF539 def header since the BF538 does
not have MXVR and we don't want to expose those MMRs.So now all parts should have the same behavior:
mach/blackfin.h
asm/def_LPBlackfin.h
part-specific def.h
if ! asm
asm/cdef_LPBlackfin.h
part-specific cdef.h
And the sub def/cdef headers only tail into what they need.Signed-off-by: Mike Frysinger
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Signed-off-by: Mike Frysinger
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The array of pointers is never written, so constify it.
Signed-off-by: Mike Frysinger
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Use the same naming convention for DMA traffic MMRs (most were legacy
anyways) so we can avoid useless ifdef trees.Same goes for MDMA names -- this actually allows us to undo a bunch of
ifdef redirects that existed for this purpose alone.Signed-off-by: Mike Frysinger
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Each Blackfin port has been duplicating UART structures and defines when
there really is no need for it. So start a new bfin_serial.h header to
unify all these pieces and give ourselves a fresh start.Signed-off-by: Mike Frysinger
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Signed-off-by: Graf Yang
Signed-off-by: Mike Frysinger
23 Oct, 2010
5 commits
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* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: (47 commits)
Blackfin: bfin_spi.h: add MMR peripheral layout
Blackfin: bfin_ppi.h: start a common PPI/EPPI header
Blackfin: bfin_can.h: add missing VERSION/VERSION2 MMRs
Blackfin: bf538: add missing SIC_RVECT define
Blackfin: bf561: rewrite SICA_xxx to just SIC_xxx
Blackfin: bf54x: add missing SIC_RVECT definition
Blackfin: H8606: move 8250 irqflags to platform resources
Blackfin: glue XIP/ROM kernel kconfigs
Blackfin: update sparse flags for latest upstream changes
Blackfin: coreb: update ioctl numbers
Blackfin: coreb: add gpl module license
Blackfin: bf518-ezkit: add ssm2603 codec resources
Blackfin: bf51x/bf52x: fix 16/32bit SPORT MMR helpers
Blackfin: tll6527m: new board port
Blackfin: bf526-ezbrd/bf527-ezkit: add NAND partition for u-boot
Blackfin: merge kernel init memory back into main memory region
Blackfin: gpio: add peripheral group check
Blackfin: dma: bf54x: add missing break for SPORT1 TX IRQ
Blackfin: add new cacheflush syscall
Blackfin: bf548-ezkit: increase u-boot partition size
... -
This matches all the other Blackfin ports and keep us from having to write
bf561-specific code in many places.Signed-off-by: Mike Frysinger
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We have to use ioctl numbers that don't collide with common code.
Otherwise, these ones never even get called because the common fs
code swalled all invocations.Reported-by: Kay Duenzer
Signed-off-by: Mike Frysinger -
Signed-off-by: Mike Frysinger
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* 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl:
vfs: make no_llseek the default
vfs: don't use BKL in default_llseek
llseek: automatically add .llseek fop
libfs: use generic_file_llseek for simple_attr
mac80211: disallow seeks in minstrel debug code
lirc: make chardev nonseekable
viotape: use noop_llseek
raw: use explicit llseek file operations
ibmasmfs: use generic_file_llseek
spufs: use llseek in all file operations
arm/omap: use generic_file_llseek in iommu_debug
lkdtm: use generic_file_llseek in debugfs
net/wireless: use generic_file_llseek in debugfs
drm: use noop_llseek
22 Oct, 2010
2 commits
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Rather than use raw numbers for the GPIO pins, use proper GPIO defines.
Signed-off-by: Mike Frysinger
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This board has an AD1836 codec, so make sure we have the right resources
declared for it.Signed-off-by: Barry Song
Signed-off-by: Mike Frysinger
