14 May, 2019
2 commits
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We can calculate ddr bandwidth via virtual event read-bytes/write-bytes based
on ddr burst width, which actually share event read-cycles/write-cycles. Burst
width is 32bit on i.MX8 board till now.The ddr interface will generate 2 up edges and 2 down edges in an internal
clock cycle, so it can pass 4 beats of data. 4 bytes of each beat if ddr
burst width is 32 bit.Cmd bellow:
perf stat -a -e ddr0/read-bytes/ ls
perf stat -a -e ddr0/write-bytes/ lsSigned-off-by: Joakim Zhang
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The variable "total_event" should be 4 when we open 4 perf event, then
active_events[4] will out of range.Acked-by: Fugang Duan
Signed-off-by: Joakim Zhang
18 Apr, 2019
6 commits
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perf stat -a -e ddr0/axid-read,axi_id=MMMMDDDD/ cmd
MMMM AXI_MASKING
DDDD AXI_IDSigned-off-by: Frank Li
Signed-off-by: Arulpandiyan Vadivel -
[ 28.061044] perf[2494]: PC Alignment exception: pc=0000000072656d69 sp=ffff800032f2bd30
[ 28.069061] Internal error: Oops - SP/PC alignment exception: 8a000000 1 PREEMPT SMP
[ 28.077066] Modules linked in:
[ 28.080128] CPU: 2 PID: 2494 Comm: perf Not tainted 4.9.11-02540-g3ebe22c #52
[ 28.087263] Hardware name: Freescale i.MX8QXP LPDDR4 ARM2 (DT)
[ 28.093093] task: ffff80002e097080 task.stack: ffff800032f28000
[ 28.099011] PC is at 0x72656d69
[ 28.102163] LR is at perf_try_init_event+0x98/0xb0
[ 28.106950] pc : [] lr : [] pstate: 60000145Signed-off-by: Frank Li
Signed-off-by: Arulpandiyan Vadivel -
Added support for counter overflow interrupts.
When the cycles counter overflows, update all local event data,
then reset it and let it continue counting.Signed-off-by: Tiberiu Breana
[Arul: fsl-imx8qm.dtsi changes shall be added separately]
Signed-off-by: Arulpandiyan Vadivel -
Always enable cycles counter 0, regardless if it is explicitly
selected by the user or not. The cycles counter generates overflow
interrupts that will be used to update other counters.Signed-off-by: Tiberiu Breana
Signed-off-by: Arulpandiyan Vadivel -
- repurpose e2c_map array to a perf_event* array
- add ddr_perf_event_enable function
- tidy up indentingSigned-off-by: Tiberiu Breana
Signed-off-by: Arulpandiyan Vadivel -
perf stat -a -e ddr0/cycles/,ddr0/read-bytes/,ddr0/write-bytes/,ddr1/cycles/,d
dr1/read-bytes/,ddr1/write-bytes/ dd if=/dev/zero of=/dev/null bs=10M count=1
1+0 records in
1+0 records outPerformance counter stats for 'system wide':
7236174 ddr0/cycles/ (99.97%)
8573 ddr0/read-bytes/ (99.99%)
163628 ddr0/write-bytes/
7256543 ddr1/cycles/ (99.99%)
9308 ddr1/read-bytes/ (100.00%)
165039 ddr1/write-bytes/0.008990125 seconds time elapsed
Signed-off-by: Frank Li
Signed-off-by: Tiberiu Breana
Signed-off-by: Arulpandiyan Vadivel
06 Apr, 2019
1 commit
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[ Upstream commit 840018668ce2d96783356204ff282d6c9b0e5f66 ]
When pmu::setup_aux() is called the coresight PMU needs to know which
sink to use for the session by looking up the information in the
event's attr::config2 field.As such simply replace the cpu information by the complete perf_event
structure and change all affected customers.Signed-off-by: Mathieu Poirier
Reviewed-by: Suzuki Poulouse
Acked-by: Peter Zijlstra
Cc: Adrian Hunter
Cc: Alexander Shishkin
Cc: Alexei Starovoitov
Cc: Greg Kroah-Hartman
Cc: H. Peter Anvin
Cc: Heiko Carstens
Cc: Jiri Olsa
Cc: Mark Rutland
Cc: Martin Schwidefsky
Cc: Namhyung Kim
Cc: Thomas Gleixner
Cc: Will Deacon
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-s390@vger.kernel.org
Link: http://lkml.kernel.org/r/20190131184714.20388-2-mathieu.poirier@linaro.org
Signed-off-by: Arnaldo Carvalho de Melo
Signed-off-by: Sasha Levin
13 Feb, 2019
1 commit
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[ Upstream commit 754a58db6a556e6e5f5e32f3e84e7d67b5bf9c8e ]
devm_kasprintf() may return NULL on failure of internal allocation
thus the assignment to 'name' is not safe if unchecked. If NULL
is passed in for name then perf_pmu_register() would not fail
but rather silently jump to skip_type which is not the intent
here. As perf_pmu_register() may also return -ENOMEM returning
-ENOMEM in the (unlikely) failure case of devm_kasprintf() should
be fine here as well.Acked-by: Mark Rutland
Fixes: d5d9696b0380 ("drivers/perf: Add support for ARMv8.2 Statistical Profiling Extension")
Signed-off-by: Nicholas Mc Guire
[will: reworded error message]
Signed-off-by: Will Deacon
Signed-off-by: Sasha Levin
13 Jan, 2019
1 commit
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commit eb4f5213251833567570df1a09803f895653274d upstream.
For DDRC PMU, each PMU counter is fixed-purpose. There is a mismatch
between perf list and driver definition on rw_chg event.
# perf list | grep chg
hisi_sccl1_ddrc0/rnk_chg/ [Kernel PMU event]
hisi_sccl1_ddrc0/rw_chg/ [Kernel PMU event]
But the register offset of rw_chg event is not defined in the driver,
meanwhile bnk_chg register offset is mis-defined, let's fixup it.Fixes: 904dcf03f086 ("perf: hisi: Add support for HiSilicon SoC DDRC PMU driver")
Cc: stable@vger.kernel.org
Cc: John Garry
Cc: Will Deacon
Cc: Mark Rutland
Reported-by: Weijian Huang
Signed-off-by: Shaokun Zhang
Signed-off-by: Will Deacon
Signed-off-by: Greg Kroah-Hartman
12 Oct, 2018
1 commit
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It doesn't make sense for a perf event to be configured as a CHAIN event
in isolation, so extend the arm_pmu structure with a ->filter_match()
function to allow the backend PMU implementation to reject CHAIN events
early.Cc:
Reviewed-by: Suzuki K Poulose
Signed-off-by: Will Deacon
19 Aug, 2018
1 commit
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Pull char/misc driver updates from Greg KH:
"Here is the bit set of char/misc drivers for 4.19-rc1There is a lot here, much more than normal, seems like everyone is
writing new driver subsystems these days... Anyway, major things here
are:- new FSI driver subsystem, yet-another-powerpc low-level hardware
bus- gnss, finally an in-kernel GPS subsystem to try to tame all of the
crazy out-of-tree drivers that have been floating around for years,
combined with some really hacky userspace implementations. This is
only for GNSS receivers, but you have to start somewhere, and this
is great to see.Other than that, there are new slimbus drivers, new coresight drivers,
new fpga drivers, and loads of DT bindings for all of these and
existing drivers.All of these have been in linux-next for a while with no reported
issues"* tag 'char-misc-4.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (255 commits)
android: binder: Rate-limit debug and userspace triggered err msgs
fsi: sbefifo: Bump max command length
fsi: scom: Fix NULL dereference
misc: mic: SCIF Fix scif_get_new_port() error handling
misc: cxl: changed asterisk position
genwqe: card_base: Use true and false for boolean values
misc: eeprom: assignment outside the if statement
uio: potential double frees if __uio_register_device() fails
eeprom: idt_89hpesx: clean up an error pointer vs NULL inconsistency
misc: ti-st: Fix memory leak in the error path of probe()
android: binder: Show extra_buffers_size in trace
firmware: vpd: Fix section enabled flag on vpd_section_destroy
platform: goldfish: Retire pdev_bus
goldfish: Use dedicated macros instead of manual bit shifting
goldfish: Add missing includes to goldfish.h
mux: adgs1408: new driver for Analog Devices ADGS1408/1409 mux
dt-bindings: mux: add adi,adgs1408
Drivers: hv: vmbus: Cleanup synic memory free path
Drivers: hv: vmbus: Remove use of slow_virt_to_phys()
Drivers: hv: vmbus: Reset the channel callback in vmbus_onoffer_rescind()
...
27 Jul, 2018
1 commit
-
…ll/linux into aarch64/for-next/core
Pull in arm perf updates, including support for 64-bit (chained) event
counters and some non-critical fixes for some of the system PMU drivers.Signed-off-by: Will Deacon <will.deacon@arm.com>
26 Jul, 2018
1 commit
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Instead of checking the return value of platform_get_resource(), we can
use devm_ioremap_resource() which has the NULL pointer check and the
memory region requesting. devm_ioremap_resource is designed to replace
calls to devm_request_mem_region followed by devm_ioremap, so let's use
the same.Cc: Will Deacon
Cc: Mark Rutland
Signed-off-by: Sudeep Holla
Signed-off-by: Will Deacon
24 Jul, 2018
1 commit
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MT bit in MPIDR_EL1 is now supported in certain HiSilicon platforms, so
the mapping between sccl_id/ccl_id and affinity level needs to be updated
from the generic encoding we originally used.Cc: John Garry
Cc: Will Deacon
Cc: Mark Rutland
Signed-off-by: Shaokun Zhang
[will: fixed comment]
Signed-off-by: Will Deacon
16 Jul, 2018
1 commit
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We want the char-misc fixes in here as well.
Signed-off-by: Greg Kroah-Hartman
11 Jul, 2018
4 commits
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Add support for 64bit event by using chained event counters
and 64bit cycle counters.PMUv3 allows chaining a pair of adjacent 32-bit counters, effectively
forming a 64-bit counter. The low/even counter is programmed to count
the event of interest, and the high/odd counter is programmed to count
the CHAIN event, taken when the low/even counter overflows.For CPU cycles, when 64bit mode is requested, the cycle counter
is used in 64bit mode. If the cycle counter is not available,
falls back to chaining.Cc: Will Deacon
Acked-by: Mark Rutland
Signed-off-by: Suzuki K Poulose
Signed-off-by: Will Deacon -
The armpmu uses get_event_idx callback to allocate an event
counter for a given event, which marks the selected counter
as "used". Now, when we delete the counter, the arm_pmu goes
ahead and clears the "used" bit and then invokes the "clear_event_idx"
call back, which kind of splits the job between the core code
and the backend. To keep things tidy, mandate the implementation
of clear_event_idx() and add it for exisiting backends.
This will be useful for adding the chained event support, where
we leave the event idx maintenance to the backend.Also, when an event is removed from the PMU, reset the hw.idx
to indicate that a counter is not allocated for this event,
to help the backends do better checks. This will be also used
for the chain counter support.Cc: Will Deacon
Cc: Mark Rutland
Reviewed-by: Julien Thierry
Signed-off-by: Suzuki K Poulose
Signed-off-by: Will Deacon -
Each PMU has a set of 32bit event counters. But in some
special cases, the events could be counted using counters
which are effectively 64bit wide.e.g, Arm V8 PMUv3 has a 64 bit cycle counter which can count
only the CPU cycles. Also, the PMU can chain the event counters
to effectively count as a 64bit counter.Add support for tracking the events that uses 64bit counters.
This only affects the periods set for each counter in the core
driver.Cc: Will Deacon
Reviewed-by: Julien Thierry
Acked-by: Mark Rutland
Signed-off-by: Suzuki K Poulose
Signed-off-by: Will Deacon -
Each PMU defines their max_period of the counter as the maximum
value that can be counted. Since all the PMU backends support
32bit counters by default, let us remove the redundant field.No functional changes.
Cc: Will Deacon
Acked-by: Mark Rutland
Reviewed-by: Julien Thierry
Signed-off-by: Suzuki K Poulose
Signed-off-by: Will Deacon
07 Jul, 2018
1 commit
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At over 4000 #includes, is the 9th most
#included header file in the Linux kernel. It does not need
, so drop that header and explicitly add
to source files that need it.4146 #include
After this patch, there are 225 files that use ,
for a reduction of around 3900 times that
does not have to be read & parsed.225 #include
This patch was build-tested on 20 different arch-es.
It also makes these drivers SubmitChecklist#1 compliant.
Signed-off-by: Randy Dunlap
Reported-by: kbuild test robot # drivers/media/platform/vimc/
Reported-by: kbuild test robot # drivers/pinctrl/pinctrl-u300.c
Signed-off-by: Greg Kroah-Hartman
04 Jul, 2018
1 commit
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If a PMU doesn't have any IRQs, we should return 0 from
armpmu_request_irqs(), rather than uninitialised stack.Signed-off-by: Will Deacon
02 Jul, 2018
1 commit
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In the quest to remove all stack VLA usage from the kernel[1], this
removes the VLA in favor of a maximum size and adds a sanity check
at registration time. The sizes are all explicitly enumerated already,
so this just collects them into macros.[1] https://lkml.kernel.org/r/CA+55aFzCG-zNmZwX4A2FQpadafLfEzK6CC=qPXydAacU1RqZWA@mail.gmail.com
Signed-off-by: Kees Cook
Signed-off-by: Will Deacon
19 Jun, 2018
1 commit
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This patch fixes the below parser error of the IOB SLOW PMU.
# perf stat -a -e iob-slow0/cycle-count/ sleep 1
evenf syntax error: 'iob-slow0/cycle-count/'
\___ parser errorIt replaces the "-" character by "_" character inside the PMU name.
Signed-off-by: Hoan Tran
Signed-off-by: Will Deacon
29 May, 2018
1 commit
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When the arm-cci driver is enabled, but both CONFIG_ARM_CCI5xx_PMU and
CONFIG_ARM_CCI400_PMU are not, we get a warning about how parts of
the driver are never used:drivers/perf/arm-cci.c:1454:29: error: 'cci_pmu_models' defined but not used [-Werror=unused-variable]
drivers/perf/arm-cci.c:693:16: error: 'cci_pmu_event_show' defined but not used [-Werror=unused-function]
drivers/perf/arm-cci.c:685:16: error: 'cci_pmu_format_show' defined but not used [-Werror=unused-function]Marking all three functions as __maybe_unused avoids the warnings in
randconfig builds. I'm doing this lacking any ideas for a better fix.Fixes: 3de6be7a3dd8 ("drivers/bus: Split Arm CCI driver")
Reviewed-by: Robin Murphy
Signed-off-by: Arnd Bergmann
Signed-off-by: Will Deacon
23 May, 2018
1 commit
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Since commit bddb9b68d3fb ("drivers/perf: commonise PERF_EVENTS
dependency"), all perf drivers depend on PERF_EVENTS config under a
common menu.Config ARM_SPE_PMU still declares explicitly a dependency on
PERF_EVENTS, which is unneeded, so remove it.Acked-by: Mark Rutland
Signed-off-by: John Garry
Signed-off-by: Will Deacon
22 May, 2018
7 commits
-
The ARM CCN PMU driver uses dev_warn() to complain about parameters in
the user-provided perf_event_attr. This means that under normal
operation (e.g. a single invocation of the perf tool), a number of
messages warnings may be logged to dmesg.Tools may issue multiple syscalls to probe for feature support, and
multiple applications (from multiple users) can attempt to open events
simultaneously, so this is not very helpful, even if a user happens to
have access to dmesg. Worse, this can push important information out of
the dmesg ring buffer, and can significantly slow down syscall fuzzers,
vastly increasing the time it takes to find critical bugs.Demote the dev_warn() instances to dev_dbg(), as is the case for all
other PMU drivers under drivers/perf/. Users who wish to debug PMU event
initialisation can enable dynamic debug to receive these messages.Signed-off-by: Mark Rutland
Cc: Pawel Moll
Cc: Will Deacon
Signed-off-by: Will Deacon -
Fill in the few extra bits and annotations needed to make the driver
work properly as a module, and jiggle the Kconfig to expose the
driver-level ARM_CCI_PMU option.Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon -
The CCI PMU driver bears some legacy remnants of the arm_pmu framework
from when it was split in c6f85cb4305b ("bus: cci: move away from
arm_pmu framework"). In particular this perf_pmu_{dis,en}able() dance
around pmu->add which was fixed for arm_pmu in a9e469d1c89b
("drivers/perf: arm_pmu: remove pointless PMU disabling").For the exact same reasons (i.e. perf core already does this around the
call anyway), give cci_pmu_add() the exact same change, which also
prevents having to export those core functions to build it as a module.Acked-by: Mark Rutland
Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon -
The CCI/CCN drivers are licensed under GPLv2, but the MODULE_LICENSE()
tags are using the bare "GPL" string implying GPLv2 or later. Fix them
to match their actual file license.Acked-by: Pawel Moll
Acked-by: Suzuki K Poulose
Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon -
The arm_pmu::handle_irq() callback has the same prototype as a generic
IRQ handler, taking the IRQ number and a void pointer argument which it
must convert to an arm_pmu pointer.This means that all arm_pmu::handle_irq() take an IRQ number they never
use, and all must explicitly cast the void pointer to an arm_pmu
pointer.Instead, let's change arm_pmu::handle_irq to take an arm_pmu pointer,
allowing these casts to be removed. The redundant IRQ number parameter
is also removed.Suggested-by: Hoeun Ryu
Signed-off-by: Mark Rutland
Cc: Will Deacon
Signed-off-by: Will Deacon -
Since sampling events are rejected up-front by cci_pmu_event_init(), it
doesn't make much sense to go fiddling with the sampling period later.
This would seem to be just another leftover artefact of the arm_pmu
framwork, and as such can go.Acked-by: Mark Rutland
Signed-off-by: Robin Murphy
Signed-off-by: Will Deacon -
We should get drvdata from struct device directly. Going via
platform_device is an unneeded step back and forth.Signed-off-by: Wolfram Sang
Signed-off-by: Will Deacon
06 Apr, 2018
1 commit
-
Pull ARM SoC driver updates from Arnd Bergmann:
"The main addition this time around is the new ARM "SCMI" framework,
which is the latest in a series of standards coming from ARM to do
power management in a platform independent way.This has been through many review cycles, and it relies on a rather
interesting way of using the mailbox subsystem, but in the end I
agreed that Sudeep's version was the best we could do after all.Other changes include:
- the ARM CCN driver is moved out of drivers/bus into drivers/perf,
which makes more sense. Similarly, the performance monitoring
portion of the CCI driver are moved the same way and cleaned up a
little more.- a series of updates to the SCPI framework
- support for the Mediatek mt7623a SoC in drivers/soc
- support for additional NVIDIA Tegra hardware in drivers/soc
- a new reset driver for Socionext Uniphier
- lesser bug fixes in drivers/soc, drivers/tee, drivers/memory, and
drivers/firmware and drivers/reset across platforms"* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits)
reset: uniphier: add ethernet reset control support for PXs3
reset: stm32mp1: Enable stm32mp1 reset driver
dt-bindings: reset: add STM32MP1 resets
reset: uniphier: add Pro4/Pro5/PXs2 audio systems reset control
reset: imx7: add 'depends on HAS_IOMEM' to fix unmet dependency
reset: modify the way reset lookup works for board files
reset: add support for non-DT systems
clk: scmi: use devm_of_clk_add_hw_provider() API and drop scmi_clocks_remove
firmware: arm_scmi: prevent accessing rate_discrete uninitialized
hwmon: (scmi) return -EINVAL when sensor information is unavailable
amlogic: meson-gx-socinfo: Update soc ids
soc/tegra: pmc: Use the new reset APIs to manage reset controllers
soc: mediatek: update power domain data of MT2712
dt-bindings: soc: update MT2712 power dt-bindings
cpufreq: scmi: add thermal dependency
soc: mediatek: fix the mistaken pointer accessed when subdomains are added
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC
soc: mediatek: avoid hardcoded value with bus_prot_mask
dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC
...
05 Apr, 2018
1 commit
-
Pull arm64 updates from Will Deacon:
"Nothing particularly stands out here, probably because people were
tied up with spectre/meltdown stuff last time around. Still, the main
pieces are:- Rework of our CPU features framework so that we can whitelist CPUs
that don't require kpti even in a heterogeneous system- Support for the IDC/DIC architecture extensions, which allow us to
elide instruction and data cache maintenance when writing out
instructions- Removal of the large memory model which resulted in suboptimal
codegen by the compiler and increased the use of literal pools,
which could potentially be used as ROP gadgets since they are
mapped as executable- Rework of forced signal delivery so that the siginfo_t is
well-formed and handling of show_unhandled_signals is consolidated
and made consistent between different fault types- More siginfo cleanup based on the initial patches from Eric
Biederman- Workaround for Cortex-A55 erratum #1024718
- Some small ACPI IORT updates and cleanups from Lorenzo Pieralisi
- Misc cleanups and non-critical fixes"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (70 commits)
arm64: uaccess: Fix omissions from usercopy whitelist
arm64: fpsimd: Split cpu field out from struct fpsimd_state
arm64: tlbflush: avoid writing RES0 bits
arm64: cmpxchg: Include linux/compiler.h in asm/cmpxchg.h
arm64: move percpu cmpxchg implementation from cmpxchg.h to percpu.h
arm64: cmpxchg: Include build_bug.h instead of bug.h for BUILD_BUG
arm64: lse: Include compiler_types.h and export.h for out-of-line LL/SC
arm64: fpsimd: include in fpsimd.h
drivers/perf: arm_pmu_platform: do not warn about affinity on uniprocessor
perf: arm_spe: include linux/vmalloc.h for vmap()
Revert "arm64: Revert L1_CACHE_SHIFT back to 6 (64-byte cache line size)"
arm64: cpufeature: Avoid warnings due to unused symbols
arm64: Add work around for Arm Cortex-A55 Erratum 1024718
arm64: Delay enabling hardware DBM feature
arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35
arm64: capabilities: Handle shared entries
arm64: capabilities: Add support for checks based on a list of MIDRs
arm64: Add helpers for checking CPU MIDR against a range
arm64: capabilities: Clean up midr range helpers
arm64: capabilities: Change scope of VHE to Boot CPU feature
...
27 Mar, 2018
2 commits
-
If there is exactly one CPU present, there is no ambiguity: do not warn
that PMU setup would need to guess IRQ affinity.Cc: Mark Rutland
Cc: Will Deacon
Signed-off-by: Alexander Monakov
Signed-off-by: Will Deacon -
On linux-next, I get a build failure in some configurations:
drivers/perf/arm_spe_pmu.c: In function 'arm_spe_pmu_setup_aux':
drivers/perf/arm_spe_pmu.c:857:14: error: implicit declaration of function 'vmap'; did you mean 'swap'? [-Werror=implicit-function-declaration]
buf->base = vmap(pglist, nr_pages, VM_MAP, PAGE_KERNEL);
^~~~
swap
drivers/perf/arm_spe_pmu.c:857:37: error: 'VM_MAP' undeclared (first use in this function); did you mean 'VM_MPX'?
buf->base = vmap(pglist, nr_pages, VM_MAP, PAGE_KERNEL);
^~~~~~
VM_MPX
drivers/perf/arm_spe_pmu.c:857:37: note: each undeclared identifier is reported only once for each function it appears in
drivers/perf/arm_spe_pmu.c: In function 'arm_spe_pmu_free_aux':
drivers/perf/arm_spe_pmu.c:878:2: error: implicit declaration of function 'vunmap'; did you mean 'iounmap'? [-Werror=implicit-function-declaration]vmap() is declared in linux/vmalloc.h, so we should include that header file.
Acked-by: Mark Rutland
Signed-off-by: Arnd Bergmann
[will: add additional missing #includes reported by Mark]
Signed-off-by: Will Deacon
20 Mar, 2018
1 commit
-
Signed-off-by: Ingo Molnar
17 Mar, 2018
1 commit
-
Mark noticed that the change to sibling_list changed some iteration
semantics; because previously we used group_list as list entry,
sibling events would always have an empty sibling_list.But because we now use sibling_list for both list head and list entry,
siblings will report as having siblings.Fix this with a custom for_each_sibling_event() iterator.
Fixes: 8343aae66167 ("perf/core: Remove perf_event::group_entry")
Reported-by: Mark Rutland
Suggested-by: Mark Rutland
Signed-off-by: Peter Zijlstra (Intel)
Signed-off-by: Thomas Gleixner
Cc: vincent.weaver@maine.edu
Cc: alexander.shishkin@linux.intel.com
Cc: torvalds@linux-foundation.org
Cc: alexey.budankov@linux.intel.com
Cc: valery.cherepennikov@intel.com
Cc: eranian@google.com
Cc: acme@redhat.com
Cc: linux-tip-commits@vger.kernel.org
Cc: davidcc@google.com
Cc: kan.liang@intel.com
Cc: Dmitry.Prohorov@intel.com
Cc: jolsa@redhat.com
Link: https://lkml.kernel.org/r/20180315170129.GX4043@hirez.programming.kicks-ass.net
