09 Jun, 2017
40 commits
-
Add rpmsg-keys driver on i.mx7ulp-evk board since vol+/vol- keys
are connected on m4 side and have to get the status of keys by
rpmsg.Signed-off-by: Robin Gong
[Irina: updated for 4.9 APIs]
Signed-off-by: Irina Tirdea -
fsl_asrc_reset can be called from interrupt context with interrupts
disabled via sdma_int_handler -> imx_pcm_dma_complete. In this case we
need to make sure we don't reenable interrupts.However, start_unlock_stream uses the _irq version of
snd_pcm_stream_unlock which means that interrupts will be enabled at
the end of that function.This patch switches to the _irqsave/_irqrestore version of
snd_cpm_stream_lock/unlock to avoid the above issue and fix the
following warning:------------[ cut here ]------------
WARNING: CPU: 0 PID: 0 at kernel/irq/handle.c:151 __handle_irq_event_percpu+0x150/0x154
irq 61 handler sdma_int_handler+0x0/0x34c enabled interrupts
Modules linked in:
CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.9.11-02052-g4c94f9e-dirty #684
Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[] (unwind_backtrace) from [] (show_stack+0x10/0x14)
[] (show_stack) from [] (dump_stack+0x88/0x9c)
[] (dump_stack) from [] (__warn+0xe8/0x100)
[] (__warn) from [] (warn_slowpath_fmt+0x38/0x48)
[] (warn_slowpath_fmt) from [] (__handle_irq_event_percpu+0x150/0x154)
[] (__handle_irq_event_percpu) from [] (handle_irq_event_percpu+0x1c/0x58)
[] (handle_irq_event_percpu) from [] (handle_irq_event+0x38/0x5c)
[] (handle_irq_event) from [] (handle_fasteoi_irq+0xd0/0x1a8)
[] (handle_fasteoi_irq) from [] (generic_handle_irq+0x24/0x34)
[] (generic_handle_irq) from [] (__handle_domain_irq+0x7c/0xec)
[] (__handle_domain_irq) from [] (gic_handle_irq+0x48/0x8c)
[] (gic_handle_irq) from [] (__irq_svc+0x6c/0xa8)
Exception stack(0x80f01f20 to 0x80f01f68)
1f20: 00000000 00000002 00000001 f4a00600 00000001 daf1ce68 4f334151 00000014
1f40: 4ef44986 00000014 00000004 80f03144 8010e30c 80f01f70 80999fb8 806c8808
1f60: 200f0013 ffffffff
[] (__irq_svc) from [] (cpuidle_enter_state+0xec/0x264)
[] (cpuidle_enter_state) from [] (cpu_startup_entry+0x148/0x21c)
[] (cpu_startup_entry) from [] (start_kernel+0x37c/0x388)
---[ end trace c7e4dec8204cf86b ]---Signed-off-by: Octavian Purdila
Reviewed-by: Daniel Baluta -
We only have below cases to disconnect line when suspend:
1. Device mode without connection to any host/charger(no vbus).
2. Device mode connect to a charger(w/ vbus), usb suspend when
system is entering suspend.
This patch can fix usb phy wrongly does disconnect line in case
some usb host enters suspend but vbus is off.Signed-off-by: Li Jun
(cherry picked from commit 2af48913f77cec3658f5863b13f63619d8101279) -
After enters one specific role, notify usb phy driver.
Signed-off-by: Li Jun
(cherry picked from commit d3aa2a13f4e47bc7fae7f2eee1e86291d7513312) -
USB phy driver may need to know the current working mode of
the controller, and does some different settings according to
host mode or device mode.Signed-off-by: Li Jun
(cherry picked from commit 2286cb30feedd6f4a5cb82a0f0af5aa3a04ab698) -
Enable ID change wakeup for OTG; and VBUS wakeup for OTG and
peripheral only mode.Acked-by: Peter Chen
Signed-off-by: Li Jun -
Function .fec_resume() had called .fec_restart() before phy resume to ensure
MAC mii bus can work, but the firth .adjust_link() call .fec_restart() to re-init
the MAC again that is not necessary since PHY duplex and speed have no change
during suspend status, so remove the unnecessary mac re-inited after resume back.Signed-off-by: Fugang Duan
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In 3 channels, ESAI is set to I2S mode and two dataline, so actually
ESAI is working in 4 channels mode, (we can't get correct 3 channels,
for we can't make one dataline working in 2 channel, another dataline
working in 1 channels).In this case, we fill channels (3) zero data to FIFO in start phase,
which should cause channel swap, that we need to fill 4 zero data to
FIFO for ESAI working in 4 channels mode actually.Signed-off-by: Shengjiu Wang
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There is noise when use ssi master mode. the reason is the ssi rate
is not accurate for ssi master mode, show below.pll3_pfd2_508m 0 0 508235294 0 0
ssi3_sel 0 0 508235294 0 0
ssi3_pred 0 0 127058824 0 0
ssi3_podf 0 0 63529412 0 0
ssi3 0 0 63529412 0 0
ssi2_sel 0 0 508235294 0 0
ssi2_pred 0 0 127058824 0 0
ssi2_podf 0 0 63529412 0 0
ssi2 0 0 63529412 0 0so we need to switch ssi's parent to pll4 (which is dedicate audio pll),
and set a proper rate for pll4, we select 786432000Hz, which can
generate 32kHz,48kHz,96KHz.Signed-off-by: Shengjiu Wang
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Add warning message for both divider of input clock and output clock
exceed the maximum value. which is useful for debugging.Signed-off-by: Shengjiu Wang
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spdif clock is one of the asrc clock source, which is used
for ideal ratio mode. when set to 98.304MHz, it cause the
divider of asrc input clock and output clock exceed the
maximum value, and asrc driver saturate the value to maximum
value, which will cause the ASRC's performance very bad.
So we need to set spdif clock to a proper rate. which make asrc
divider not exceed maximum value, at least one of divider not
exceed maximum value.
The target is spdif clock rate / output(or input) sample rate
less than 1024(which is maximum divider).Signed-off-by: Shengjiu Wang
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enable sim for imx6ul
Signed-off-by: Gao Pan
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Kernel space cannot access user space memory directly.
In fact, the issue always exited. Since 4.4, the kernel
handle the action as page abort.Signed-off-by: Gao Pan
Signed-off-by: Fugang Duan -
Make sure we reparent pll1_sys to pll1_bypass before changing it's
rate. Otherwise, it may happen that pll1_sys is "parented" to
pll1_bypass_src like this:osc
pll1 0 0 996000000 0 0
pll1_bypass_src 0 0 24000000 0 0
pll1_bypass 0 0 24000000 0 0
pll1_sys 0 0 24000000 0 0in which case changing the rate of pll1_sys won't propagate up to pll1
and we will end up with a different pll1_sys rate than requested.This fixes an issue where cpufreq can't properly switch to 792Mhz:
$ cpufreq-set -f 996000
$ cpufreq-set -f 396000
$ cpufreq-set -f 792000
$ cat /sys/kernel/debug/clk/clk_summary
pll1 1 1 996000000 0 0
pll1_bypass 1 1 996000000 0 0
pll1_sys 1 1 996000000 0 0
pll1_sw 1 1 996000000 0 0
arm 2 2 498000000 0 0Signed-off-by: Octavian Purdila
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Sensors are connected to M4 and not to A-Core.
Sensors will not be exposed to A-Core via standard
i2c interface but via an i2c proxy layer over rpmsg.Remove the dts entry to avoid the probe error messages and
add a separate dts file for the case where someone wishes to
rework the board themselves and connect sensors for testing purposes.Signed-off-by: Adriana Reus
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This also fixes the following warning:
drivers/cpufreq/cpufreq_interactive.c: In function 'choose_freq':
drivers/cpufreq/cpufreq_interactive.c:284:7: warning: 'ret' may be used uninitialized in this function [-Wmaybe-uninitialized]
if (ret)
^Signed-off-by: Octavian Purdila
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Signed-off-by: Adriana Reus
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The imx7 sleep code will save and restore UART1 registers on
suspend/resume. It does this by fetching the address base using an
absolute devicetree path. Fix that path in 4.9 where the DTS is closer
to the one in upstream.Signed-off-by: Leonard Crestez
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imxcommunity reports that Intel Wireless 3160 doesn't
work if the perst# is toggled before the release of rc
controller's reset.Specification doesn't specify the exactly sequence of
the toggle of the perst# and the release of the rc
controller reset. Just find the following description
in the chapter 4.2.2 of the PCI Local Bus Specification."The system must guarantee that the bus remains in the idle
state for a minimum time delay following the deassertion
of RST# to a device before the system will permit the first
assertion of FRAME#."Toggle the perst# after the release of rc's reset to
fix the issue.Signed-off-by: Richard Zhu
(cherry picked from commit ba75c5e4795ab36d7765fe3ac03f0c4320828c78) -
Clear the variable screeninfo structure when the overlay
fb is opened has the side effect of deleting timings info
of overlay fb.Signed-off-by: Fancy Fang
(cherry picked from commit 9fd7656d75de224d3e825930cd3f894408fbad40) -
During overlay fb initialization, check the variable screeninfo
to get some required values for variable screeninfo.Signed-off-by: Fancy Fang
(cherry picked from commit d2dff36f18a41419055e529bd45d9a264fbc25d5) -
During overlay fb initialization, copy the timings information
of primary fb to init the timings of overlay fb.Signed-off-by: Fancy Fang
(cherry picked from commit e47da3a65d32faec2fac7926b50980f0aa822343) -
Use the videomode of primary fb as the default videomode
for overlay fb during overlay fb initialization process.Signed-off-by: Fancy Fang
(cherry picked from commit c3f12ccefc2025fbe4b9280e5715767f6dc72442) -
Don't clear the 'LCDC_AS_CTRL' and 'LCDC_AS_NEXT_BUF' registers
in the function 'overlayfb_release()', since the next user may
enable overlay fb without calling set_par first.Signed-off-by: Fancy Fang
(cherry picked from commit 167b1f430d2bb178d22f32f790d55b08352a6a87) -
disable debug information for focaltech touch.
Signed-off-by: Gao Pan
(cherry picked from commit b88a0ed7837ab964253f710da03fdab481592350) -
Move the 'lcd_inited' flag status modification from
'mipi_dsi_disable' to 'mipi_dsi_suspend' to make sure
this flag to be set to 0 during system suspend.Signed-off-by: Fancy Fang
(cherry picked from commit 02d805b48bfb1fc637f9ccce4ed7ae59d62e7d2f) -
The mipi pll has three factors to calculate the output clock
frequency. So create a new structure to hold them for convinience.Signed-off-by: Fancy Fang
(cherry picked from commit 27b71152096bb43fd94ce0a8bb047bb85aa6ec84) -
Enable 640x480@60Hz 24bpp RGB display mode for ADV7535. And the display
mode cannot be changed dynamically, since the exact pixel clock cannot
be get through current clock subsystem dynamically.Signed-off-by: Fancy Fang
(cherry picked from commit a602e2adda52a1f6e9a924eff28ebbd657fb9de6) -
The mpll can only be configured by mipi dphy and it is disabled
by default. And it is also not a fixed frequency clock source.
So replace it with a dummy clock for 'periph_slow_sels' to avoid
any peripheral except mipi to use it for clock source.Signed-off-by: Fancy Fang
(cherry picked from commit a7c6555e0d79491b939b84af99969b21264ec9f8)Conflicts:
arch/arm/mach-imx/clk-imx7ulp.c -
The northwest mipi dsi on imx7ulp board has an ADV7535 dsi-to-hdmi
encoder. Enable the encoder support in the dsi driver.Signed-off-by: Fancy Fang
(cherry picked from commit a6e2da1935d893860cd389ce8360e89434f5fd50) -
Add build support for ADV7535 kernel driver.
Signed-off-by: Fancy Fang
(cherry picked from commit 124ff1d4de5bc93d5bd2c68ac0fcb4f414b199ef) -
Implement the initial driver for the I2C device
ADV7535.Signed-off-by: Fancy Fang
(cherry picked from commit 274e17dd0cb6068a94103c948aa1a032e52b8efa) -
Create a new dts file 'imx7ulp-evk-hdmi.dts' to enable hdmi
display to avoids conflict with mipi dsi panel display. Use
endpoint to connect dsi controller and adv7535.Signed-off-by: Fancy Fang
(cherry picked from commit 86fb9340d01a4583628d465f29fba67df93c453c) -
ADV7535 is a low-power MIPI-DSI receiver with HDMI 1.4 compliant
transmitter. And it's an I2C device attached by lpi2c5.Signed-off-by: Fancy Fang
(cherry picked from commit 0bbfb671445d1f2d5037ea7168ebcb4699760095) -
Add the 'data-lanes-num' and 'max-data-rate' properties which
are used to describe this mipi dsi capabilites.Signed-off-by: Fancy Fang
(cherry picked from commit bfe7d0e1c6931467f00a382e48aa592bf50c9339) -
Assign the 'mode' field of fb_info structure to show correct
content when running "cat /sys/class/graphics/fb0/mode".Signed-off-by: Fancy Fang
(cherry picked from commit 06a16560683047681c46b680efef7af58c75b6b2) -
Add VLLS mode support for NorthWest MIPI DSI controller.
Signed-off-by: Fancy Fang
(cherry picked from commit 9a0fb27dc67fb0d156ca6d5a09349b7163cfcfd2) -
The initial params for overlay fb should be setup during
its initialization to make it in a determined state before
using it.Signed-off-by: Fancy Fang
(cherry picked from commit f3d3d58165f9f36af85a46256cacc274b2d0b107) -
Clear the overlay fb memory buffer after allocated to avoid
random pixel data in it before using it.Signed-off-by: Fancy Fang
(cherry picked from commit 6b1a31b8fc39c7cf19ff3dcdc57f2f4059632f45) -
The overlayfb_enable() function would call fb0 info lock,
so in some overlay functions which may call overlay_enable()
should not lock the fb0 info.Signed-off-by: Fancy Fang
(cherry picked from commit ec53f89c7f702aa56e7fe6f360e23582ed78302f)