18 Jul, 2015

1 commit


02 Jul, 2015

2 commits

  • Merge third patchbomb from Andrew Morton:

    - the rest of MM

    - scripts/gdb updates

    - ipc/ updates

    - lib/ updates

    - MAINTAINERS updates

    - various other misc things

    * emailed patches from Andrew Morton : (67 commits)
    genalloc: rename of_get_named_gen_pool() to of_gen_pool_get()
    genalloc: rename dev_get_gen_pool() to gen_pool_get()
    x86: opt into HAVE_COPY_THREAD_TLS, for both 32-bit and 64-bit
    MAINTAINERS: add zpool
    MAINTAINERS: BCACHE: Kent Overstreet has changed email address
    MAINTAINERS: move Jens Osterkamp to CREDITS
    MAINTAINERS: remove unused nbd.h pattern
    MAINTAINERS: update brcm gpio filename pattern
    MAINTAINERS: update brcm dts pattern
    MAINTAINERS: update sound soc intel patterns
    MAINTAINERS: remove website for paride
    MAINTAINERS: update Emulex ocrdma email addresses
    bcache: use kvfree() in various places
    libcxgbi: use kvfree() in cxgbi_free_big_mem()
    target: use kvfree() in session alloc and free
    IB/ehca: use kvfree() in ipz_queue_{cd}tor()
    drm/nouveau/gem: use kvfree() in u_free()
    drm: use kvfree() in drm_free_large()
    cxgb4: use kvfree() in t4_free_mem()
    cxgb3: use kvfree() in cxgb_free_mem()
    ...

    Linus Torvalds
     
  • Pull module updates from Rusty Russell:
    "Main excitement here is Peter Zijlstra's lockless rbtree optimization
    to speed module address lookup. He found some abusers of the module
    lock doing that too.

    A little bit of parameter work here too; including Dan Streetman's
    breaking up the big param mutex so writing a parameter can load
    another module (yeah, really). Unfortunately that broke the usual
    suspects, !CONFIG_MODULES and !CONFIG_SYSFS, so those fixes were
    appended too"

    * tag 'modules-next-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux: (26 commits)
    modules: only use mod->param_lock if CONFIG_MODULES
    param: fix module param locks when !CONFIG_SYSFS.
    rcu: merge fix for Convert ACCESS_ONCE() to READ_ONCE() and WRITE_ONCE()
    module: add per-module param_lock
    module: make perm const
    params: suppress unused variable error, warn once just in case code changes.
    modules: clarify CONFIG_MODULE_COMPRESS help, suggest 'N'.
    kernel/module.c: avoid ifdefs for sig_enforce declaration
    kernel/workqueue.c: remove ifdefs over wq_power_efficient
    kernel/params.c: export param_ops_bool_enable_only
    kernel/params.c: generalize bool_enable_only
    kernel/module.c: use generic module param operaters for sig_enforce
    kernel/params: constify struct kernel_param_ops uses
    sysfs: tightened sysfs permission checks
    module: Rework module_addr_{min,max}
    module: Use __module_address() for module_address_lookup()
    module: Make the mod_tree stuff conditional on PERF_EVENTS || TRACING
    module: Optimize __module_address() using a latched RB-tree
    rbtree: Implement generic latch_tree
    seqlock: Introduce raw_read_seqcount_latch()
    ...

    Linus Torvalds
     

01 Jul, 2015

1 commit

  • To be consistent with other kernel interface namings, rename
    of_get_named_gen_pool() to of_gen_pool_get(). In the original function
    name "_named" suffix references to a device tree property, which contains
    a phandle to a device and the corresponding device driver is assumed to
    register a gen_pool object.

    Due to a weak relation and to avoid any confusion (e.g. in future
    possible scenario if gen_pool objects are named) the suffix is removed.

    [sfr@canb.auug.org.au: crypto/marvell/cesa - fix up for of_get_named_gen_pool() rename]
    Signed-off-by: Vladimir Zapolskiy
    Cc: Nicolas Ferre
    Cc: Philipp Zabel
    Cc: Shawn Guo
    Cc: Sascha Hauer
    Cc: Alexandre Belloni
    Cc: Russell King
    Cc: Mauro Carvalho Chehab
    Cc: Vinod Koul
    Cc: Takashi Iwai
    Cc: Jaroslav Kysela
    Signed-off-by: Stephen Rothwell
    Cc: Herbert Xu
    Cc: Boris BREZILLON
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Vladimir Zapolskiy
     

30 Jun, 2015

1 commit

  • Pull dmaengine updates from Vinod Koul:
    "This time we have support for few new devices, few new features and
    odd fixes spread thru the subsystem.

    New devices added:
    - support for CSRatlas7 dma controller
    - Allwinner H3(sun8i) controller
    - TI DMA crossbar driver on DRA7x
    - new pxa driver

    New features added:
    - memset support is bought back now that we have a user in xdmac controller
    - interleaved transfers support different source and destination strides
    - supporting DMA routers and configuration thru DT
    - support for reusing descriptors
    - xdmac memset and interleaved transfer support
    - hdmac support for interleaved transfers
    - omap-dma support for memcpy

    Others:
    - Constify platform_device_id
    - mv_xor fixes and improvements"

    * tag 'dmaengine-4.2-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (46 commits)
    dmaengine: xgene: fix file permission
    dmaengine: fsl-edma: clear pending interrupts on initialization
    dmaengine: xdmac: Add memset support
    Documentation: dmaengine: document DMA_CTRL_ACK
    dmaengine: virt-dma: don't always free descriptor upon completion
    dmaengine: Revert "drivers/dma: remove unused support for MEMSET operations"
    dmaengine: hdmac: Implement interleaved transfers
    dmaengine: Move icg helpers to global header
    dmaengine: mv_xor: improve descriptors list handling and reduce locking
    dmaengine: mv_xor: Enlarge descriptor pool size
    dmaengine: mv_xor: add support for a38x command in descriptor mode
    dmaengine: mv_xor: Rename function for consistent naming
    dmaengine: mv_xor: bug fix for racing condition in descriptors cleanup
    dmaengine: pl330: fix wording in mcbufsz message
    dmaengine: sirf: add CSRatlas7 SoC support
    dmaengine: xgene-dma: Fix "incorrect type in assignement" warnings
    dmaengine: fix kernel-doc documentation
    dmaengine: pxa_dma: add support for legacy transition
    dmaengine: pxa_dma: add debug information
    dmaengine: pxa: add pxa dmaengine driver
    ...

    Linus Torvalds
     

27 Jun, 2015

1 commit

  • Pull tty/serial driver updates from Greg KH:
    "Here's the tty and serial driver patches for 4.2-rc1.

    A number of individual driver updates, some code cleanups, and other
    minor things, full details in the shortlog.

    All have been in linux-next for a while with no reported issues"

    * tag 'tty-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (152 commits)
    Doc: serial-rs485.txt: update RS485 driver interface
    Doc: tty.txt: remove mention of the BKL
    MAINTAINERS: tty: add serial docs directory
    serial: sprd: check for NULL after calling devm_clk_get
    serial: 8250_pci: Correct uartclk for xr17v35x expansion chips
    serial: 8250_pci: Add support for 12 port Exar boards
    serial: 8250_uniphier: add bindings document for UniPhier UART
    serial: core: cleanup in uart_get_baud_rate()
    serial: stm32-usart: Add STM32 USART Driver
    tty/serial: kill off set_irq_flags usage
    tty: move linux/gsmmux.h to uapi
    doc: dt: add documentation for nxp,lpc1850-uart
    serial: 8250: add LPC18xx/43xx UART driver
    serial: 8250_uniphier: add UniPhier serial driver
    serial: 8250_dw: support ACPI platforms with integrated DMA engine
    serial: of_serial: check the return value of clk_prepare_enable()
    serial: of_serial: use devm_clk_get() instead of clk_get()
    serial: earlycon: Add support for big-endian MMIO accesses
    serial: sirf: use hrtimer for data rx
    serial: sirf: correct the fifo empty_bit
    ...

    Linus Torvalds
     

26 Jun, 2015

1 commit

  • Pull sound updates from Takashi Iwai:
    "It was a busy development cycle at this time, as you can see a wide
    range of changes in diffstat. There are no big changes but many
    refactoring and improvements. Here we go some highlights:

    ALSA core:
    - Procfs codes were cleaned up to use seq_file
    - Procfs can be opt out via Kconfig (only for EXPERT)
    - Two types of jack API were unified finally; now both kctl and input
    jack devs are handled via a single function call.

    HD-audio:
    - Continued code restructuring for the future ASoC driver; now HDA
    controller driver is split to a core helper module.
    - Preliminary codes for Skylake audio support in HDA core.
    - Proper i915 gfx power well management for SKL & co
    - Enabled runtime PM as default for Intel HDMI/DP codecs
    - Newer Tegra chip supports
    - More quirks for Dell headsets, Alienware (with CA0132), etc.
    - A couple of DRM ELD helper API functions

    ASoC:
    - Support for loading ASoC topology maps from firmware, intended to
    be used to allow self-describing DSP firmware images to be built
    which can map controls added by the DSP to userspace without the
    kernel needing to know about individual DSP firmwares
    - Lots of refactoring to avoid direct access to snd_soc_codec where
    it's not needed supporting future refactoring
    - Big refactoring, cleanup and enhancement for the Wolfson ADSP
    driver
    - Cleanup series for TI TAS2552 and R-CAR drivers
    - Fixes and improvements on RT56xx codecs
    - Support for TI TAS571x power amplifiers
    - Support for Qualcomm APQ8016 and ZTE ZX296702 SoCs
    - Support for x86 systems with RT5650 and Qualcomm Storm
    - Support for Mediatek AFE (Audio Front End) unit
    - Other various small fixes to ASoC codec drivers

    Firewire:
    - Enhanced to allow non-blocking streams to use timestamp
    synchronization
    - Improve support for DM1500 and BeBoBv3

    Misc:
    - Cleanup of old pci API functions over all PCI sound drivers
    - Fix long-standing regression of the old powermac i2c setup"

    * tag 'sound-4.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (533 commits)
    ALSA: pcm: Fix pcm_class sysfs output
    ALSA: hda-beep: Update authors dead email address
    ASoC: wm_adsp: Move DSP Rate controls into the codec
    ASoC: wm8995: Fix setting sysclk for WM8995_SYSCLK_MCLK2 case
    ALSA: hda: provide default bus io ops extended hdac
    ALSA: hda: add hda link cleanup routine
    ALSA: hda: add hdac_ext stream creation and cleanup routines
    ASoC: rsrc-card: remove unused ret
    ALSA: HDAC: move SND_HDA_PREALLOC_SIZE to core
    ASoC: mediatek: Add machine driver for rt5650 rt5676 codec
    ASoC: mediatek: Add machine driver for MAX98090 codec
    ASoC: mediatek: Add AFE platform driver
    ASoC: rsnd: remove io from rsnd_mod
    ASoC: rsnd: move rsnd_mod_is_working() to rsnd_io_is_working()
    ASoC: rsnd: don't use rsnd_mod_to_io() on snd_kcontrol
    ASoC: rsnd: don't use rsnd_mod_to_io() on rsnd_src_xxx()
    ASoC: rsnd: don't use rsnd_mod_to_io() on rsnd_ssi_xxx()
    ASoC: rsnd: don't use rsnd_mod_to_io() on rsnd_dma_xxx()
    ASoC: rsnd: don't use rsnd_mod_to_io() on rsnd_get_adinr()
    ASoC: rsnd: add common interrupt handler for SSI/SRC/DMA
    ...

    Linus Torvalds
     

25 Jun, 2015

7 commits


23 Jun, 2015

1 commit

  • Pull x86 core updates from Ingo Molnar:
    "There were so many changes in the x86/asm, x86/apic and x86/mm topics
    in this cycle that the topical separation of -tip broke down somewhat -
    so the result is a more traditional architecture pull request,
    collected into the 'x86/core' topic.

    The topics were still maintained separately as far as possible, so
    bisectability and conceptual separation should still be pretty good -
    but there were a handful of merge points to avoid excessive
    dependencies (and conflicts) that would have been poorly tested in the
    end.

    The next cycle will hopefully be much more quiet (or at least will
    have fewer dependencies).

    The main changes in this cycle were:

    * x86/apic changes, with related IRQ core changes: (Jiang Liu, Thomas
    Gleixner)

    - This is the second and most intrusive part of changes to the x86
    interrupt handling - full conversion to hierarchical interrupt
    domains:

    [IOAPIC domain] -----
    |
    [MSI domain] --------[Remapping domain] ----- [ Vector domain ]
    | (optional) |
    [HPET MSI domain] ----- |
    |
    [DMAR domain] -----------------------------
    |
    [Legacy domain] -----------------------------

    This now reflects the actual hardware and allowed us to distangle
    the domain specific code from the underlying parent domain, which
    can be optional in the case of interrupt remapping. It's a clear
    separation of functionality and removes quite some duct tape
    constructs which plugged the remap code between ioapic/msi/hpet
    and the vector management.

    - Intel IOMMU IRQ remapping enhancements, to allow direct interrupt
    injection into guests (Feng Wu)

    * x86/asm changes:

    - Tons of cleanups and small speedups, micro-optimizations. This
    is in preparation to move a good chunk of the low level entry
    code from assembly to C code (Denys Vlasenko, Andy Lutomirski,
    Brian Gerst)

    - Moved all system entry related code to a new home under
    arch/x86/entry/ (Ingo Molnar)

    - Removal of the fragile and ugly CFI dwarf debuginfo annotations.
    Conversion to C will reintroduce many of them - but meanwhile
    they are only getting in the way, and the upstream kernel does
    not rely on them (Ingo Molnar)

    - NOP handling refinements. (Borislav Petkov)

    * x86/mm changes:

    - Big PAT and MTRR rework: making the code more robust and
    preparing to phase out exposing direct MTRR interfaces to drivers -
    in favor of using PAT driven interfaces (Toshi Kani, Luis R
    Rodriguez, Borislav Petkov)

    - New ioremap_wt()/set_memory_wt() interfaces to support
    Write-Through cached memory mappings. This is especially
    important for good performance on NVDIMM hardware (Toshi Kani)

    * x86/ras changes:

    - Add support for deferred errors on AMD (Aravind Gopalakrishnan)

    This is an important RAS feature which adds hardware support for
    poisoned data. That means roughly that the hardware marks data
    which it has detected as corrupted but wasn't able to correct, as
    poisoned data and raises an APIC interrupt to signal that in the
    form of a deferred error. It is the OS's responsibility then to
    take proper recovery action and thus prolonge system lifetime as
    far as possible.

    - Add support for Intel "Local MCE"s: upcoming CPUs will support
    CPU-local MCE interrupts, as opposed to the traditional system-
    wide broadcasted MCE interrupts (Ashok Raj)

    - Misc cleanups (Borislav Petkov)

    * x86/platform changes:

    - Intel Atom SoC updates

    ... and lots of other cleanups, fixlets and other changes - see the
    shortlog and the Git log for details"

    * 'x86-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (222 commits)
    x86/hpet: Use proper hpet device number for MSI allocation
    x86/hpet: Check for irq==0 when allocating hpet MSI interrupts
    x86/mm/pat, drivers/infiniband/ipath: Use arch_phys_wc_add() and require PAT disabled
    x86/mm/pat, drivers/media/ivtv: Use arch_phys_wc_add() and require PAT disabled
    x86/platform/intel/baytrail: Add comments about why we disabled HPET on Baytrail
    genirq: Prevent crash in irq_move_irq()
    genirq: Enhance irq_data_to_desc() to support hierarchy irqdomain
    iommu, x86: Properly handle posted interrupts for IOMMU hotplug
    iommu, x86: Provide irq_remapping_cap() interface
    iommu, x86: Setup Posted-Interrupts capability for Intel iommu
    iommu, x86: Add cap_pi_support() to detect VT-d PI capability
    iommu, x86: Avoid migrating VT-d posted interrupts
    iommu, x86: Save the mode (posted or remapped) of an IRTE
    iommu, x86: Implement irq_set_vcpu_affinity for intel_ir_chip
    iommu: dmar: Provide helper to copy shared irte fields
    iommu: dmar: Extend struct irte for VT-d Posted-Interrupts
    iommu: Add new member capability to struct irq_remap_ops
    x86/asm/entry/64: Disentangle error_entry/exit gsbase/ebx/usermode code
    x86/asm/entry/32: Shorten __audit_syscall_entry() args preparation
    x86/asm/entry/32: Explain reloading of registers after __audit_syscall_entry()
    ...

    Linus Torvalds
     

22 Jun, 2015

1 commit

  • ASoC: Updates for v4.2

    The big thing this release has been Liam's addition of topology support
    to the core. We've also seen quite a bit of driver work and the
    continuation of Lars' refactoring for component support.

    - Support for loading ASoC topology maps from firmware, intended to be
    used to allow self-describing DSP firmware images to be built which
    can map controls added by the DSP to userspace without the kernel
    needing to know about individual DSP firmwares.
    - Lots of refactoring to avoid direct access to snd_soc_codec where
    it's not needed supporting future refactoring.
    - Big refactoring and cleanup serieses for the Wolfson ADSP and TI
    TAS2552 drivers.
    - Support for TI TAS571x power amplifiers.
    - Support for Qualcomm APQ8016 and ZTE ZX296702 SoCs.
    - Support for x86 systems with RT5650 and Qualcomm Storm.

    # gpg: Signature made Mon 08 Jun 2015 18:48:37 BST using RSA key ID 5D5487D0
    # gpg: Oops: keyid_from_fingerprint: no pubkey
    # gpg: Good signature from "Mark Brown "
    # gpg: aka "Mark Brown "
    # gpg: aka "Mark Brown "
    # gpg: aka "Mark Brown "
    # gpg: aka "Mark Brown "
    # gpg: aka "Mark Brown "

    Mark Brown
     

18 Jun, 2015

1 commit

  • This patch attempts to enhance the case of a transfer submitted multiple
    times, and where the cost of creating the descriptors chain is not
    negligible.

    This happens with big video buffers (several megabytes, ie. several
    thousands of linked descriptors in one scatter-gather list). In these
    cases, a video driver would want to do :
    - tx = dmaengine_prep_slave_sg()
    - dma_engine_submit(tx);
    - dma_async_issue_pending()
    - wait for video completion
    - read video data (or not, skipping a frame is also possible)
    - dma_engine_submit(tx)
    => here, the descriptors chain recalculation will take time
    => the dma coherent allocation over and over might create holes in
    the dma pool, which is counter-productive.
    - dma_async_issue_pending()
    - etc ...

    In order to cope with this case, virt-dma is modified to prevent freeing
    the descriptors upon completion if DMA_CTRL_ACK flag is set in the
    transfer.

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     

12 Jun, 2015

4 commits

  • This reverts commit 48a9db462d99494583dad829969616ac90a8df4e.

    Some platforms actually need support for the memset operations. Bring it back.

    Signed-off-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Maxime Ripard
     
  • The AT91 HDMAC controller supports interleaved transfers through what's
    called the Picture-in-Picture mode, which allows to transfer a squared
    portion of a framebuffer.

    This means that this interleaved transfer only supports interleaved
    transfers which have a transfer size and ICGs that are fixed across all the
    chunks.

    While this is a quite drastic restriction of the interleaved transfers
    compared to what the dmaengine API allows, this is still useful, and our
    driver will only reject transfers that do not conform to this.

    Signed-off-by: Maxime Ripard
    Acked-by: Ludovic Desroches
    Signed-off-by: Vinod Koul

    Maxime Ripard
     
  • Now that we can have ICGs set for both the source and destination (using
    the icg field of struct data_chunk) or for only the source or the
    destination (using the dst_icg or src_icg respectively), and that these
    fields can be ignored depending on other parameters (src_inc, src_sgl,
    etc.), the logic to get the actual ICG value can be quite tricky.

    The XDMAC driver was already implementing it, but since we will need it in
    other drivers, we can move it to the main header file.

    Signed-off-by: Maxime Ripard
    Acked-by: Ludovic Desroches
    Signed-off-by: Vinod Koul

    Maxime Ripard
     
  • Some drivers implement only pause operation (no resuming). Example is
    pl330 where pause is needed for getting residuum. pl330 does not support
    resume operation, transfer must be stopped after pause.

    However for slaves this is exposed always as "pause and resume" which
    introduces subtle errors on Odroid U3 board (Exynos4412 with pl330).
    After adding pause function to pl330 driver the audio playback
    (utilizing DMA) gets choppy after some time (approximately 24 hours).

    Fix this by exposing "cmd_pause" if and only if pause and resume are
    implemented.

    Signed-off-by: Krzysztof Kozlowski
    Reported-by: gabriel@unseen.is
    Reported-by: Marek Szyprowski
    Cc:
    Fixes: 88987d2c7534 ("dmaengine: pl330: add DMA_PAUSE feature")
    Acked-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Krzysztof Kozlowski
     

11 Jun, 2015

5 commits

  • This patch change the way free descriptors are marked.

    Instead of having a field for descriptor in use, all the descriptors in the
    all_slots list are free for use.

    This simplify the allocation method and reduce the locking needed.

    Signed-off-by: Lior Amsalem
    Reviewed-by: Ofer Heifetz
    Signed-off-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Lior Amsalem
     
  • Now that we have 2 channels assigned to 2 CPUs and all requests are chained
    on same channels, we need much more descriptors available to satisfy
    async_tx workload.

    3072 descriptors was found in our lab as the number of descriptors which
    allow the async_tx stack to work without waiting for free descriptors on
    submission of new requests.

    Signed-off-by: Lior Amsalem
    Reviewed-by: Nadav Haklai
    Tested-by: Nadav Haklai
    Signed-off-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Lior Amsalem
     
  • The Marvell Armada 38x SoC introduce new features to the XOR engine,
    especially the fact that the engine mode (MEMCPY/XOR/PQ/etc) can be part of
    the descriptor and not set through the controller registers.

    This new feature allows mixing of different commands (even PQ) on the same
    channel/chain without the need to stop the engine to reconfigure the engine
    mode.

    Refactor the driver to be able to use that new feature on the Armada 38x,
    while keeping the old behaviour on the older SoCs.

    Signed-off-by: Lior Amsalem
    Reviewed-by: Ofer Heifetz
    Signed-off-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Lior Amsalem
     
  • The current function names isn't very consistent, and functions with the
    same prefix might operate on either a channel or a descriptor, which is
    kind of confusing.

    Rename these functions to have a consistent and clearer naming scheme.

    Signed-off-by: Maxime Ripard
    Signed-off-by: Vinod Koul

    Maxime Ripard
     
  • This patch fixes a bug in the XOR driver where the cleanup function can be
    called and free descriptors that never been processed by the engine (which
    result in data errors).

    The cleanup function will free descriptors based on the ownership bit in
    the descriptors.

    Fixes: ff7b04796d98 ("dmaengine: DMA engine driver for Marvell XOR engine")
    Signed-off-by: Lior Amsalem
    Signed-off-by: Maxime Ripard
    Reviewed-by: Ofer Heifetz
    Cc: stable@vger.kernel.org
    Signed-off-by: Vinod Koul

    Lior Amsalem
     

09 Jun, 2015

1 commit


08 Jun, 2015

4 commits

  • The kernel is not trying to increase mcbufsz. It suggests you should try
    doing so. Also print the calculated required size of mcbufsz.

    Signed-off-by: Michal Suchanek
    Reviewed-by: Krzysztof Kozlowski
    Signed-off-by: Vinod Koul

    Michal Suchanek
     
  • Rework slave configuration part in order to more report wrong errors
    about the configuration.
    Only maxburst and addr width values are checked when doing the slave
    configuration. The validity of the channel configuration is done at
    prepare time.

    Signed-off-by: Ludovic Desroches
    Cc: stable@vger.kernel.org # 4.0 and later
    Signed-off-by: Vinod Koul

    Ludovic Desroches
     
  • Using _bh variant for spin locks causes this kind of warning:
    Starting logging: ------------[ cut here ]------------
    WARNING: CPU: 0 PID: 3 at /ssd_drive/linux/kernel/softirq.c:151
    __local_bh_enable_ip+0xe8/0xf4()
    Modules linked in:
    CPU: 0 PID: 3 Comm: ksoftirqd/0 Not tainted 4.1.0-rc2+ #94
    Hardware name: Atmel SAMA5
    [] (unwind_backtrace) from [] (show_stack+0x10/0x14)
    [] (show_stack) from []
    (warn_slowpath_common+0x80/0xac)
    [] (warn_slowpath_common) from []
    (warn_slowpath_null+0x1c/0x24)
    [] (warn_slowpath_null) from []
    (__local_bh_enable_ip+0xe8/0xf4)
    [] (__local_bh_enable_ip) from []
    (at_xdmac_device_terminate_all+0xf4/0x100)
    [] (at_xdmac_device_terminate_all) from []
    (atmel_complete_tx_dma+0x34/0xf4)
    [] (atmel_complete_tx_dma) from []
    (at_xdmac_tasklet+0x14c/0x1ac)
    [] (at_xdmac_tasklet) from []
    (tasklet_action+0x68/0xb4)
    [] (tasklet_action) from []
    (__do_softirq+0xfc/0x238)
    [] (__do_softirq) from [] (run_ksoftirqd+0x28/0x34)
    [] (run_ksoftirqd) from []
    (smpboot_thread_fn+0x138/0x18c)
    [] (smpboot_thread_fn) from [] (kthread+0xdc/0xf0)
    [] (kthread) from [] (ret_from_fork+0x14/0x34)
    ---[ end trace b57b14a99c1d8812 ]---

    It comes from the fact that devices can called some code from the DMA
    controller with irq disabled. _bh variant is not intended to be used in
    this case since it can enable irqs. Switch to irqsave/irqrestore variant to
    avoid this situation.

    Signed-off-by: Ludovic Desroches
    Cc: stable@vger.kernel.org # 4.0 and later
    Signed-off-by: Vinod Koul

    Ludovic Desroches
     
  • add support for new CSR atlas7 SoC. atlas7 exists V1 and V2 IP.
    atlas7 DMAv1 is basically moved from marco, which has never been
    delivered to customers and renamed in this patch.
    atlas7 DMAv2 supports chain DMA by a chain table, this
    patch also adds chain DMA support for atlas7.

    atlas7 DMAv1 and DMAv2 co-exist in the same chip. there are some HW
    configuration differences(register offset etc.) with old prima2 chips,
    so we use compatible string to differentiate old prima2 and new atlas7,
    then results in different set in HW for them.

    Signed-off-by: Hao Liu
    Signed-off-by: Yanchang Li
    Signed-off-by: Barry Song
    Signed-off-by: Vinod Koul

    Hao Liu
     

06 Jun, 2015

1 commit


03 Jun, 2015

1 commit

  • Nothing in uses anything from , so
    remove it from there and fix up the resulting build problems
    triggered on x86 {64|32}-bit {def|allmod|allno}configs.

    The breakages were triggering in places where x86 builds relied
    on vmalloc() facilities but did not include
    explicitly and relied on the implicit inclusion via .

    Also add:

    - to
    - to

    ... which were two other implicit header file dependencies.

    Suggested-by: David Miller
    Signed-off-by: Stephen Rothwell
    [ Tidied up the changelog. ]
    Acked-by: David Miller
    Acked-by: Takashi Iwai
    Acked-by: Viresh Kumar
    Acked-by: Vinod Koul
    Cc: Andrew Morton
    Cc: Anton Vorontsov
    Cc: Boris Ostrovsky
    Cc: Colin Cross
    Cc: David Vrabel
    Cc: H. Peter Anvin
    Cc: Haiyang Zhang
    Cc: James E.J. Bottomley
    Cc: Jaroslav Kysela
    Cc: K. Y. Srinivasan
    Cc: Kees Cook
    Cc: Konrad Rzeszutek Wilk
    Cc: Kristen Carlson Accardi
    Cc: Len Brown
    Cc: Linus Torvalds
    Cc: Peter Zijlstra
    Cc: Rafael J. Wysocki
    Cc: Suma Ramars
    Cc: Thomas Gleixner
    Cc: Tony Luck
    Signed-off-by: Ingo Molnar

    Stephen Rothwell
     

02 Jun, 2015

3 commits


29 May, 2015

1 commit

  • In order to achieve smooth transition of pxa drivers from old legacy dma
    handling to new dmaengine, introduce a function to "hide" dma physical
    channels from dmaengine.

    This is temporary situation where pxa dma will be handled in 2 places :
    - arch/arm/plat-pxa/dma.c
    - drivers/dma/pxa_dma.c

    The resources, ie. dma channels, will be controlled by pxa_dma. The
    legacy code will request or release a channel with
    pxad_toggle_reserved_channel().

    This is not very pretty, but it ensures both legacy and dmaengine
    consumers can live in the same kernel until the conversion is done.

    Signed-off-by: Robert Jarzmik
    Acked-by: Arnd Bergmann
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     

28 May, 2015

1 commit

  • Most code already uses consts for the struct kernel_param_ops,
    sweep the kernel for the last offending stragglers. Other than
    include/linux/moduleparam.h and kernel/params.c all other changes
    were generated with the following Coccinelle SmPL patch. Merge
    conflicts between trees can be handled with Coccinelle.

    In the future git could get Coccinelle merge support to deal with
    patch --> fail --> grammar --> Coccinelle --> new patch conflicts
    automatically for us on patches where the grammar is available and
    the patch is of high confidence. Consider this a feature request.

    Test compiled on x86_64 against:

    * allnoconfig
    * allmodconfig
    * allyesconfig

    @ const_found @
    identifier ops;
    @@

    const struct kernel_param_ops ops = {
    };

    @ const_not_found depends on !const_found @
    identifier ops;
    @@

    -struct kernel_param_ops ops = {
    +const struct kernel_param_ops ops = {
    };

    Generated-by: Coccinelle SmPL
    Cc: Rusty Russell
    Cc: Junio C Hamano
    Cc: Andrew Morton
    Cc: Kees Cook
    Cc: Tejun Heo
    Cc: Ingo Molnar
    Cc: cocci@systeme.lip6.fr
    Cc: linux-kernel@vger.kernel.org
    Signed-off-by: Luis R. Rodriguez
    Signed-off-by: Rusty Russell

    Luis R. Rodriguez
     

26 May, 2015

2 commits

  • Reuse the debugging features which were available in pxa architecture.
    This is a copy of the code from arch/arm/plat-pxa/dma, which is doomed
    to disappear once the conversion is completed towards dmaengine.

    This is a transfer of the commit "[ARM] pxa/dma: add debugfs
    entries" (d294948c2ce4e1c85f452154469752cc9b8e876d).

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik
     
  • This is a new driver for pxa SoCs, which is also compatible with the former
    mmp_pdma.

    The rationale behind a new driver (as opposed to incremental patching) was :

    - the new driver relies on virt-dma, which obsoletes all the internal
    structures of mmp_pdma (sw_desc, hw_desc, ...), and by consequence all the
    functions

    - mmp_pdma allocates dma coherent descriptors containing not only hardware
    descriptors but linked list information
    The new driver only puts the dma hardware descriptors (ie. 4 u32) into the
    dma pool allocated memory. This changes completely the way descriptors are
    handled

    - the architecture behind the interrupt/tasklet management was rewritten to be
    more conforming to virt-dma

    - the buffers alignment is handled differently
    The former driver assumed that the DMA channel stopped between each
    descriptor. The new one chains descriptors to let the channel running. This
    is a necessary guarantee for real-time high bandwidth usecases such as video
    capture on "old" architectures such as pxa.

    - hot chaining / cold chaining / no chaining
    Whenever possible, submitting a descriptor "hot chains" it to a running
    channel. There is still no guarantee that the descriptor will be issued, as
    the channel might be stopped just before the descriptor is submitted. Yet
    this allows to submit several video buffers, and resubmit a buffer while
    another is under handling.
    As before, dma_async_issue_pending() is the only guarantee to have all the
    buffers issued.
    When an alignment issue is detected (ie. one address in a descriptor is not
    a multiple of 8), if the already running channel is in "aligned mode", the
    channel will stop, and restarted in "misaligned mode" to finished the issued
    list.

    - descriptors reusing
    A submitted, issued and completed descriptor can be reused, ie resubmitted if
    it was prepared with the proper flag (DMA_PREP_ACK). Only a channel
    resources release will in this case release that buffer.
    This allows a rolling ring of buffers to be reused, where there are several
    thousands of hardware descriptors used (video buffer for example).

    Additionally, a set of more casual features is introduced :
    - debugging traces
    - lockless way to know if a descriptor is terminated or not

    The driver was tested on zylonite board (pxa3xx) and mioa701 (pxa27x),
    with dmatest, pxa_camera and pxamci.

    Signed-off-by: Robert Jarzmik
    Signed-off-by: Vinod Koul

    Robert Jarzmik