25 Apr, 2013
17 commits
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Patch adds support for NIST recommended block cipher mode CMAC to CryptoAPI.
This work is based on Tom St Denis' earlier patch,
http://marc.info/?l=linux-crypto-vger&m=135877306305466&w=2Cc: Tom St Denis
Signed-off-by: Jussi Kivilinna
Acked-by: David S. Miller
Signed-off-by: Herbert Xu -
Without these, kernel log shows:
[ 5.984881] alg: No test for cipher_null (cipher_null-generic)
[ 5.985096] alg: No test for ecb(cipher_null) (ecb-cipher_null)
[ 5.985170] alg: No test for compress_null (compress_null-generic)
[ 5.985297] alg: No test for digest_null (digest_null-generic)Signed-off-by: Jussi Kivilinna
Signed-off-by: Herbert Xu -
Signed-off-by: Jussi Kivilinna
Signed-off-by: Herbert Xu -
If the gcm cipher used by rfc4543 does not complete request immediately,
the authentication tag is not copied to destination buffer. Patch adds
correct async logic for this case.Signed-off-by: Jussi Kivilinna
Signed-off-by: Herbert Xu -
The GMAC code assumes that dst==src, which causes problems when trying to add
rfc4543(gcm(aes)) test vectors.So fix this code to work when source and destination buffer are different.
Signed-off-by: Jussi Kivilinna
Signed-off-by: Herbert Xu -
This patch allows timeriomem_rng to be used via devicetree.
Signed-off-by: Alexander Clouter
Signed-off-by: Herbert Xu -
timeriomem_rng only supports a single device instance. This patch
enables multiple timeriomem_rng devices to coexist as well as adds
some additional error checking.Signed-off-by: Alexander Clouter
Signed-off-by: Herbert Xu -
Occurs when CONFIG_CRYPTO_CRC32C_INTEL=y and CONFIG_CRYPTO_CRC32C_INTEL=y.
Older versions of bintuils do not support the pclmulqdq instruction. The
PCLMULQDQ gas macro is used instead.Signed-off-by: Sandy Wu
Cc: stable@vger.kernel.org # 3.8+
Signed-off-by: Herbert Xu -
This adds a driver for random number generator present on Broadcom BCM2835 SoC,
used in Raspberry Pi and Roku 2 devices.Signed-off-by: Dom Cobley
Signed-off-by: Lubomir Rintel
Tested-by: Stephen Warren
Cc: Herbert Xu
Cc: Stephen Warren
Cc: Matt Mackall
Cc: linux-rpi-kernel@lists.infradead.org
Signed-off-by: Herbert Xu -
checkstack reports report_deco_status(), report_ccb_status() as
particularly excessive stack users. Move their lookup tables
off the stack and put them in .rodata.Signed-off-by: Kim Phillips
Signed-off-by: Herbert Xu -
commit 2af8f4a "crypto: caam - coccicheck fixes" added error
return values yet neglected to change the type from unsigned.Signed-off-by: Kim Phillips
Signed-off-by: Herbert Xu -
…AVX or AVX2 instructions.
We added glue code and config options to create crypto
module that uses SSE/AVX/AVX2 optimized SHA512 x86_64 assembly routines.Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> -
Provides SHA512 x86_64 assembly routine optimized with SSE, AVX and
AVX2's RORX instructions. Speedup of 70% or more has been
measured over the generic implementation.Signed-off-by: Tim Chen
Signed-off-by: Herbert Xu -
Provides SHA512 x86_64 assembly routine optimized with SSE and AVX instructions.
Speedup of 60% or more has been measured over the generic implementation.Signed-off-by: Tim Chen
Signed-off-by: Herbert Xu -
Provides SHA512 x86_64 assembly routine optimized with SSSE3 instructions.
Speedup of 40% or more has been measured over the generic implementation.Signed-off-by: Tim Chen
Signed-off-by: Herbert Xu -
Other SHA512 routines may need to use the generic routine when
FPU is not available.Signed-off-by: Tim Chen
Signed-off-by: Herbert Xu -
…AVX or AVX2 instructions.
We added glue code and config options to create crypto
module that uses SSE/AVX/AVX2 optimized SHA256 x86_64 assembly routines.Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
03 Apr, 2013
7 commits
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Provides SHA256 x86_64 assembly routine optimized with SSE, AVX and
AVX2's RORX instructions. Speedup of 70% or more has been
measured over the generic implementation.Signed-off-by: Tim Chen
Signed-off-by: Herbert Xu -
Provides SHA256 x86_64 assembly routine optimized with SSE and AVX instructions.
Speedup of 60% or more has been measured over the generic implementation.Signed-off-by: Tim Chen
Signed-off-by: Herbert Xu -
Provides SHA256 x86_64 assembly routine optimized with SSSE3 instructions.
Speedup of 40% or more has been measured over the generic implementation.Signed-off-by: Tim Chen
Signed-off-by: Herbert Xu -
Other SHA256 routine may need to use the generic routine when
FPU is not available.Signed-off-by: Tim Chen
Signed-off-by: Herbert Xu -
These modules require AVX support in assembler, so add new check to Makefile
for this.Other option would be to use CONFIG_AS_AVX inside source files, but that would
result dummy/empty/no-fuctionality modules being created.Signed-off-by: Jussi Kivilinna
Signed-off-by: Herbert Xu -
Signed-off-by: Jussi Kivilinna
Signed-off-by: Herbert Xu -
Fix to return a negative error code from the error handling
case instead of 0, as returned elsewhere in this function.Signed-off-by: Wei Yongjun
Acked-by: Linus Walleij
Signed-off-by: Herbert Xu
22 Mar, 2013
5 commits
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This eliminates having an #ifdef returning NULL for the case
when OF is disabled.Signed-off-by: Sachin Kamat
Acked-by: Jamie Iles
Signed-off-by: Herbert Xu -
Using devm_ioremap_resource() can make the code cleaner and simpler.
Signed-off-by: Fabio Estevam
Signed-off-by: Herbert Xu -
Following AEAD algo templates are updated for '.type' initialization.
(a) authenc(hmac(sha224),cbc(aes))
(b) authenc(hmac(sha384),cbc(aes))
(c) authenc(hmac(sha224),cbc(des3_ede))
(d) authenc(hmac(sha384),cbc(des3_ede))
(e) authenc(hmac(sha224),cbc(des))
(f) authenc(hmac(sha384),cbc(des))Signed-off-by: Vakul Garg
Reviewed-by: Kim Phillips
Signed-off-by: Andy Fleming
Signed-off-by: Herbert Xu -
This change is required for post SEC-5.0 devices which have RNG4.
Setting RDB in security configuration register allows CAAM to use the
"Random Data Buffer" to be filled by a single request. The Random Data
Buffer is large enough for ten packets to get their IVs from a single
request. If the Random Data Buffer is not enabled, then each IV causes a
separate request, and RNG4 hardware cannot keep up resulting in lower
IPSEC throughput if random IVs are used.Signed-off-by: Vakul Garg
Signed-off-by: Herbert Xu -
This patch adds CONFIG_PM_SLEEP to suspend/resume functions to fix
the following build warning when CONFIG_PM_SLEEP is not selected.drivers/char/hw_random/exynos-rng.c:147:12: warning: 'exynos_rng_runtime_suspend' defined but not used [-Wunused-function]
drivers/char/hw_random/exynos-rng.c:157:12: warning: 'exynos_rng_runtime_resume' defined but not used [-Wunused-function]Add CONFIG_PM_RUNTIME to suspend/resume functions to fix the build
error. It is because UNIVERSAL_DEV_PM_OPS macro is related to both
CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME.drivers/char/hw_random/exynos-rng.c:167:8: error: 'exynos_rng_runtime_suspend' undeclared here (not in a function)
drivers/char/hw_random/exynos-rng.c:167:8: error: 'exynos_rng_runtime_resume' undeclared here (not in a function)Signed-off-by: Jingoo Han
Reported-by: David Rientjes
Signed-off-by: Herbert Xu
21 Mar, 2013
2 commits
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Signed-off-by: Mihnea Dobrescu-Balaur
Signed-off-by: Herbert Xu -
SAHARA2 HW module is included in the i.MX27 SoC from
Freescale. It is capable of performing cipher algorithms
such as AES, 3DES..., hashing and RNG too.This driver provides support for AES-CBC and AES-ECB
by now.Reviewed-by: Arnd Bergmann
Signed-off-by: Javier Martin
Signed-off-by: Herbert Xu
10 Mar, 2013
9 commits
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Seeing from the comment, there should be three reasons for removing request_mem_region.
Change the comment "two" to "three".Signed-off-by: Tang Chen
Acked-by: Rob Landley
Signed-off-by: Herbert Xu -
The Kconfig entry for CAAM's hash algorithm implementations has always
selected CRYPTO_AHASH. But there's no corresponding Kconfig symbol.It seems it was intended to select CRYPTO_HASH, like other crypto
drivers do. That would apparently (indirectly) select CRYPTO_HASH2,
which would enable the ahash functionality this driver uses.Signed-off-by: Paul Bolle
Reviewed-by: Kim Phillips
Signed-off-by: Herbert Xu -
module_platform_driver() makes the code simpler by eliminating boilerplate
code.Signed-off-by: Sachin Kamat
Signed-off-by: Herbert Xu -
module_platform_driver() makes the code simpler by eliminating boilerplate
code.Signed-off-by: Sachin Kamat
Signed-off-by: Herbert Xu -
After DMA is complete, the omap_aes_finish_req function is called as
a part of the done_task tasklet. During this its atomic and any calls
to pm functions should not assume they wont sleep.The patch replaces a call to pm_runtime_put_sync (which can sleep) with
pm_runtime_put thus fixing a kernel panic observed on AM33xx SoC during
AES operation.Tested on an AM33xx SoC device (beaglebone board).
To reproduce the problem, I used the tcrypt kernel module as:
modprobe tcrypt sec=2 mode=500Signed-off-by: Joel A Fernandes
Cc: David S. Miller
Acked-by: Mark A. Greer
Signed-off-by: Herbert Xu -
After DMA is complete, the omap_sham_finish_req function is called as
a part of the done_task tasklet. During this its atomic and any calls
to pm functions should not assume they wont sleep.The patch replaces a call to pm_runtime_put_sync (which can sleep) with
pm_runtime_put thus fixing a kernel panic observed on AM33xx SoC during
SHA operation.Tested on an AM33xx SoC device (beaglebone board).
To reproduce the problem, used the tcrypt kernel module as:
modprobe tcrypt sec=2 mode=403Signed-off-by: Joel A Fernandes
Cc: David S. Miller
Acked-by: Mark A. Greer
Signed-off-by: Herbert Xu -
If we define dev_dbg(), then there is a possible NULL pointer
dereference.Signed-off-by: Syam Sidhardhan
Signed-off-by: Herbert Xu -
There is no need to modify the netlink dispatch table at runtime and
making it const even makes the resulting object file slightly smaller.Cc: Steffen Klassert
Signed-off-by: Mathias Krause
Signed-off-by: Herbert Xu -
…h PCLMULQDQ instructions.
Herbert,
The following patch update the stale link to the CRC32C white paper
that was referenced.Tim
Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
