28 Sep, 2011
2 commits
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Currently the shdma dmaengine driver uses runtime PM to save power, when
no channel on the specific controller is requested by a user. This patch
switches the driver to count individual DMA transfers. That way the
controller can be powered down between transfers, even if some of its
channels are in use.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Vinod Koul -
The IRQ handler of the shdma driver accesses common hardware registers,
that are also accessed from other contexts. Therefore access to them
has to be performed with interrupts disabled, not only with disabled
bottom halves.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Vinod Koul
21 Jun, 2011
5 commits
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Signed-off-by: Kuninori Morimoto
Signed-off-by: Paul Mundt -
Signed-off-by: Kuninori Morimoto
Signed-off-by: Paul Mundt -
IE bit position on CHCR register is not same in all DMAC.
This patch adds new "chcr_ie_bit" to decide it.Signed-off-by: Kuninori Morimoto
Signed-off-by: Paul Mundt -
CHCR register position is not same in all DMAC.
This patch adds new "chcr_offset" to decide it.Signed-off-by: Kuninori Morimoto
Signed-off-by: Paul Mundt
16 Jun, 2011
4 commits
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chan_pdata->dmars_bit is unsigned int
Signed-off-by: Kuninori Morimoto
Signed-off-by: Paul Mundt -
It is not readable that there is any spin_unlock_bh on same function.
Signed-off-by: Kuninori Morimoto
Signed-off-by: Paul Mundt -
This patch adds "to_sh_dev" macro, and clean up codes.
Signed-off-by: Kuninori Morimoto
Signed-off-by: Paul Mundt
14 Jun, 2011
1 commit
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Fix the recently added SH_DMAC_MAX_CHANNELS handling code in
300e5f9 dmaengine: shdma: Fix SH_DMAC_MAX_CHANNELS handlingWithout this fix the shdma driver outputs silly messages in
case SH_DMAC_MAX_CHANNELS happens to match the platform data:sh-dma-engine sh-dma-engine.0: Attempting to register 20 DMA channels when a max
imum of 20 are supported.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt
02 Jun, 2011
1 commit
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A recent patch has introduced a regression, where repeating a memcpy
DMA test with shdma module unloading between them skips the DMA channel
configuration. Fix this regression by always configuring the channel
during its allocation.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt
31 May, 2011
1 commit
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The runtime PM changes introduce sh_dmae_rst() wrapping via the
runtime_resume helper, depending on dev_get_drvdata() to fetch the
platform data needed for the DMAOR initialization default at a time
where drvdata hasn't yet been established by the probe path, resulting
in general probe misery:Unable to handle kernel NULL pointer dereference at virtual address 000000c4
pc = 8025adee
*pde = 00000000
Oops: 0000 [#1]
Modules linked in:Pid : 1, Comm: swapper
CPU : 0 Not tainted (3.0.0-rc1-00012-g9436b4a-dirty #1456)PC is at sh_dmae_rst+0x28/0x86
PR is at sh_dmae_rst+0x22/0x86
PC : 8025adee SP : 9e803d10 SR : 400080f1 TEA : 000000c4
R0 : 000000c4 R1 : 0000fff8 R2 : 00000000 R3 : 00000040
R4 : 000000f0 R5 : 00000000 R6 : 00000000 R7 : 804f184c
R8 : 00000000 R9 : 804dd0e8 R10 : 80283204 R11 : ffffffda
R12 : 000000a0 R13 : 804dd18c R14 : 9e803d10
MACH: 00000000 MACL: 00008f20 GBR : 00000000 PR : 8025ade8Call trace:
[] sh_dmae_runtime_resume+0x24/0x34
[] pm_generic_runtime_resume+0x34/0x3c
[] rpm_callback+0x4a/0x7e
[] rpm_resume+0x240/0x384
[] rpm_resume+0x298/0x384
[] __pm_runtime_resume+0x44/0x7c
[] __ioremap_caller+0x0/0xec
[] __pm_runtime_resume+0x4e/0x7c
[] __ioremap_caller+0x0/0xec
[] sh_dmae_probe+0x180/0x6a0
[] platform_drv_probe+0x26/0x2eFix up the ordering accordingly.
Signed-off-by: Paul Mundt
25 May, 2011
2 commits
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Fix the shdma.c handing of SH_DMAC_MAX_CHANNELS
to avoid overwriting the chan_irq[] and chan_flag[]
arrays in the case of pdata->channel_num is larger
than SH_DMAC_MAX_CHANNELS.With this patch applied up to SH_DMAC_MAX_CHANNELS
will be used by the shdma.c driver. If more channels
are available in the platform data the user will
be notified on the console.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt -
This patch makes the shdma.c driver allow slave operation
on DMA hardware mapped with a single I/O-memory window.The dmae_set_dmars() function is adjusted to use the
first memory window in case of a missing DMARS window.At probe() time the code is updated to enable DMA_SLAVE
only if slave information is passed with the platform data.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt
23 May, 2011
3 commits
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List elements, deleted using list_del_rcu(), cannot be freed without
synchronising RCU. Further, the spinlock, used to protect the RCU
writer, is called in process context, so, we don't have to save flags.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt -
This patch extends and fixes runtime power management in the shdma
driver to support powering down the DMA controller and adds support
for system-level suspend and resume.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt -
Close multiple theoretical races, especially the one in
.device_free_chan_resources().Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt
29 Mar, 2011
1 commit
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The irq numbers of tranfer end and address error are assigned same number
on some CPU. So the sh_dmae_err() should check the AE flag in DMAOR.Signed-off-by: Yoshihiro Shimoda
Signed-off-by: Paul Mundt
19 Jan, 2011
1 commit
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Signed-off-by: Justin P. Mattock
Signed-off-by: Jiri Kosina
07 Jan, 2011
1 commit
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A recent patch has added a die notifier to the shdma driver, however,
it registers a static die-notifier object in the probe routine, i.e.,
for each device instance. This is wrong and leads to a system lockup.
This patch moves the die notifier registration to module init and
exit routines respectively.Reported-by: Magnus Damm
Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt
17 Dec, 2010
1 commit
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Presently DMA transfers are interrupted and aborted by the NMI. This
implements some basic logic for more gracefully handling and clearing
each controller's NMIF flag via the NMI die chain, needed to resume
transfers post-NMI.Reported-by: Michael Szafranek
Signed-off-by: Paul Mundt
25 Nov, 2010
1 commit
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Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt
23 Sep, 2010
1 commit
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"param" can be NULL here, so only dereference it after the check.
Signed-off-by: Dan Carpenter
Signed-off-by: Dan Williams
31 May, 2010
1 commit
24 May, 2010
1 commit
22 May, 2010
3 commits
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If all descriptors on a channel are terminated or the channel is released,
update the completed cookie counter to match the last cookie. This prevents
inconsistency warning on resumed DMA operation.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt -
This prevents the driver from unloading, while it is in use. Unloading of the
driver, while its DMA channels are held, leads to a kernel Oops.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt -
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:
DMAENGINE: extend the control command to include an arg
async_tx: trim dma_async_tx_descriptor in 'no channel switch' case
DMAENGINE: DMA40 fix for allocation of logical channel 0
DMAENGINE: DMA40 support paused channel status
dmaengine: mpc512x: Use resource_size
DMA ENGINE: Do not reset 'private' of channel
ioat: Remove duplicated devm_kzalloc() calls for ioatdma_device
ioat3: disable cacheline-unaligned transfers for raid operations
ioat2,3: convert to producer/consumer locking
ioat: convert to circ_buf
DMAENGINE: Support for ST-Ericssons DMA40 block v3
async_tx: use of kzalloc/kfree requires the include of slab.h
dmaengine: provide helper for setting txstate
DMAENGINE: generic channel status v2
DMAENGINE: generic slave control v2
dma: timb-dma: Update comment and fix compiler warning
dma: Add timb-dma
DMAENGINE: COH 901 318 fix bytesleft
DMAENGINE: COH 901 318 rename confusing vars
20 May, 2010
1 commit
18 May, 2010
2 commits
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This adds an argument to the DMAengine control function, so that
we can later provide control commands that need some external data
passed in through an argument akin to the ioctl() operation
prototype.[dan.j.williams@intel.com: fix up some missed conversions]
Signed-off-by: Linus Walleij
Signed-off-by: Dan Williams
26 Apr, 2010
3 commits
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Conflicts:
arch/sh/kernel/dwarf.c
drivers/dma/shdma.cSigned-off-by: Paul Mundt
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If channel allocation is failing, mark the channel unused and give PM a chance
to power down the hardware.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt -
Lists of DMA channels and slaves are not changed, make them constant. Besides,
SH7724 channel and slave configuration of both DMA controllers is identical,
remove the extra copy of the configuration data.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt
07 Apr, 2010
2 commits
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Enable the shdma dmaengine driver on SH-Mobile ARM.
Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt
30 Mar, 2010
1 commit
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…it slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
27 Mar, 2010
1 commit
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Simple conditional struct filler to cut out some duplicated code.
Signed-off-by: Dan Williams