07 Jan, 2012
3 commits
-
Convert from pci_create_bus() to pci_create_root_bus(). This way the root
bus resources are correct immediately. This fixes the problem of "early"
and "header" quirks seeing incorrect root bus resources.We can't use pci_scan_root_bus() because, like x86, ACPI hotplug currently
requires pci_bus_add_devices() in a separate host bridge .start() method.v2: fix compile error by using window resource pointer instead
CC: Tony Luck
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
This doesn't change any functionality, but it makes a subsequent patch
slightly simpler.CC: Tony Luck
Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
This patch converts IA64's architecture-specific 'pcibios_set_master()'
routine to a non-inlined function. This will allow follow on
patches to create a generic 'pcibios_set_master()' function using the
'__weak' attribute which can be used by all architectures as a default
which, if necessary, can then be over-ridden by architecture-
specific code.Converting 'pci_bios_set_master()' to a non-inlined function will allow
IA64's 'pcibios_set_master()' implementation to remain architecture-
specific after the generic version is introduced and thus, not change
current behavior.No functional change.
Signed-off-by: Myron Stowe
Signed-off-by: Jesse Barnes
01 Nov, 2011
1 commit
-
Signed-off-by: Paul Gortmaker
04 Apr, 2010
1 commit
-
The acpi_pci_root structure contains all the individual items (acpi_device,
domain, bus number) we pass to pci_acpi_scan_root(), so just pass the
single acpi_pci_root pointer directly.This will make it easier to add _CBA support later. For _CBA, we need the
entire downstream bus range, not just the base bus number. We have that in
the acpi_pci_root structure, so passing the pointer makes it available to
the arch-specific code.Signed-off-by: Bjorn Helgaas
Reviewed-by: Kenji Kaneshige
Signed-off-by: Len Brown
24 Feb, 2010
2 commits
-
Previously we used a table of size PCI_BUS_NUM_RESOURCES (16) for resources
forwarded to a bus by its upstream bridge. We've increased this size
several times when the table overflowed.But there's no good limit on the number of resources because host bridges
and subtractive decode bridges can forward any number of ranges to their
secondary buses.This patch reduces the table to only PCI_BRIDGE_RESOURCE_NUM (4) entries,
which corresponds to the number of windows a PCI-to-PCI (3) or CardBus (4)
bridge can positively decode. Any additional resources, e.g., PCI host
bridge windows or subtractively-decoded regions, are kept in a list.I'd prefer a single list rather than this split table/list approach, but
that requires simultaneous changes to every architecture. This approach
only requires immediate changes where we set up (a) host bridges with more
than four windows and (b) subtractive-decode P2P bridges, and we can
incrementally change other architectures to use the list.Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
No functional change; this converts loops that iterate from 0 to
PCI_BUS_NUM_RESOURCES through pci_bus resource[] table to use the
pci_bus_for_each_resource() iterator instead.This doesn't change the way resources are stored; it merely removes
dependencies on the fact that they're in a table.Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes
23 Feb, 2010
2 commits
-
Now that we return the new resource start position, there is no
need to update "struct resource" inside the align function.
Therefore, mark the struct resource as const.Cc: Bjorn Helgaas
Cc: Yinghai Lu
Signed-off-by: Dominik Brodowski
Signed-off-by: Jesse Barnes -
As suggested by Linus, align functions should return the start
of a resource, not void. An update of "res->start" is no longer
necessary.Cc: Bjorn Helgaas
Cc: Yinghai Lu
Signed-off-by: Dominik Brodowski
Signed-off-by: Jesse Barnes
05 Nov, 2009
3 commits
-
Jesse accidentally applied v1 [1] of the patchset instead of v2 [2]. This
is the diff between v1 and v2.The changes in this patch are:
- tidied vsprintf stack buffer to shrink and compute size more
accurately
- use %pR for decoding and %pr for "raw" (with type and flags) instead
of adding %pRt and %pRf[1] http://lkml.org/lkml/2009/10/6/491
[2] http://lkml.org/lkml/2009/10/13/441Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
This uses %pRt to print additional resource information (type, size,
prefetchability, etc.) consistently.Signed-off-by: Bjorn Helgaas
Signed-off-by: Jesse Barnes -
Till now, CLS has been determined either by arch code or as
L1_CACHE_BYTES. Only x86 and ia64 set CLS explicitly and x86 doesn't
always get it right. On most configurations, the chance is that
firmware configures the correct value during boot.This patch makes pci_init() determine CLS by looking at what firmware
has configured. It scans all devices and if all non-zero values
agree, the value is used. If none is configured or there is a
disagreement, pci_dfl_cache_line_size is used. arch can set the dfl
value (via PCI_CACHE_LINE_BYTES or pci_dfl_cache_line_size) or
override the actual one.ia64, x86 and sparc64 updated to set the default cls instead of the
actual one.While at it, declare pci_cache_line_size and pci_dfl_cache_line_size
in pci.h and drop private declarations from arch code.Signed-off-by: Tejun Heo
Acked-by: David Miller
Acked-by: Greg KH
Cc: Ingo Molnar
Cc: Thomas Gleixner
Cc: Tony Luck
Signed-off-by: Jesse Barnes
14 Oct, 2009
1 commit
-
We had assumed that SAL firmware would return an error if it didn't
understand extended config space. Unfortunately, the SAL on the SGI 750
doesn't do that, it panics the machine. So, condition the extended PCI
config space accesses on SAL revision 3.2.Signed-off-by: Matthew Wilcox
Tested-by: Brad Spengler
Signed-off-by: Tony Luck
01 Jul, 2009
1 commit
-
Should be __init.
Acked-by: Tony Luck
Signed-off-by: Jesse Barnes
18 Jun, 2009
2 commits
-
ia64 was assigning resources to root busses after allocations had
been made for child busses. Calling pcibios_setup_root_windows() from
pcibios_fixup_bus() solves this problem by assigning the resources to
the root bus before child busses are scanned.Signed-off-by: Matthew Wilcox
Tested-by: Andrew Patterson
Signed-off-by: Linus Torvalds -
It is generally agreed that it would be beneficial for u64 to be an
unsigned long long on all architectures. ia64 (in common with several
other 64-bit architectures) currently uses unsigned long. Migrating
piecemeal is too painful; this giant patch fixes all compilation warnings
and errors that come as a result of switching to use int-ll64.h.Note that userspace will still see __u64 defined as unsigned long. This
is important as it affects C++ name mangling.[Updated by Tony Luck to change efi.h:efi_freemem_callback_t to use
u64 for start/end rather than unsigned long]Signed-off-by: Matthew Wilcox
Signed-off-by: Tony Luck
16 Jan, 2009
1 commit
-
Create a platform specific version of dma_get_required_mask()
for ia64 SN Altix. All SN Altix platforms support 64 bit DMA
addressing regardless of the size of system memory.
Create an ia64 machvec for dma_get_required_mask, with the
SN version unconditionally returning DMA_64BIT_MASK.Signed-off-by: John Keller
Signed-off-by: Tony Luck
21 Oct, 2008
1 commit
-
This adds the ability to mmap legacy IO space to the legacy_io files
in sysfs on platforms that support it. This will allow to clean up
X to use this instead of /dev/mem for legacy IO accesses such as
those performed by Int10.While at it I moved pci_create/remove_legacy_files() to pci-sysfs.c
where I think they belong, thus making more things statis in there
and cleaned up some spurrious prototypes in the ia64 pci.h fileSigned-off-by: Benjamin Herrenschmidt
Signed-off-by: Jesse Barnes
19 Aug, 2008
1 commit
-
The code walks all the acpi _CRS methods to see how many windows
to allocate. It then scans them all again to insert_resource()
for each *even if the first scan found that there were none*.Move the second scan inside the "if (windows)" clause.
Signed-off-by: Tony Luck
21 Apr, 2008
1 commit
-
Use the generic pci_enable_resources() instead of the arch-specific code.
Unlike this arch-specific code, the generic version:
- does not check for a NULL dev pointer
- skips resources that have neither IORESOURCE_IO nor IORESOURCE_MEM setSigned-off-by: Bjorn Helgaas
Signed-off-by: Greg Kroah-Hartman
16 Apr, 2008
1 commit
-
http://bugzilla.kernel.org/show_bug.cgi?id=10124
this change:
commit 08f1c192c3c32797068bfe97738babb3295bbf42
Author: Muli Ben-Yehuda
Date: Sun Jul 22 00:23:39 2007 +0300x86-64: introduce struct pci_sysdata to facilitate sharing of ->sysdata
This patch introduces struct pci_sysdata to x86 and x86-64, and
converts the existing two users (NUMA, Calgary) to use it.This lays the groundwork for having other users of sysdata, such as
the PCI domains work.The Calgary bits are tested, the NUMA bits just look ok.
replaces pcibios_scan_root by pci_scan_bus_parented...
but in pcibios_scan_root we have a check about scanned busses.
Cc:
Cc: Stian Jordet
Cc: Len Brown
Cc: Greg KH
Cc: Ingo Molnar
Cc: "Yinghai Lu"
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
07 Mar, 2008
2 commits
-
Convert quirk printks to dev_printk().
Signed-off-by: Bjorn Helgaas
Signed-off-by: Tony Luck -
__FUNCTION__ is gcc-specific, use __func__
Long lines have been kept where they exist, some small spacing changes
have been done.Signed-off-by: Harvey Harrison
Signed-off-by: Andrew Morton
Signed-off-by: Tony Luck
11 Feb, 2008
1 commit
-
We want to allow different implementations of pci_raw_ops for standard
and extended config space on x86. Rather than clutter generic code with
knowledge of this, we make pci_raw_ops private to x86 and use it to
implement the new raw interface -- raw_pci_read() and raw_pci_write().Signed-off-by: Matthew Wilcox
Signed-off-by: Linus Torvalds
26 Jul, 2007
1 commit
-
pcibios_setup (between 'pci_setup' and 'quirk_mellanox_tavor')
setup_profiling_timer (between 'write_profile' and 'delayed_put_task_struct')Signed-off-by: Tony Luck
12 Jul, 2007
1 commit
-
Example memory map (HP rx7640 with 'default' acpiconfig setting, VGA disabled):
0x00000000 - 0x3FFFBFFF supports only WB (cacheable) accessIf a user attempts to perform an MMIO mmap (using the PCIIOC_MMAP_IS_MEM ioctl)
to PCI config space (like mmap'ing and accessing memory at 0xA0000),
we will MCA because the kernel will attempt to use a mapping with the UC
attribute.So check the memory attribute in kern_mmap and the EFI memmap. If WC is
requested, and WC or UC access is supported for the region, allow it.
Otherwise, use the same attribute the kernel uses.Updates documentation and test cases as well.
Signed-off-by: Alex Chiang
Signed-off-by: Bjorn Helgaas
Signed-off-by: Tony Luck
23 May, 2007
1 commit
-
Hiroyuki Kamezawa reported the problem that pci_acpi_scan_root() of
ia64 might call kmalloc_node() with zero size.Currently ia64's pci_acpi_scan_root() assumes that _CRS method of root
bridge has at least one resource window. But, the root bridges that
has no resource window must be taken into account.Signed-off-by: Kenji Kaneshige
Signed-off-by: Andrew Morton
Signed-off-by: Tony Luck
09 May, 2007
1 commit
-
Remove includes of where it is not used/needed.
Suggested by Al Viro.Builds cleanly on x86_64, i386, alpha, ia64, powerpc, sparc,
sparc64, and arm (all 59 defconfigs).Signed-off-by: Randy Dunlap
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
31 Mar, 2007
1 commit
-
Allow cacheable mmaps of legacy_mem if WB access is supported for the region.
The "legacy_mem" file often contains a shadow option ROM, and some versions of
X depend on this.Tim Yamin reported that this change fixes X on a Dell
PowerEdge 3250.Signed-off-by: Bjorn Helgaas
Signed-off-by: Tony Luck
30 Mar, 2007
1 commit
-
Typo/thinko in bba6f6fc68e74d4572028646f61dd3505a68747e
Signed-off-by: Tony Luck
29 Mar, 2007
1 commit
-
So I think the right solution is to simply make pci_enable_device just
flip enable bits and move the rest of the work someplace else.However a thorough cleanup is a little extreme for this point in the
release cycle, so I think a quick hack that makes the code not stomp the
irq when msi irq's are enabled should be the first fix. Then we can
later make the code not change the irqs at all.Signed-off-by: Eric W. Biederman
Signed-off-by: Ingo Molnar
Signed-off-by: Linus Torvalds
08 Dec, 2006
1 commit
-
Replace kmalloc+memset with kzalloc
Signed-off-by: Yan Burman
Signed-off-by: Andrew Morton
Signed-off-by: Tony Luck
07 Dec, 2006
1 commit
-
The recent change to convert the is_enabled flag in the PCI device to an
atomic count broke the IA64 compilation.As pcibios_disable_device is only ever called if the reference count
is zero, convert the if to a BUG_ON.Signed-off-by: Peter Chubb
Signed-off-by: Tony Luck
02 Dec, 2006
2 commits
-
First phase in introducing ACPI support to SN.
In this phase, when running with an ACPI capable PROM,
the DSDT will define the root busses and all SN nodes
(SGIHUB, SGITIO). An ACPI bus driver will be registered
for the node devices, with the acpi_pci_root_driver being
used for the root busses. An ACPI vendor descriptor is
now used to pass platform specific information for both
nodes and busses, eliminating the need for the current
SAL calls. Also, with ACPI support, SN fixup code is no longer
needed to initiate the PCI bus scans, as the acpi_pci_root_driver
does that.However, to maintain backward compatibility with non-ACPI capable
PROMs, none of the current 'fixup' code can been deleted, though
much restructuring has been done. For example, the bulk of the code
in io_common.c is relocated code that is now common regardless
of what PROM is running, while io_acpi_init.c and io_init.c contain
routines specific to an ACPI or non ACPI capable PROM respectively.A new pci bus fixup platform vector has been created to provide
a hook for invoking platform specific bus fixup from pcibios_fixup_bus().The size of io_space[] has been increased to support systems with
large IO configurations.Signed-off-by: John Keller
Signed-off-by: Greg Kroah-Hartman -
The pci_generic_prep_mwi() code does everything that pcibios_prep_mwi()
does on ia64. All we need to do is be sure that pci_cache_line_size
is set appropriately, and we can delete pcibios_prep_mwi().Using SMP_CACHE_BYTES as the default was wrong on uniprocessor machines
as it is only 8 bytes. The default in the generic code of L1_CACHE_BYTES
is at least as good.Signed-off-by: Matthew Wilcox
Acked-by: Jeff Garzik
Signed-off-by: Greg Kroah-Hartman
28 Oct, 2006
1 commit
-
This reverts much of the original pci_fixup_video change and makes it
work for all arches that need it.fixed, and tested on x86, x86_64 and IA64 dig.
Signed-off-by: Eiichiro Oiwa
Acked-by: David Miller
Signed-off-by: Greg Kroah-Hartman
04 Oct, 2006
1 commit
-
Currently we attempt to predict how many irqs we will be able to allocate with
msi using pci_vector_resources and some complicated accounting, and then we
only allow each device as many irqs as we think are available on average.Only the s2io driver even takes advantage of this feature all other drivers
have a fixed number of irqs they need and bail if they can't get them.pci_vector_resources is inaccurate if anyone ever frees an irq. The whole
implmentation is racy. The current irq limit policy does not appear to make
sense with current drivers. So I have simplified things. We can revisit this
we we need a more sophisticated policy.Signed-off-by: Eric W. Biederman
Cc: Ingo Molnar
Cc: Thomas Gleixner
Cc: Benjamin Herrenschmidt
Cc: Rajesh Shah
Cc: Andi Kleen
Cc: "Protasevich, Natalie"
Cc: "Luck, Tony"
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
27 Sep, 2006
1 commit
-
This patch prevents pcibios_disable_device() from disabling interrupts
of devices which is not enabled.Signed-off-by: Kenji Kaneshige
Signed-off-by: MUNEDA Takahiro
Signed-off-by: Satoru Takeuchi
Signed-off-by: Kristen Carlson Accardi
Signed-off-by: Greg Kroah-Hartman
11 Jul, 2006
1 commit
-
Newer ARMs have a 40 bit physical address space, but mapping physical
memory above 4G needs a special page table format which we (currently?) do
not use for userspace mappings, so what happens instead is that mapping an
address >= 4G will happily discard the upper bits and wrap.There is a valid_mmap_phys_addr_range() arch hook where we could check for
>= 4G addresses and deny the mapping, but this hook takes an unsigned long
address:static inline int valid_mmap_phys_addr_range(unsigned long addr, size_t size);
And drivers/char/mem.c:mmap_mem() calls it like this:
static int mmap_mem(struct file * file, struct vm_area_struct * vma)
{
size_t size = vma->vm_end - vma->vm_start;if (!valid_mmap_phys_addr_range(vma->vm_pgoff << PAGE_SHIFT, size))
So that's not much help either.
This patch makes the hook take a pfn instead of a phys address.
Signed-off-by: Lennert Buytenhek
Cc: Bjorn Helgaas
Cc: "Luck, Tony"
Cc: Russell King
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
01 Jul, 2006
1 commit
-
Signed-off-by: Jörn Engel
Signed-off-by: Adrian Bunk
