26 Nov, 2009
40 commits
-
The general structures are defined at DM365 SoC file and the specific
platform data structure for the EVM is defined at board file.Signed-off-by: Miguel Aguilar
-
DMx:
- enable MMC and dm365evm_keys
- Enable DM355 and DM365 input drivers as modules.da8xx
- combine da830 and da850 into common defconfig
- drop SYSFS_DEPRECATED flag
- auto-select D$ writethrough for da830
- enable CPUfreq and FBSigned-off-by: Kevin Hilman
-
In the McASP clock definition add a flag to indicate that the peripheral clock
belongs to ASYNC3 clock domain.Signed-off-by: Chaithrika U S
Signed-off-by: Kevin Hilman -
This patch adds platform data and partition info for NAND on dm6467 EVM.
Note that the partition layout is dependent on the UBL, U-Boot etc. used. This
patch tries to minimize that dependency by setting first partition for UBL,
U-Boot and environment altogether.Signed-off-by: Hemant Pedanekar
Signed-off-by: Kevin Hilman -
There have accumulated quite a lot of them after the code reorganizations...
In several cases I had to replace #include which wasn't
needed directly but happened to #include which was needed.Signed-off-by: Sergei Shtylyov
Signed-off-by: Kevin Hilman -
This patch makes it easier to identify SoC init failures
by panicing when SoC init fails. Without successful SoC
init, the kernel eventually fails when attempt is made to
access the clocks.Also, an error is printed when JTAG ID match fails to make
it easier to identify failures due to SoC rev changes.Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
DA850/OMAP-L138 EVM has a RMII Ethernet PHY on the UI daughter card. The PHY
is enabled by proper programming of the IO Expander (TCA6416) ports. Also for
RMII PHY to work, the MDIO clock of MII PHY has to be disabled since both the
PHYs have the same address. This is done via the GPIO2[6] pin. This patch adds
support for RMII PHY.This patch also adds a menuconfig option to select one or no peripheral
connected to expander. Currently, sub-options in this menu are RMII and no
peripheral.This menuconfig option is similar to the one present for UI card on
DA830/OMAP-L137 EVM.Signed-off-by: Chaithrika U S
Signed-off-by: Kevin Hilman -
DA850/OMAP-L138 EVM can be connected to an UI card which has various
peripherals on it.The UI card has TCA6416 expander which can be probed
to check whether the UI card is connected or not. If the UI card is
connected, setup NOR and NAND devices. This is done via the expander
setup callback.Signed-off-by: Chaithrika U S
Signed-off-by: Kevin Hilman -
Replace badly chosen 'psc_ctlr' name of the 'struct clk' field (PSC already
means "Power and Sleep Controller", so the '_ctlr' postfix makes the name
tautological) with technically correct 'gpsc' (Global PSC -- which contains
all the module registers).Signed-off-by: Sergei Shtylyov
Signed-off-by: Kevin Hilman -
This patch adds support for using the TPS65070 PMIC found
on the DA850/OMAP-L138 EVM.It defines the power rail consumer mapping and registers the
the I2C based PMIC as a board device.The power rail constraints are derived from the maxmimum and
minimum recommended operating condition values of the respective
consumers derived from section 5.2 of the OMAP-L138 datasheet.Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
This patch adds support for regulating the CVDD voltage for the
DA850/OMAP-L138 platform.The CVDD min and max values for each OPP have been obtained from
section 5.2 "Recommended Operating Conditions" of SPRS586Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
Adds basic frequency scaling support for DA850/OMAP-L138.
Currently, frequency scaling only on PLL0 is supported. No scaling of PLL1
as yet.Peripherals like MMC/SD which have a clock input synchronous with
ARM clock will not work well since the clock will change behind their backs.
Support for notification to such devices to adjust themselves to the
new frequency will be added in later patches. Current defconfigs keep
CPUFreq disabled so it will not affect normal operation.The OPP defintions assume clock input of 24MHz to the SoC. This is inline
with hardcoding of input frequency in the .c files. At some point
this will need to move into board dependent code as new boards appear with
a different reference clock.Tested on OMAP-L138 EVM with ondemand governer and a shell script to
vary processor load.Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
Adds a basic CPUFreq driver for DaVinci devices registering with the
kernel CPUFreq infrastructure.Support is added for both frequency and voltage regulation.
Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
All that is needed is the existing #include
Signed-off-by: Kevin Hilman
-
Newer revs of da830 silicon have different 'variant' field of the JTAG
id register. Current code only supports rev 1.0 silicon.This patch adds support for rev1.1 and rev2.0 silicon and updates
the 'name' strings to add a '-' between 'omap' & 'l137' to have
consistent naming with da850/omap-l138.From Mark Grosen :
"There are currently three silicon revisions for OMAPL137. The JTAG IDs
(DEVIDR register contents) for each silicon revision are shown below:0x0B7D F02F for silicon revision 1.0
0x8B7D F02F for silicon revision 1.1
0x9B7D F02F for silicon revision 2.0Corresponding errata documentation will be available in the next few
weeks on the ti.com website."Reported-by: Nick Thompson
Signed-off-by: Mark A. Greer
Signed-off-by: Kevin Hilman -
The machine name string shows up in /proc/cpuinfo under 'Hardware' and
can be used by userspace apps. Make the format consistent with the
DA850/OMAP-l138 EVM by adding the '-' between OMAP and L137.Signed-off-by: Kevin Hilman
-
On this board the OHCI port's power control and over-current signals from
TPS2065 power switch are connected via GPIO1[15] and GPIO2[1] respectively,
so we can implement the DA8xx OHCI glue layer's hooks for overriding the
root hub port's power and over-current status bits.We also have to properly set up the clocking mode in the CFGCHIP2 register,
so that internal 24 MHz reference clock is fed to the USB 2.0 (MUSB) PHY and
its output is used to clock the USB 1.1 (OHCI) PHY...Signed-off-by: Sergei Shtylyov
Signed-off-by: Kevin Hilman -
Add the function to register the OHCI platform device, given the root hub
related platform data passed from the board specific code. The platfrom
data provide for overriding the OHCI port power and over-current bits at
the board level.Signed-off-by: Sergei Shtylyov
Signed-off-by: Kevin Hilman -
These are needed by the MUSB and OHCI glue layers...
Signed-off-by: Sergei Shtylyov
Signed-off-by: Kevin Hilman -
The patch itself does not change the functionality of
any existing code. PARAM entries in the present GIT kernel
are referred to as slots. New API's being added to the
EDMA driver were referring to these PARAM entries as
"params". This patch updates the terminolgy used in the
EDMA driver.Signed-off-by: Sandeep Paulraj
Signed-off-by: Kevin Hilman -
The reserve_contiguous_params function is used to reserve
a set of contiguous PARAMs. If we do not find a complete
set of contiguous PARAMs, the functions still has to free
every PARAM that it found to be free in the process of finding a
complete set and thus marked as "in use".
This patch mainly deals with correctly handling the
freeing of PARAMs.Signed-off-by: Sandeep Paulraj
Signed-off-by: Kevin Hilman -
This patch updates the NAND driver platform data to use 4-bit ECC and the
ECC_HW/ECC_HW_OOB_FIRST modes.Signed-off-by: Sneha Narnakaje
Signed-off-by: Kevin Hilman -
This patch updates the NAND driver platform data to use 4-bit ECC and the
ECC_HW/ECC_HW_OOB_FIRST modes.Signed-off-by: Sneha Narnakaje
Signed-off-by: Kevin Hilman -
The edma_alloc_cont_slots API is used for obtaining a set of
contiguous slots. When we use the "_ANY" option with this
API, by definition of this option it is suppossed to start
looking for a set of contiguous slots starting from slot 64 for
DaVinci SOC's and 32 for DA8xx SOC's. This has been explained in
the API description in the driver itself. So when we use the
"_ANY" option with this API, the slot number passed as
an argument should be a "don't care".
This patch takes care of this condition mentioned above.
When checking to see if the starting slot is a valid number,
it checks to make sure that the "_ANY" option is not used.Signed-off-by: Sandeep Paulraj
Signed-off-by: Kevin Hilman -
In the edma_free_cont_slots API, the variable slot was being modified
and then used in the for loop.
This results in incorrect behaviour when the API is used.Signed-off-by: Sandeep Paulraj
Signed-off-by: Kevin Hilman -
On the latest DA850/OMAP-L138 EVM (Beta) the GPIO pin
number of LCD panel power has changed. This patch takes
care of this change. Software will support only Beta
versions of DA850/OMAP-L138 EVM.In the process, add the missing entry for data pin 0
and remove the GPIO specific pins from da850_lcdcntl_pins
structure. EVM specific muxing for LCD is being done in the
board file now.Signed-off-by: Sudhakar Rajashekhara
Signed-off-by: Kevin Hilman -
Add RTC support for the da830/omap-l137 and da850/omap-l138
SoC's by leveraging existing the rtc-omap driver.Signed-off-by: Mark A. Greer
Signed-off-by: Kevin Hilman -
Add graphics support for the Sharp LCD035Q3DG01 graphical
LCD that's on the User Interface (UI) daughter card of the
DA830/OMAP-L137 EVM.The LCD shares EMIFA lines with the NAND and NOR devices that
are also on the UI card so those lines are shared via a couple
of muxes. The muxes are controlled by the 'MUX_MODE' line on
the UI card. The 'MUX_MODE' line is controlled by pin P6 of
a pcf8574 i2c expander that's at i2c address 0x3f on UI card.
The i2c expander is controlled using the gpio infrastructure
from the board code using the 'setup()' and 'teardown()'
routines.Signed-off-by: Steve Chen
Signed-off-by: Mark A. Greer
Signed-off-by: Kevin Hilman -
Add support for the Sharp LCD035Q3DG01 graphical LCD. This
requires a minor interface change to da8xx_register_lcdc()
so that the board code can pass in the platform_data which
describes the lcd controller that's to be used.Signed-off-by: Mark A. Greer
Signed-off-by: Kevin Hilman -
Add pinmux settings, etc. to enable the MMC/SC hardware.
Signed-off-by: David A. Griego
Signed-off-by: Mark A. Greer
Signed-off-by: Kevin Hilman -
DM6467 silicon revisions 3.x have variant field in JTAGID register as '1'.
This path adds entry for the same in dm646x_ids to be able to boot on boards
with 3.x revision chips.Also modifies name for 'variant=0' (revisions 1.0, 1.1).
Signed-off-by: Hemant Pedanekar
Signed-off-by: Kevin Hilman -
The patch allows Async3 clock source to be selected between PLL1 SYSCLK2
and PLL0 SYSCLK2.Having Async3 source from PLL1 SYSCLK2 allows peripherals on that
domain to remain unaffected by frequency scaling on PLL0.Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
The clk_set_parent() API is implemented to enable re-parenting
clocks in the clock tree.This is useful in DVFS and helps by shifting clocks to an asynchronous
domain where supported by hardwareSigned-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
clk_round_rate, clk_set_rate have been updated to handle dynamic
frequency changes.The motivation behind the changes is to support dynamic CPU frequency
change.davinci_set_pllrate() changes the PLL rate of a given PLL. This function
has been presented as a generic function though it has been tested only
on OMAP-L138 EVM. No other currently available DaVinci device will probably
use this function, but any future device specific changes will hopefully be
small enough to get taken care using a cpu_is_xxx() macro.Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
Make clock rate recalculation easy by having a re-calculate
function for each clock.The existing functions for calculation of output rates of PLL
and PLL-derived sysclks have been convered to the new
re-calculate API.A new function is introduced to take care of rate
(re)calculation for leaf clocks.Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
Achieve easy top down traversal of clock tree by keeping
track of each clock's list of children.This is useful in supporting DVFS where clock rates of
all children need to be updated in an efficient manner.Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
This makes it clear that JTAG ID register is part of the
SYSCFG moduleSigned-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
Avoid use of IO_ADDRESS() for SYSCFG module by doing an ioremap() instead.
Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman -
Rename the DA8XX_BOOT_CFG_BASE macro to get it in line
with the public documentation for these parts.Signed-off-by: Sekhar Nori
Signed-off-by: Kevin Hilman
