27 Dec, 2011
40 commits
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* tip/perf/core: (66 commits)
perf, x86: Expose perf capability to other modules
perf, x86: Implement arch event mask as quirk
x86, perf: Disable non available architectural events
jump_label: Provide jump_label_key initializers
jump_label, x86: Fix section mismatch
perf, core: Rate limit perf_sched_events jump_label patching
perf: Fix enable_on_exec for sibling events
perf: Remove superfluous arguments
perf, x86: Prefer fixed-purpose counters when scheduling
perf, x86: Fix event scheduler for constraints with overlapping counters
perf, x86: Implement event scheduler helper functions
perf: Avoid a useless pmu_disable() in the perf-tick
x86/tools: Add decoded instruction dump mode
x86: Update instruction decoder to support new AVX formats
x86/tools: Fix insn_sanity message outputs
x86/tools: Fix instruction decoder message output
x86: Fix instruction decoder to handle grouped AVX instructions
x86/tools: Fix Makefile to build all test tools
perf test: Soft errors shouldn't stop the "Validate PERF_RECORD_" test
perf test: Validate PERF_RECORD_ events and perf_sample fields
...Signed-off-by: Avi Kivity
* commit 'b3d9468a8bd218a695e3a0ff112cd4efd27b670a': (66 commits)
perf, x86: Expose perf capability to other modules
perf, x86: Implement arch event mask as quirk
x86, perf: Disable non available architectural events
jump_label: Provide jump_label_key initializers
jump_label, x86: Fix section mismatch
perf, core: Rate limit perf_sched_events jump_label patching
perf: Fix enable_on_exec for sibling events
perf: Remove superfluous arguments
perf, x86: Prefer fixed-purpose counters when scheduling
perf, x86: Fix event scheduler for constraints with overlapping counters
perf, x86: Implement event scheduler helper functions
perf: Avoid a useless pmu_disable() in the perf-tick
x86/tools: Add decoded instruction dump mode
x86: Update instruction decoder to support new AVX formats
x86/tools: Fix insn_sanity message outputs
x86/tools: Fix instruction decoder message output
x86: Fix instruction decoder to handle grouped AVX instructions
x86/tools: Fix Makefile to build all test tools
perf test: Soft errors shouldn't stop the "Validate PERF_RECORD_" test
perf test: Validate PERF_RECORD_ events and perf_sample fields
... -
Switch to using memdup_user when possible. This makes code more
smaller and compact, and prevents errors.Signed-off-by: Sasha Levin
Signed-off-by: Avi Kivity -
Switch to kmemdup() in two places to shorten the code and avoid possible bugs.
Signed-off-by: Sasha Levin
Signed-off-by: Avi Kivity -
Signed-off-by: Avi Kivity
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This was probably copy&pasted from the cr0 case, but it's unneeded here.
Signed-off-by: Jan Kiszka
Signed-off-by: Avi Kivity -
freed_pages is never evaluated, so remove it as well as the return code
kvm_mmu_remove_some_alloc_mmu_pages so far delivered to its only user.Signed-off-by: Jan Kiszka
Signed-off-by: Avi Kivity -
percpu_xxx funcs are duplicated with this_cpu_xxx funcs, so replace them
for further code clean up.And in preempt safe scenario, __this_cpu_xxx funcs has a bit better
performance since __this_cpu_xxx has no redundant preempt_disable()Signed-off-by: Alex Shi
Signed-off-by: Avi Kivity -
inline audit function and little cleanup
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
The unsync code should be stable now, maybe it is the time to remove this
parameter to cleanup the code a little bitSigned-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Move the mmu code in kvm_arch_vcpu_init() to kvm_mmu_create()
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
KVM_EXIT_HYPERCALL is not used anymore, so remove the code
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
The tracepoint is only used to audit mmu code, it should not be exposed to
user, let us replace it with jump-label.Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Export these two symbols, they will be used by KVM mmu audit
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
This patch cleans and simplifies kvm_dev_ioctl_get_supported_cpuid by using a table
instead of duplicating code as Avi suggested.This patch also fixes a bug where kvm_dev_ioctl_get_supported_cpuid would return
-E2BIG when amount of entries passed was just right.Signed-off-by: Sasha Levin
Signed-off-by: Avi Kivity -
Intel latest cpu add 6 new features, refer http://software.intel.com/file/36945
The new feature cpuid listed as below:1. FMA CPUID.EAX=01H:ECX.FMA[bit 12]
2. MOVBE CPUID.EAX=01H:ECX.MOVBE[bit 22]
3. BMI1 CPUID.EAX=07H,ECX=0H:EBX.BMI1[bit 3]
4. AVX2 CPUID.EAX=07H,ECX=0H:EBX.AVX2[bit 5]
5. BMI2 CPUID.EAX=07H,ECX=0H:EBX.BMI2[bit 8]
6. LZCNT CPUID.EAX=80000001H:ECX.LZCNT[bit 5]This patch expose these features to guest.
Among them, FMA/MOVBE/LZCNT has already been defined, MOVBE/LZCNT has
already been exposed.This patch defines BMI1/AVX2/BMI2, and exposes FMA/BMI1/AVX2/BMI2 to guest.
Signed-off-by: Liu, Jinsong
Signed-off-by: Avi Kivity -
The cpuid code has grown; put it into a separate file.
Signed-off-by: Avi Kivity
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INSB : 6C
INSW/INSD : 6D
OUTSB : 6E
OUTSW/OUTSD: 6FThe I/O port address is read from the DX register when we decode the
operand because we see the SrcDX/DstDX flag is set.Signed-off-by: Takuya Yoshikawa
Signed-off-by: Avi Kivity -
This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the
ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write
consistent with ioapic_mmio_read, which also allows byte and word accesses.Signed-off-by: Julian Stecklina
Signed-off-by: Avi Kivity -
There is the same struct definition in ia64 and kvm common code:
arch/ia64/kvm//kvm-ia64.c: At top level:
arch/ia64/kvm//kvm-ia64.c:777:8: error: redefinition of ‘struct kvm_io_range’
include/linux/kvm_host.h:62:8: note: originally defined hereSo, rename kvm_io_range to kvm_ia64_io_range in ia64 code
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
The operation of getting dirty log is frequent when framebuffer-based
displays are used(for example, Xwindow), so, we introduce a mapping table
to speed up id_to_memslot()Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Sort memslots base on its size and use line search to find it, so that the
larger memslots have better fitThe idea is from Avi
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Introduce id_to_memslot to get memslot by slot id
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Introduce kvm_for_each_memslot to walk all valid memslot
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Introduce update_memslots to update slot which will be update to
kvm->memslotsSigned-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Introduce KVM_MEM_SLOTS_NUM macro to instead of
KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTSSigned-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
BSF: 0F BC
BSR: 0F BDSigned-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
CMPXCHG: 0F B0, 0F B1
Signed-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
WRMSR: 0F 30
RDMSR: 0F 32Signed-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
MOV: 0F 22 (move to control registers)
MOV: 0F 23 (move to debug registers)Signed-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
CALL: E8
Signed-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
BT : 0F A3
BTS: 0F AB
BTR: 0F B3
BTC: 0F BBGroup 8: 0F BA
Signed-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
IN : E4, E5, EC, ED
OUT: E6, E7, EE, EFSigned-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
vmx_load_host_state() does not handle msrs switching (except
MSR_KERNEL_GS_BASE) since commit 26bb0981b3f. Remove call to it
where it is no longer make sense.Signed-off-by: Gleb Natapov
Signed-off-by: Avi Kivity -
Currently, write protecting a slot needs to walk all the shadow pages
and checks ones which have a pte mapping a page in it.The walk is overly heavy when dirty pages in that slot are not so many
and checking the shadow pages would result in unwanted cache pollution.To mitigate this problem, we use rmap_write_protect() and check only
the sptes which can be reached from gfns marked in the dirty bitmap
when the number of dirty pages are less than that of shadow pages.This criterion is reasonable in its meaning and worked well in our test:
write protection became some times faster than before when the ratio of
dirty pages are low and was not worse even when the ratio was near the
criterion.Note that the locking for this write protection becomes fine grained.
The reason why this is safe is descripted in the comments.Signed-off-by: Takuya Yoshikawa
Signed-off-by: Avi Kivity -
Needed for the next patch which uses this number to decide how to write
protect a slot.Signed-off-by: Takuya Yoshikawa
Signed-off-by: Avi Kivity -
rmap_write_protect() calls gfn_to_rmap() for each level with gfn fixed.
This results in calling gfn_to_memslot() repeatedly with that gfn.This patch introduces __gfn_to_rmap() which takes the slot as an
argument to avoid this.This is also needed for the following dirty logging optimization.
Signed-off-by: Takuya Yoshikawa
Signed-off-by: Avi Kivity -
Remove redundant checks and use is_large_pte() macro.
Signed-off-by: Takuya Yoshikawa
Signed-off-by: Avi Kivity -
Use kmemdup rather than duplicating its implementation
The semantic patch that makes this change is available
in scripts/coccinelle/api/memdup.cocci.More information about semantic patching is available at
http://coccinelle.lip6.fr/Signed-off-by: Thomas Meyer
Signed-off-by: Marcelo Tosatti -
The host side pv mmu support has been marked for feature removal in
January 2011. It's not in use, is slower than shadow or hardware
assisted paging, and a maintenance burden. It's November 2011, time to
remove it.Signed-off-by: Chris Wright
Signed-off-by: Avi Kivity -
This has not been used for some years now. It's time to remove it.
Signed-off-by: Chris Wright
Signed-off-by: Avi Kivity
