Eric Lee / smarc-fsl-linux-kernel

24 Apr, 2009

1 commit

  • c5b736d09   davinci: major rework of clock, PLL, PSC infrastructure ... Browse Code »

    This is a significant rework of the low-level clock, PLL and Power
    Sleep Controller (PSC) implementation for the DaVinci family. The
    primary goal is to have better modeling if the hardware clocks and
    features with the aim of DVFS functionality.

    Highlights:
    - model PLLs and all PLL-derived clocks
    - model parent/child relationships of PLLs and clocks
    - convert to new clkdev layer
    - view clock frequency and refcount via /proc/davinci_clocks

    Special thanks to significant contributions and testing by David
    Brownell.

    Cc: David Brownell
    Signed-off-by: Kevin Hilman

    Kevin Hilman
     

07 Aug, 2008

1 commit