19 Feb, 2011
2 commits
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Consolidate the FPGA IRQ handling code. Integrator/AP and Versatile
have one FPGA-based IRQ handler each. Integrator/CP has three.Acked-by: Catalin Marinas
Signed-off-by: Russell King -
This consolidates the CLCD panel definitions and memory allocation into
one location.Rename the Sanyo 2.5in and Epson 2.2in displays after their respective
part numbers. Rather than using a general "Sanyo 2.5in" and "Epson
2.2in" description of the display panel, use the manufacturers part
number to be more specific. This helps people identify what the timings
actually refer to, which are panel specific.While here, add CLCD capability information to each panel definition,
which has no effect until we add the board-level capabilities.Acked-by: Catalin Marinas
Signed-off-by: Russell King
06 Jan, 2011
1 commit
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Conflicts:
arch/arm/mach-vexpress/v2m.c
arch/arm/plat-omap/counter_32k.c
arch/arm/plat-versatile/Makefile
23 Dec, 2010
1 commit
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Convert versatile platforms to use the new sched_clock() infrastructure
for extending 32bit counters to full 64-bit nanoseconds.Tested-by: Will Deacon
Signed-off-by: Russell King
04 Nov, 2010
1 commit
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From: Rob Herring
The timer-sp h/w used on versatile platforms can also be used for other
platforms, so move it to a common location.Signed-off-by: Rob Herring
Signed-off-by: Russell King
02 May, 2010
2 commits
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Signed-off-by: Russell King
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Signed-off-by: Russell King