08 Jun, 2017
40 commits
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At imx7ulp, if the system enters idle, it will close some clocks and affect
USB transfer. In order to avoid it, we request pmqos to avoid system
entering idle when the USB is in use.Signed-off-by: Peter Chen
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imx7ulp non core register mapping is similar with imx7d, and the
initialization is the same, but lacks of USB charger detection support.Signed-off-by: Peter Chen
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At v4.1 kernel, we can't get cable type at notifier, but at
extcon-usb-gpio.c notifies both VBUS and ID event, we had to
do special handling for ID event, and omit VBUS event. Current
implementation only supports ID extcon event.If wakeup event occurs by extcon, it needs to call ci_irq again since the
first ci_irq calling at extcon notifier only wakes up controller, but
do noop for event handling.Signed-off-by: Peter Chen
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At imx7ulp, the USB related analog register is located in PHY register
region too, so we need to control PLL at PHY driver directly.Signed-off-by: Peter Chen
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Add USBOTG1 support, we use GPIO as ID function for dual-role switch.
Besides, #define to imx7ulp.dtsi since
lots of boards may need it.Signed-off-by: Peter Chen
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The two extcon notifiers are almost the same except for the
variable name for the cable structure and the id notifier inverts
the cable->state logic. Make it the same and replace two
functions with one to save some lines. This also makes it so that
the id cable state is true when the id pin is pulled low, so we
change the name of ->state to ->connected to properly reflect
that we're interested in the cable being connected.Cc: Peter Chen
Cc: Greg Kroah-Hartman
Cc: "Ivan T. Ivanov"
Signed-off-by: Stephen Boyd
Signed-off-by: Peter Chen -
We're currently emulating the vbus and id interrupts in the OTGSC
read API, but we also need to make sure that if we're handling
the events with extcon that we don't enable the interrupts for
those events in the hardware. Therefore, properly emulate this
register if we're using extcon, but don't enable the interrupts.
This allows me to get my cable connect/disconnect working
properly without getting spurious interrupts on my device that
uses an extcon for these two events.Acked-by: Peter Chen
Cc: Greg Kroah-Hartman
Cc: "Ivan T. Ivanov"
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID detect")
Signed-off-by: Stephen Boyd
Signed-off-by: Peter Chen -
With the id and vbus detection done via extcon we need to make
sure we poll the status of OTGSC properly by considering what the
extcon is saying, and not just what the register is saying. Let's
move this hw_wait_reg() function to the only place it's used and
simplify it for polling the OTGSC register. Then we can make
certain we only use the hw_read_otgsc() API to read OTGSC, which
will make sure we properly handle extcon events.Acked-by: Peter Chen
Cc: Greg Kroah-Hartman
Cc: "Ivan T. Ivanov"
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID detect")
Signed-off-by: Stephen Boyd
Signed-off-by: Peter Chen -
The input MCLK is 12.288MHz, The desired output sysclk is 11.2896MHz
the sample rate is 44100Hz, with the pllprescale=2, postscale=sysclkdiv=1,
some chip may have wrong bclk and lrclk output in master mode. then there
will be no sound.
With the pllprescale=1, postscale=2, the output clock is correct. so use
this configuration to workaround this issue.
Tested 8k/11k/16k/22k/32k/44k/48kHz case.Signed-off-by: Shengjiu Wang
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Before suspend, the sysclock select pll out as source, after resume
sysclock select the mlck as the source, so the sample rate is changed
the sound's pitch is shifted.
The issue is caused by the commit c1845da3d08de6cf2642fec74f7a46d05de6314d
Which removed the wm8960_configure_clocking() when bias level changes
from STANDBY to PREPARE, this patch is to add it back.Signed-off-by: Shengjiu Wang
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When ENET wake up is enabled by wake-on-lan (WOL), the weak 2P5
ldo needs to keep power up even for LPDDR2 due to the ENET_PLL is
feed by the weak 2p5 ldo during DSM. If the weak 2P5 ldo is power
down the ENET module is power off hence it is not able to sense the
WOL interrupt and trigger the system resume.Signed-off-by: Juan Gutierrez
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Add support for SCM i.MX6DQ 1Gb QWKS rev3
Support the next features for 1Gb qwks rev3 boards:
- Support for fix lpddr2 mode
- hdcp and enetirq
- bluetooth and wifi for Murata ZP SDIO dongleSigned-off-by: Juan Gutierrez
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For some SD Ultra (40MB/s) the drive strength/speed settings
on the iomux ctrl pads for SD3 is not enougn causing some
error by transfering data as below:mmcblk2: error -84 transferring data, sector 2250553, nr 151,
cmd response 0x900, card status 0x0Updating the DSE and Speed on the pad ctrl fixes the issue.
Signed-off-by: Juan Gutierrez
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Enable ion driver on imx7ulp
Signed-off-by: Song Bing
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Add devicetree bindings for mxc ion
Signed-off-by: Song Bing
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This patch fixes below build warning:
CC arch/arm/mach-imx/clk-imx7ulp.o
LD init/built-in.o
arch/arm/mach-imx/clk-imx7ulp.c:42:20: warning: 'cm4_periph_plat_sels' defined but not used [-Wunused-variable]
LD arch/arm/mach-imx/built-in.o
CC kernel/module.o
GZIP kernel/config_data.gzSigned-off-by: Anson Huang
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On i.MX7ULP, the resume entry and parameter are saved
in DGO_GP registers, it has two power domains, one
is normal domain, the other is SNVS domain, if M4 also
enters VLLS mode, DGO needs to be updated into SNVS
domain to avoid power lost and lead to resume fail.Signed-off-by: Anson Huang
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Adjust i.MX7ULP suspend ocram location from
SRAM_U to SRAM_L, occupy last 16K.Signed-off-by: Anson Huang
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Adjust suspend ocram location for i.MX7ULP, since previous
location is used by M4.Signed-off-by: Anson Huang
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Add fsl,wdog_b and pinmux settings.
We need to use wdog_b to trigger pmic reset, when we trigger
wdog_b reset, we should not trigger wdog_reset_b_deb.Signed-off-by: Peng Fan
(cherry picked from commit 0400ecd8fb3a3772dfb3a68c55960419a63f1650) -
add pf1550-regulator-rpmsg driver node in dts.
Signed-off-by: Robin Gong
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enable pf1550-regulator-rpmsg driver by default.
Signed-off-by: Robin Gong
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add pf1550 regulator rpmsg driver to control pf1550 on the m4 side
by rpmsg.Signed-off-by: Robin Gong
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set ABF0 of MU_CR to let M4 know MU is ready, thus MU can initialize rpmsg
later.Signed-off-by: Robin Gong
(cherry picked from commit 4969903fc8d32c5e6dfc4fe5f2f68e52aef080bc) -
Enable rpmsg/mu support on i.mx7ulp, since some mu register and
rmpsg buffer different as beforeSigned-off-by: Richard Zhu
Signed-off-by: Robin Gong -
Enable lpi2c in defconfig, CONFIG_I2C_IMX_LPI2C=y
Signed-off-by: Gao Pan
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sensor node: fxas2100x, fxos8700, mpl3115
Signed-off-by: Gao Pan
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A null dereference or Oops exception might occurs when reading at once the
whole content of an spi-nor of big enough size that requires an scatterlist
table that does not fit into one single page.The spi_map_buf function is ignoring the chained sg case by dereferenceing
the scatterlist elements in an array fashion. This wrongly assumes that
the allocation of the scatterlist elements are contiguous. This is true as
long as the scatterlist table fits within a PAGE_SIZE. However, for
allocation where the scatter table is bigger than that, the pages allocated
by sg_alloc might not be contigous.The sg table can be properly walked by sg_next instead of using an array.
Signed-off-by: Juan Gutierrez
Signed-off-by: Mark Brown -
Audio is in M4 domain, so we need an indepenent dts for audio.
M4 domain is controled by RTOS, this dts is for demo purpose in
linuxSigned-off-by: Shengjiu Wang
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In imx7ulp1, the sai can support two TX channel and two RX
channels, So the usage need to be updated.Signed-off-by: Shengjiu Wang
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There is no gpr setting in some board. so we can't return
a fatal error.Signed-off-by: Shengjiu Wang
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SAI in M4 domain, and the clock used by SAI is in M4 domain
Signed-off-by: Shengjiu Wang
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Add 1.2GHz setpoint for i.MX7D.
Signed-off-by: Bai Ping
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Add system reboot for i.MX7ULP. As there is no other way to reboot the
system, so use wdog restart handler to trigger the system reboot.Signed-off-by: Bai Ping
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This patch adds lpi2c bus driver to support new i.MX products
which use lpi2c instead of the old imx i2c.The lpi2c can continue operating in stop mode when an appropriate
clock is available. It is also designed for low CPU overhead with
DMA offloading of FIFO register accesses.Signed-off-by: Gao Pan
Reviewed-by: Fugang Duan
Reviewed-by: Vladimir Zapolskiy
Signed-off-by: Wolfram Sang -
Add a binding document for lpi2c driver.
Signed-off-by: Gao Pan
Signed-off-by: Wolfram Sang -
There is no card-detection pad connected for sd3 on the i.mx6 SX
EVB board. The card is assumed to be non-removable, hence, there is
no need to redetect the card during the pm callbacks. This can be
reached by including the pm-ignore-notify option on the usdhc3 device
on the dtb file.Signed-off-by: Juan Gutierrez
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The usb otg2, on the SXSCM EVB board is powered up directly by the
GEN_V5 signal from the PMIC, so there is no gpio assigned.The wrong assignation was preventing the busfreq driver to switch
to any other frequency, since the usb otg2 looks to be always
active.Signed-off-by: Juan Gutierrez
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Using the mdio and ethphy device that is referenced as a phy_handle
by the fec device is not properly handling the resume from suspend.Signed-off-by: Juan Gutierrez
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BCM WiFi driver needs to take care of card detect by itself. Using cd-post
property tells the mmc core to not detect the card automatically during
host driver probe and post it untill the client driver notifies to do it.The non-removable option is also required to fix a NULL dereference
occurred when resuming from suspend. The pm-ignore-notify parameter is
also included.Signed-off-by: Juan Gutierrez