24 Jan, 2008
3 commits
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With that patch fixed.c now fully emulates MDIO bus, thus no need
to duplicate PHY layer functionality. That, in turn, drastically
simplifies the code, and drops down line count.As an additional bonus, now there is no need to register MDIO bus
for each PHY, all emulated PHYs placed on the platform fixed MDIO bus.
There is also no more need to pre-allocate PHYs via .config option,
this is all now handled dynamically.Signed-off-by: Anton Vorontsov
Signed-off-by: Vitaly Bordug
Acked-by: Jeff Garzik
Signed-off-by: Kumar Gala -
The 85xx/86xx pci code no longer uses update_bridge_resource and it was the
only caller.Signed-off-by: Kumar Gala
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There were several issues if a memreserve range existed and happened
to be in highmem:* The bootmem allocator is only aware of lowmem so calling
reserve_bootmem with a highmem address would cause a BUG_ON
* All highmem pages were provided to the buddy allocatorAdded a lmb_is_reserved() api that we now use to determine if a highem
page should continue to be PageReserved or provided to the buddy
allocator.Also, we incorrectly reported the amount of pages reserved since all
highmem pages are initally marked reserved and we clear the
PageReserved flag as we "free" up the highmem pages.Signed-off-by: Kumar Gala
17 Jan, 2008
7 commits
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This adds the hugepagesz boot-time parameter for ppc64. It lets one
pick the size for huge pages. The choices available are 64K and 16M
when the base page size is 4k. It defaults to 16M (previously the
only only choice) if nothing or an invalid choice is specified.Tested 64K huge pages successfully with the libhugetlbfs 1.2.
Signed-off-by: Jon Tollefson
Signed-off-by: Paul Mackerras -
xlate_iomm_address() really wants the ds_addr to pass to the HV, so store
that value (instead of the BAR number) when we allocate the device bars.
This is not a fast path, so we can look up the device_node property
there instead of using the bussubno field of the pci_dn.The other user of iseries_ds_addr() was already scanning the device tree,
so looking up a property will not slow it down any more.Signed-off-by: Stephen Rothwell
Signed-off-by: Paul Mackerras -
Signed-off-by: Stephen Rothwell
Signed-off-by: Paul Mackerras -
... so move it into the #ifdef CONFIG_EEH section.
Signed-off-by: Stephen Rothwell
Signed-off-by: Paul Mackerras -
Similar to of_find_compatible_node(), of_find_matching_node() and
for_each_matching_node() allow you to iterate over the device tree
looking for specific nodes, except that they take of_device_id
tables instead of strings.This also moves of_match_node() from driver/of/device.c to
driver/of/base.c to colocate it with the of_find_matching_node which
depends on it.Signed-off-by: Grant Likely
Signed-off-by: Paul Mackerras -
Fixes sparse warning: constant 0xffffffffffffff80 is so big it is
unsigned longSigned-off-by: Geert Uytterhoeven
Signed-off-by: Paul Mackerras
16 Jan, 2008
1 commit
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Split pata_platform_{probe,remove} into two pieces:
1. pata_platform_{probe,remove} -- platform_device-dependant bits;
2. __ptata_platform_{probe,remove} -- device type neutral bits.This is done to not duplicate code for the OF-platform driver.
Signed-off-by: Anton Vorontsov
Acked-by: Paul Mundt
Signed-off-by: Olof Johansson
31 Dec, 2007
1 commit
28 Dec, 2007
2 commits
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By default the OpenPIC on PWRficient will bias to one core (since that
will improve changes of the other core being able to stay idle/powered
down). However, this conflicts with most irq load balancing schemes,
since setting an interrupt to be delivered to either core doesn't really
result in the load being shared. It also doesn't work well with the
soft irq disable feature of PPC, since EE will stay on until the first
interrupt is taken while soft disabled.Set the gconf0 config bit that enables even distribution of interrupts
among the two cores.Signed-off-by: Olof Johansson
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Some PWRficient-based boards have a NMI button that's wired up to a GPIO
as interrupt source. By configuring the openpic accordingly, these get
delivered as a machine check with high priority, instead of as an external
interrupt.The device tree contains a property "nmi-source" in the openpic node
for these systems, and it's the (hwirq) source for the input.Also, for these interrupts, the IACK is read from another register than
the regular (MCACK instead), but they are EOI'd as usual. So implement
said function for the mpic driver.Finally, move a couple of external function defines to include/ instead
of local under sysdev. Being able to mask/unmask and eoi directly saves
us from setting up a dummy irq handler that will never be called.Signed-off-by: Olof Johansson
24 Dec, 2007
4 commits
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Right now TLB entry 0 ist used as UART0 mapping for the early debug
output (via CONFIG_SERIAL_TEXT_DEBUG). This causes problems when many
TLB's get used upon Linux bootup (e.g. while PCIe scanning behind
bridges and/or switches on 440SPe platforms). This will overwrite the
TLB 0 entry and further debug output's may crash/hang the system.This patch moves the early debug UART0 TLB entry from 0 to 62 as done
in arch/powerpc. This way it is in the "pinned" area and will not get
overwritten. Also the arch/ppc/mm/44x_mmu.c code is now synced with the
newer code from arch/powerpc.Signed-off-by: Stefan Roese
Signed-off-by: Josh Boyer -
This adds some basic real mode based early udbg support for 40x
in order to debug things more easilySigned-off-by: Benjamin Herrenschmidt
Signed-off-by: Josh Boyer -
Accessing indirect DCRs is done via a pair of address/data DCRs.
Such accesses are thus inherently racy, vs. interrupts, preemption
and possibly SMP if 4xx SMP cores are ever used.This updates the mfdcri/mtdcri macros in dcr-native.h (which were
so far unused) to use a spinlock.In addition, add some common definitions to a new dcr-regs.h file.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Josh Boyer -
This adds a cputable function pointer for the CPU-side machine
check handling. The semantic is still the same as the old one,
the one in ppc_md. overrides the one in cputable, though
ultimately we'll want to change that so the CPU gets first.This removes CONFIG_440A which was a problem for multiplatform
kernels and instead fixes up the IVOR at runtime from a setup_cpu
function. The "A" version of the machine check also tweaks the
regs->trap value to differenciate the 2 versions at the C level.Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Josh Boyer
21 Dec, 2007
11 commits
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Fixes this warning:
arch/powerpc/platforms/powermac/pci.c: In function 'u3_ht_cfg_access':
arch/powerpc/platforms/powermac/pci.c:354: warning: return discards qualifiers from pointer target type
arch/powerpc/platforms/powermac/pci.c:358: warning: return discards qualifiers from pointer target typeSigned-off-by: Stephen Rothwell
Signed-off-by: Paul Mackerras -
This will allow us to declare const all the statically declared arrrays
of these.Signed-off-by: Stephen Rothwell
Signed-off-by: Paul Mackerras -
This fixes a few issues with via-pmu based backlight control.
First, it fixes a sign problem with the setup of the backlight
curve since the `range' value there -can- (and will) go negative.Then, it reworks the interaction between this and the via-pmu sleep
code to properly restore backlight on wakeup from sleep.Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Paul Mackerras -
These hooks ensure that a decrementer interrupt is not pending when
suspending; otherwise, problems may occur on 6xx/7xx/7xxx-based
systems (except for powermacs, which use a separate suspend path).
For example, with deep sleep on the 831x, a pending decrementer will
cause a system freeze because the SoC thinks the decrementer interrupt
would have woken the system, but the core must have interrupts
disabled due to the setup required for deep sleep.Changed via-pmu.c to use the new ppc_md hooks, and made the arch_*
functions call the generic_* functions unconditionally. -- paulusSigned-off-by: Scott Wood
Signed-off-by: Paul Mackerras -
This changes the spu context switch code to not write to reserved bits
of spu interrupt status register.
The architecture book says the reserved fields should be set to zero.Signed-off-by: Masato Noguchi
Signed-off-by: Jeremy Kerr
Signed-off-by: Paul Mackerras -
Based on original patches from
Arnd Bergmann ; and
Luke BrowningCurrently, spu contexts need to be loaded to the SPU in order to take
class 0 and class 1 exceptions.This change makes the actual interrupt-handlers much simpler (ie,
set the exception information in the context save area), and defers the
handling code to the spufs_handle_class[01] functions, called from
spufs_run_spu.This should improve the concurrency of the spu scheduling leading to
greater SPU utilization when SPUs are overcommited.Signed-off-by: Jeremy Kerr
Signed-off-by: Paul Mackerras -
Add a few #defines for the class 0, 1 and 2 interrupt status bits, and
use them instead of magic numbers when we're setting or checking for
these interrupts.Also, add a #define for the class 2 mailbox threshold interrupt mask.
Signed-off-by: Jeremy Kerr
Signed-off-by: Paul Mackerras -
Currently, part of the spufs code (switch.o, lscsa_alloc.o and fault.o)
is compiled directly into the kernel.This change moves these components of spufs into the kernel.
The lscsa and switch objects are fairly straightforward to move in.
For the fault.o module, we split the fault-handling code into two
parts: a/p/p/c/spu_fault.c and a/p/p/c/spufs/fault.c. The former is for
the in-kernel spu_handle_mm_fault function, and we move the rest of the
fault-handling code into spufs.Signed-off-by: Jeremy Kerr
Signed-off-by: Paul Mackerras -
Add platform specific SPU run control routines to the spufs. The current
spufs implementation uses the SPU master run control bit (MFC_SR1[S]) to
control SPE execution, but the PS3 hypervisor does not support the use of
this feature.This change adds the run control wrapper routies spu_enable_spu() and
spu_disable_spu(). The bare metal routines use the master run control
bit, and the PS3 specific routines use the priv2 run control register.An outstanding enhancement for the PS3 would be to add a guard to check
for incorrect access to the spu problem state when the spu context is
disabled. This check could be implemented with a flag added to the spu
context that would inhibit mapping problem state pages, and a routine
to unmap spu problem state pages. When the spu is enabled with
ps3_enable_spu() the flag would be set allowing pages to be mapped,
and when the spu is disabled with ps3_disable_spu() the flag would be
cleared and mapped problem state pages would be unmapped.Signed-off-by: Masato Noguchi
Signed-off-by: Geoff Levand
Signed-off-by: Jeremy Kerr
Signed-off-by: Paul Mackerras -
Make sure dm honours max_hw_sectors of underlying devices
We still have no firm testing evidence in support of this patch but
believe it may help to resolve some bug reports. - agkSigned-off-by: Neil Brown
Signed-off-by: Alasdair G Kergon
20 Dec, 2007
11 commits
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This merge the two implementations, based on the previously
fixed up 32 bits one. The pcibios_enable_device_hook in ppc_md
is now available for ppc64 use. Also remove the new unused
"initial" parameter from it and fixup users.Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Paul Mackerras -
The 32 bits PCI code now uses the generic code for assigning unassigned
resources and an algorithm similar to x86 for claiming existing ones.This works far better than the 64 bits code which basically can only
claim existing ones (pci_probe_only=1) or would fall apart completely.This merges them so that the new 32 bits implementation is used for both.
64 bits now gets the new PCI flags for controlling the behaviour, though
the old pci_probe_only global is still there for now to be cleared if you
want to.I kept a pcibios_claim_one_bus() function mostly based on the old 64
bits code for use by the DLPAR hotplug. This will have to be cleaned
up, thought I hope it will work in the meantime.Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Paul Mackerras -
The PCI code in 32 and 64 bits fixes up resources differently.
32 bits uses a header quirk plus handles bridges in pcibios_fixup_bus()
while 64 bits does things in various places depending on whether you
are using OF probing, using PCI hotplug, etc...This merges those by basically using the 32 bits approach for both,
with various tweaks to make 64 bits work with the new approach.Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Paul Mackerras -
This adds flags the platforms can use to enable domain numbers
in /proc/bus/pci.Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Paul Mackerras -
This adds to the 32 bits PCI code some flags, replacing the old
pci_assign_all_busses global, that allow us to control various
aspects of the PCI probing, such as whether to re-assign all
resources or not, or to not try to assign anything at all.This also adds the flag x86 already has to avoid ISA alignment
on bridges that don't have ISA forwarding enabled (no legacy
devices on the top level bus) and sets it for PowerMacs.Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Paul Mackerras -
Signed-off-by: Joe Perches
Signed-off-by: Paul Mackerras -
Signed-off-by: Joe Perches
Signed-off-by: Paul Mackerras -
PowerPC currently doesn't implement pci_set_dma_mask(), which means drivers
calling it will get the generic version in drivers/pci/pci.c.The powerpc dma mapping ops include a dma_set_mask() hook, which luckily is
not implemented by anyone - so there is no bug in the fact that the hook
is currently never called.However in future we'll add implementation(s) of dma_set_mask(), and so we
need pci_set_dma_mask() to call the hook.To save adding a hook to the dma mapping ops, pci-set_consistent_dma_mask()
simply calls the dma_set_mask() hook and then copies the new mask into
dev.coherenet_dma_mask.Signed-off-by: Michael Ellerman
Signed-off-by: Paul Mackerras -
This makes mmio_nvram_init() callable unconditionally by providing
a dummy definition when CONFIG_MMIO_NVRAM is not defined.Signed-off-by: Kou Ishizaki
Acked-by: Arnd Bergmann
Signed-off-by: Paul Mackerras -
The machine initcall macros allow initcalls to be registered which
test machine_is() before executing the initcall.Signed-off-by: Grant Likely
Signed-off-by: Paul Mackerras -
…cell-2.6 into for-2.6.25
