14 Dec, 2020
13 commits
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Add the CLKREQ reset for iMX8MP PCIe.
Signed-off-by: Richard Zhu
Reviewed-by: Fugang Duan -
Remove dev for mmio regmap init can forbid the
regmap to create entries for this device under
the /sys/kernel/debug/regmap/ directory which
can avoid hang issue when access the registers
if no display connected to it.Signed-off-by: Fancy Fang
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Use 'ARCH_MXC' config to replace 'ARCH_FSL_IMX8MM' and
'ARCH_FSL_IMX8MN' configs which are not defined for
dispmix reset kconfig entry.Signed-off-by: Fancy Fang
-
devm_regmap_init_mmio_clk() will try to get clock by matching
clock-names property in dts with its clk_id. So the clock name
should be identical to name which clock registered. Otherwise,
devm_regmap_init_mmio_clk() will fail with -ENOENT error.Signed-off-by: Guoniu.zhou
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Add pinctrl comsuser header file that defile the pintrl
interfaces for different configs define.Reported-by: Ran Wang
Signed-off-by: Fugang Duan
Tested-by: Ran Wang -
Add the clkreq reset used by the L1ss feature on iMX8M
Signed-off-by: Richard Zhu
-
This is an reset driver to implement a reset controller
device DISPMIX on IMX8MM and IMX8MN platforms. Dispmix
reset is used to reset or enable related buses and clks
for the submodules in DISPMIX.All the dispmix resets are divided into three subgroups:
sft_rstn, clk_en and mipi_rst, and each of them contains
several reset lines to control several different modules
on and off in DISPMIX which doesn't require the standard
reset flow, but only line assert and deassert operations.Signed-off-by: Fancy Fang
-
The reset PIN may loss its state when system suspend due to GPIO
controller power off. Set pinctrl as "sleep" state to keep PIN
voltage during system suspend, and configurate pinctrl as "default"
state after system resume back. Because GPIO resume back earlier
than gpio-reset, then GPIO signal can control the PIN voltage again.Reviewed-by: Richard Zhu
Signed-off-by: Fugang Duan
Signed-off-by: Arulpandiyan Vadivel
Signed-off-by: Shrikant Bobade
(cherry picked from commit ea5a9cdc1941afc36fd0f5a223ea762b85512130) -
Some devices need to wait for some milliseconds after reset, so add
post reset delay in the gpio-reset chip.The post reset delay is optional.
Signed-off-by: Fugang Duan
Signed-off-by: Arulpandiyan Vadivel -
Use the cansleep variant of the GPIO API.
Signed-off-by: Fugang Duan
Signed-off-by: Arulpandiyan Vadivel -
GPIO is widely used as the reset control for various devices. Let's
build the support in by default.[shawn.guo: cherry-pick commit 795fcb3bc5bb from imx_3.10.y]
Signed-off-by: Shawn Guo(cherry picked from commit 0cbf78b5b02c57e6fd0e57e811cfe56509c4fd24)
Signed-off-by: Arulpandiyan Vadivel -
It's a little bit late to register gpio-reset driver at module_init
time, because gpio-reset provides reset control via gpio for other
devices which are mostly probed at module_init time too. And it
becomes even worse, when the gpio comes from IO expander on I2C bus,
e.g. pca953x. In that case, gpio-reset needs to be ready before I2C
bus driver which is generally ready at subsys_initcall time. Let's
register gpio-reset driver in arch_initcall() to have it ready early
enough.The defer probe mechanism is not used here, because a reset controller
driver should be reasonably registered early than other devices. More
importantly, defer probe doe not help in some nasty cases, e.g. the
gpio-pca953x device itself needs a reset from gpio-reset driver start
working.[shawn.guo: cherry-pick commit 7153f05108ef from imx_3.10.y]
Signed-off-by: Shawn Guo(cherry picked from commit 11e3543010d4ed50db78a5fc809f24c89e8c6e30)
Signed-off-by: Arulpandiyan Vadivel -
This driver implements a reset controller device that toggle a gpio
connected to a reset pin of a peripheral IC. The delay between assertion
and de-assertion of the reset signal can be configured via device tree.Signed-off-by: Philipp Zabel
Reviewed-by: Stephen Warren
Reviewed-by: Pavel Machek
Signed-off-by: Shawn Guo
Signed-off-by: Arulpandiyan Vadivel
25 Oct, 2020
1 commit
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Pull ARM SoC-related driver updates from Olof Johansson:
"Various driver updates for platforms. A bulk of this is smaller fixes
or cleanups, but some of the new material this time around is:- Support for Nvidia Tegra234 SoC
- Ring accelerator support for TI AM65x
- PRUSS driver for TI platforms
- Renesas support for R-Car V3U SoC
- Reset support for Cortex-M4 processor on i.MX8MQ
There are also new socinfo entries for a handful of different SoCs and
platforms"* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits)
drm/mediatek: reduce clear event
soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
soc: mediatek: cmdq: add jump function
soc: mediatek: cmdq: add write_s_mask value function
soc: mediatek: cmdq: add write_s value function
soc: mediatek: cmdq: add read_s function
soc: mediatek: cmdq: add write_s_mask function
soc: mediatek: cmdq: add write_s function
soc: mediatek: cmdq: add address shift in jump
soc: mediatek: mtk-infracfg: Fix kerneldoc
soc: amlogic: pm-domains: use always-on flag
reset: sti: reset-syscfg: fix struct description warnings
reset: imx7: add the cm4 reset for i.MX8MQ
dt-bindings: reset: imx8mq: add m4 reset
reset: Fix and extend kerneldoc
reset: reset-zynqmp: Added support for Versal platform
dt-bindings: reset: Updated binding for Versal reset driver
reset: imx7: Support module build
soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk
soc: fsl: qman: convert to use be32_add_cpu()
...
23 Sep, 2020
5 commits
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Fix formating of struct description to avoid warning highlighted
by W=1 compilation.Fixes: e5d76075d930 ("drivers: reset: STi SoC system configuration reset controller support")
Signed-off-by: Alain Volmat
Signed-off-by: Philipp Zabel -
Add the cm4 reset used by the remoteproc driver
Signed-off-by: Peng Fan
Signed-off-by: Philipp Zabel -
Fix W=1 compile warnings (invalid kerneldoc):
drivers/reset/core.c:50: warning: Function parameter or member 'array' not described in 'reset_control'
drivers/reset/core.c:50: warning: Function parameter or member 'deassert_count' not described in 'reset_control'Signed-off-by: Krzysztof Kozlowski
Signed-off-by: Philipp Zabel -
Updated the reset driver to support Versal platform.
As part of adding Versal support
- Added Versal specific compatible string.
- Reset Id and number of resets are different for Versal and ZynqMP,
hence taken care of these two based on compatible string.Signed-off-by: Sai Krishna Potthuri
Signed-off-by: Philipp Zabel -
Use module_platform_driver(), add module device table, author,
description and license to support module build, and
CONFIG_RESET_IMX7 is changed to default 'y' ONLY for i.MX7D,
other platforms need to select it in defconfig.Signed-off-by: Anson Huang
Signed-off-by: Philipp Zabel
31 Aug, 2020
1 commit
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We want the USB fixes in here as well.
Signed-off-by: Greg Kroah-Hartman
24 Aug, 2020
1 commit
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Replace the existing /* fall through */ comments and its variants with
the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary
fall-through markings when it is the case.[1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through
Signed-off-by: Gustavo A. R. Silva
18 Aug, 2020
1 commit
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Raspberry Pi 4's co-processor controls some of the board's HW
initialization process, but it's up to Linux to trigger it when
relevant. Introduce a reset controller capable of interfacing with
RPi4's co-processor that models these firmware initialization routines as
reset lines.Reviewed-by: Florian Fainelli
Reviewed-by: Philipp Zabel
Signed-off-by: Nicolas Saenz Julienne
Link: https://lore.kernel.org/r/20200629161845.6021-3-nsaenzjulienne@suse.de
Signed-off-by: Greg Kroah-Hartman
27 Jul, 2020
1 commit
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…/ssantosh/linux-keystone into arm/drivers
SOC: TI Keystone driver update for v5.9
- TI K3 Ring Accelerator updates
- Few non critical warining fixes* tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
firmware: ti_sci: Replace HTTP links with HTTPS ones
soc: ti/ti_sci_protocol.h: drop a duplicated word + clarify
soc: ti: k3: fix semicolon.cocci warnings
soc: ti: k3-ringacc: fix: warn: variable dereferenced before check 'ring'
dmaengine: ti: k3-udma: Switch to k3_ringacc_request_rings_pair
soc: ti: k3-ringacc: separate soc specific initialization
soc: ti: k3-ringacc: add request pair of rings api.
soc: ti: k3-ringacc: add ring's flags to dump
soc: ti: k3-ringacc: Move state tracking variables under a struct
dt-bindings: soc: ti: k3-ringacc: convert bindings to json-schemaLink: https://lore.kernel.org/r/1595711814-7015-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
25 Jul, 2020
1 commit
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Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.Signed-off-by: Alexander A. Klimov
Acked-by: Rob Herring
Signed-off-by: Santosh Shilimkar
20 Jul, 2020
2 commits
-
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.Signed-off-by: Alexander A. Klimov
Signed-off-by: Philipp Zabel -
kernel test robot reports a compile warning about REG_OFFSET redefined
in the reset-intel-gw.c after merging commit e44ab4e14d6f4 ("regmap:
Simplify implementation of the regmap_read_poll_timeout() macro"). the
warning is like that:drivers/reset/reset-intel-gw.c:18:0: warning: "REG_OFFSET" redefined
#define REG_OFFSET GENMASK(31, 16)In file included from ./arch/arm/mach-ixp4xx/include/mach/hardware.h:30:0,
from ./arch/arm/mach-ixp4xx/include/mach/io.h:15,
from ./arch/arm/include/asm/io.h:198,
from ./include/linux/io.h:13,
from ./include/linux/iopoll.h:14,
from ./include/linux/regmap.h:20,
from drivers/reset/reset-intel-gw.c:12:
./arch/arm/mach-ixp4xx/include/mach/platform.h:25:0: note: this is the location of the previous definition
#define REG_OFFSET 3Reported-by: kernel test robot
Fixes: c9aef213e38cde ("reset: intel: Add system reset controller driver")
Signed-off-by: Dejin Zheng
Reviewed-by: Philipp Zabel
Signed-off-by: Philipp Zabel
16 Jun, 2020
2 commits
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The reset-simple code lacks a reset callback that is still pretty easy to
implement. The only real thing to consider is the delay needed for a device
to be reset, so let's expose that as part of the reset-simple driver data.Reviewed-by: Philipp Zabel
Signed-off-by: Maxime Ripard
Signed-off-by: Philipp Zabel -
The reset-simple code can be useful for drivers outside of drivers/reset
that have a few reset controls as part of their features. Let's move it to
include/linux/reset.Reviewed-by: Philipp Zabel
Signed-off-by: Maxime Ripard
Signed-off-by: Philipp Zabel
08 Jun, 2020
1 commit
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Pull char/misc driver updates from Greg KH:
"Here is the large set of char/misc driver patches for 5.8-rc1Included in here are:
- habanalabs driver updates, loads
- mhi bus driver updates
- extcon driver updates
- clk driver updates (approved by the clock maintainer)
- firmware driver updates
- fpga driver updates
- gnss driver updates
- coresight driver updates
- interconnect driver updates
- parport driver updates (it's still alive!)
- nvmem driver updates
- soundwire driver updates
- visorbus driver updates
- w1 driver updates
- various misc driver updates
In short, loads of different driver subsystem updates along with the
drivers as well.All have been in linux-next for a while with no reported issues"
* tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits)
habanalabs: correctly cast u64 to void*
habanalabs: initialize variable to default value
extcon: arizona: Fix runtime PM imbalance on error
extcon: max14577: Add proper dt-compatible strings
extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()'
extcon: remove redundant assignment to variable idx
w1: omap-hdq: print dev_err if irq flags are not cleared
w1: omap-hdq: fix interrupt handling which did show spurious timeouts
w1: omap-hdq: fix return value to be -1 if there is a timeout
w1: omap-hdq: cleanup to add missing newline for some dev_dbg
/dev/mem: Revoke mappings when a driver claims the region
misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages()
misc: xilinx-sdfec: cleanup return value in xsdfec_table_write()
misc: xilinx-sdfec: improve get_user_pages_fast() error handling
nvmem: qfprom: remove incorrect write support
habanalabs: handle MMU cache invalidation timeout
habanalabs: don't allow hard reset with open processes
habanalabs: GAUDI does not support soft-reset
habanalabs: add print for soft reset due to event
habanalabs: improve MMU cache invalidation code
...
06 May, 2020
2 commits
-
This is required to bring Mali450 gpu out of reset.
Cc: Peter Griffin
Cc: Enrico Weigelt
Signed-off-by: Peter Griffin
[jstultz: Added comment, Fix void return build issue
Reported-by: kbuild test robot ]
Signed-off-by: John Stultz
Signed-off-by: Philipp Zabel -
i.MX8MP is a new SoC of i.MX8M family, it has same src IP
inside but with different module layout, add support for it.Signed-off-by: Anson Huang
Signed-off-by: Philipp Zabel
28 Apr, 2020
2 commits
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Use direct function call instead of using eemi ops for
reset_get_status.Signed-off-by: Rajan Vaja
Signed-off-by: Jolly Shah
Link: https://lore.kernel.org/r/1587761887-4279-14-git-send-email-jolly.shah@xilinx.com
Signed-off-by: Greg Kroah-Hartman -
Use direct function call instead of using eemi ops for
reset_assert.Signed-off-by: Rajan Vaja
Signed-off-by: Jolly Shah
Link: https://lore.kernel.org/r/1587761887-4279-13-git-send-email-jolly.shah@xilinx.com
Signed-off-by: Greg Kroah-Hartman
10 Feb, 2020
2 commits
-
Currently CONFIG_RESET_INTEL_GW=y implicitly depends on
CONFIG_HAS_IOMEM=y; consequently, on architectures without IOMEM we get
the following build error:/usr/bin/ld: drivers/reset/reset-intel-gw.o: in function `intel_reset_probe':
drivers/reset/reset-intel-gw.c:185: undefined reference to `devm_platform_ioremap_resource'Fix the build error by adding the unspecified dependency.
Signed-off-by: Brendan Higgins
Signed-off-by: Philipp Zabel -
Currently CONFIG_RESET_BRCMSTB_RESCAL=y implicitly depends on
CONFIG_HAS_IOMEM=y; consequently, on architectures without IOMEM we get
the following build error:/usr/bin/ld: drivers/reset/reset-brcmstb-rescal.o: in function `brcm_rescal_reset_probe':
drivers/reset/reset-brcmstb-rescal.c:76: undefined reference to `devm_ioremap_resource'Fix the build error by adding the unspecified dependency.
Signed-off-by: Brendan Higgins
Signed-off-by: Philipp Zabel
11 Jan, 2020
1 commit
-
Reset controller updates for v5.6
This tag adds support for the Nuvoton NPCM, Intel Gatway SoC, and
Broadcom BCM7216 RESCAL reset controllers, adds missing SCSSI reset
controls for newer Uniphier SoCs, aligns the program flow in the
devm_reset_controller_register, __devm_reset_control_get, and
devm_reset_control_array_get functions for better consistency,
and allows to build the Qcom AOSS reset driver as a module.This is based on v5.5-rc3 because the core patch depends on commit
db23808615e2 ("reset: Do not register resource data for missing
resets").* tag 'reset-for-5.6' of git://git.pengutronix.de/pza/linux:
reset: qcom-aoss: Allow CONFIG_RESET_QCOM_AOSS to be a tristate
reset: Add Broadcom STB RESCAL reset controller
dt-bindings: reset: Document BCM7216 RESCAL reset controller
reset: intel: Add system reset controller driver
dt-bindings: reset: Add YAML schemas for the Intel Reset controller
reset: uniphier: Add SCSSI reset control for each channel
reset: Align logic and flow in managed helpers
reset: npcm: add NPCM reset controller driver
dt-bindings: reset: Add binding constants for NPCM7xx reset controller
dt-bindings: reset: add NPCM reset controller documentationLink: https://lore.kernel.org/r/dbbb2ca7490a0146d9ba632fd4d9f38063e03e9f.camel@pengutronix.de
Signed-off-by: Olof Johansson
09 Jan, 2020
1 commit
-
…ux-pm into arm/drivers
Initial support for hierarchical CPU arrangement, managed by PSCI and its
corresponding cpuidle driver. This support is based upon using the generic
PM domain, which already supports devices belonging to CPUs.Finally, these is a DTS patch that enables the hierarchical topology to be
used for the Qcom 410c Dragonboard, which supports the PSCI OS-initiated
mode.* tag 'cpuidle_psci-v5.5-rc4' of git://git.linaro.org/people/ulf.hansson/linux-pm: (611 commits)
arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916
cpuidle: psci: Add support for PM domains by using genpd
PM / Domains: Introduce a genpd OF helper that removes a subdomain
cpuidle: psci: Support CPU hotplug for the hierarchical model
cpuidle: psci: Manage runtime PM in the idle path
cpuidle: psci: Prepare to use OS initiated suspend mode via PM domains
cpuidle: psci: Attach CPU devices to their PM domains
cpuidle: psci: Add a helper to attach a CPU to its PM domain
cpuidle: psci: Support hierarchical CPU idle states
cpuidle: psci: Simplify OF parsing of CPU idle state nodes
cpuidle: dt: Support hierarchical CPU idle states
of: base: Add of_get_cpu_state_node() to get idle states for a CPU node
firmware: psci: Export functions to manage the OSI mode
dt: psci: Update DT bindings to support hierarchical PSCI states
cpuidle: psci: Align psci_power_state count with idle state count
Linux 5.5-rc4
locks: print unsigned ino in /proc/locks
riscv: export flush_icache_all to modules
riscv: reject invalid syscalls below -1
riscv: fix compile failure with EXPORT_SYMBOL() & !MMU
...Link: https://lore.kernel.org/r/20200102160820.3572-1-ulf.hansson@linaro.org
Signed-off-by: Olof Johansson <olof@lixom.net>
08 Jan, 2020
1 commit
-
Allow CONFIG_RESET_QCOM_AOSS to be set as as =m to allow for the
driver to be loaded from a modules.Also replaces the builtin_platform_driver() line with
module_platform_driver() and adds a MODULE_DEVICE_TABLE() entry.Cc: Todd Kjos
Cc: Alistair Delva
Cc: Amit Pundir
Signed-off-by: John Stultz
Reviewed-by: Bjorn Andersson
Signed-off-by: Philipp Zabel
06 Jan, 2020
1 commit
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On BCM7216 there is a special purpose reset controller named RESCAL
(reset calibration) which is necessary for SATA and PCIe0/1 to operate
correctly. This commit adds support for such a reset controller to be
available.Signed-off-by: Jim Quinlan
Signed-off-by: Florian Fainelli
Signed-off-by: Philipp Zabel
03 Jan, 2020
1 commit
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Add driver for the reset controller present on Intel
Gateway SoCs for performing reset management of the
devices present on the SoC. Driver also registers a
reset handler to peform the entire device reset.Signed-off-by: Dilip Kota
Signed-off-by: Philipp Zabel
