27 Dec, 2011
40 commits
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Export these two symbols, they will be used by KVM mmu audit
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
This patch cleans and simplifies kvm_dev_ioctl_get_supported_cpuid by using a table
instead of duplicating code as Avi suggested.This patch also fixes a bug where kvm_dev_ioctl_get_supported_cpuid would return
-E2BIG when amount of entries passed was just right.Signed-off-by: Sasha Levin
Signed-off-by: Avi Kivity -
Intel latest cpu add 6 new features, refer http://software.intel.com/file/36945
The new feature cpuid listed as below:1. FMA CPUID.EAX=01H:ECX.FMA[bit 12]
2. MOVBE CPUID.EAX=01H:ECX.MOVBE[bit 22]
3. BMI1 CPUID.EAX=07H,ECX=0H:EBX.BMI1[bit 3]
4. AVX2 CPUID.EAX=07H,ECX=0H:EBX.AVX2[bit 5]
5. BMI2 CPUID.EAX=07H,ECX=0H:EBX.BMI2[bit 8]
6. LZCNT CPUID.EAX=80000001H:ECX.LZCNT[bit 5]This patch expose these features to guest.
Among them, FMA/MOVBE/LZCNT has already been defined, MOVBE/LZCNT has
already been exposed.This patch defines BMI1/AVX2/BMI2, and exposes FMA/BMI1/AVX2/BMI2 to guest.
Signed-off-by: Liu, Jinsong
Signed-off-by: Avi Kivity -
The cpuid code has grown; put it into a separate file.
Signed-off-by: Avi Kivity
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INSB : 6C
INSW/INSD : 6D
OUTSB : 6E
OUTSW/OUTSD: 6FThe I/O port address is read from the DX register when we decode the
operand because we see the SrcDX/DstDX flag is set.Signed-off-by: Takuya Yoshikawa
Signed-off-by: Avi Kivity -
This fixes byte accesses to IOAPIC_REG_SELECT as mandated by at least the
ICH10 and Intel Series 5 chipset specs. It also makes ioapic_mmio_write
consistent with ioapic_mmio_read, which also allows byte and word accesses.Signed-off-by: Julian Stecklina
Signed-off-by: Avi Kivity -
There is the same struct definition in ia64 and kvm common code:
arch/ia64/kvm//kvm-ia64.c: At top level:
arch/ia64/kvm//kvm-ia64.c:777:8: error: redefinition of ‘struct kvm_io_range’
include/linux/kvm_host.h:62:8: note: originally defined hereSo, rename kvm_io_range to kvm_ia64_io_range in ia64 code
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
The operation of getting dirty log is frequent when framebuffer-based
displays are used(for example, Xwindow), so, we introduce a mapping table
to speed up id_to_memslot()Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Sort memslots base on its size and use line search to find it, so that the
larger memslots have better fitThe idea is from Avi
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Introduce id_to_memslot to get memslot by slot id
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Introduce kvm_for_each_memslot to walk all valid memslot
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Introduce update_memslots to update slot which will be update to
kvm->memslotsSigned-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Introduce KVM_MEM_SLOTS_NUM macro to instead of
KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTSSigned-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
BSF: 0F BC
BSR: 0F BDSigned-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
CMPXCHG: 0F B0, 0F B1
Signed-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
WRMSR: 0F 30
RDMSR: 0F 32Signed-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
MOV: 0F 22 (move to control registers)
MOV: 0F 23 (move to debug registers)Signed-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
CALL: E8
Signed-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
BT : 0F A3
BTS: 0F AB
BTR: 0F B3
BTC: 0F BBGroup 8: 0F BA
Signed-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
IN : E4, E5, EC, ED
OUT: E6, E7, EE, EFSigned-off-by: Takuya Yoshikawa
Signed-off-by: Marcelo Tosatti -
vmx_load_host_state() does not handle msrs switching (except
MSR_KERNEL_GS_BASE) since commit 26bb0981b3f. Remove call to it
where it is no longer make sense.Signed-off-by: Gleb Natapov
Signed-off-by: Avi Kivity -
Currently, write protecting a slot needs to walk all the shadow pages
and checks ones which have a pte mapping a page in it.The walk is overly heavy when dirty pages in that slot are not so many
and checking the shadow pages would result in unwanted cache pollution.To mitigate this problem, we use rmap_write_protect() and check only
the sptes which can be reached from gfns marked in the dirty bitmap
when the number of dirty pages are less than that of shadow pages.This criterion is reasonable in its meaning and worked well in our test:
write protection became some times faster than before when the ratio of
dirty pages are low and was not worse even when the ratio was near the
criterion.Note that the locking for this write protection becomes fine grained.
The reason why this is safe is descripted in the comments.Signed-off-by: Takuya Yoshikawa
Signed-off-by: Avi Kivity -
Needed for the next patch which uses this number to decide how to write
protect a slot.Signed-off-by: Takuya Yoshikawa
Signed-off-by: Avi Kivity -
rmap_write_protect() calls gfn_to_rmap() for each level with gfn fixed.
This results in calling gfn_to_memslot() repeatedly with that gfn.This patch introduces __gfn_to_rmap() which takes the slot as an
argument to avoid this.This is also needed for the following dirty logging optimization.
Signed-off-by: Takuya Yoshikawa
Signed-off-by: Avi Kivity -
Remove redundant checks and use is_large_pte() macro.
Signed-off-by: Takuya Yoshikawa
Signed-off-by: Avi Kivity -
Use kmemdup rather than duplicating its implementation
The semantic patch that makes this change is available
in scripts/coccinelle/api/memdup.cocci.More information about semantic patching is available at
http://coccinelle.lip6.fr/Signed-off-by: Thomas Meyer
Signed-off-by: Marcelo Tosatti -
The host side pv mmu support has been marked for feature removal in
January 2011. It's not in use, is slower than shadow or hardware
assisted paging, and a maintenance burden. It's November 2011, time to
remove it.Signed-off-by: Chris Wright
Signed-off-by: Avi Kivity -
This has not been used for some years now. It's time to remove it.
Signed-off-by: Chris Wright
Signed-off-by: Avi Kivity -
My testing version of Smatch complains that addr and len come from
the user and they can wrap. The path is:
-> kvm_vm_ioctl()
-> kvm_vm_ioctl_unregister_coalesced_mmio()
-> coalesced_mmio_in_range()I don't know what the implications are of wrapping here, but we may
as well fix it, if only to silence the warning.Signed-off-by: Dan Carpenter
Signed-off-by: Marcelo Tosatti -
The vcpu reference of a kvm_timer can't become NULL while the timer is
valid, so drop this redundant test. This also makes it pointless to
carry a separate __kvm_timer_fn, fold it into kvm_timer_fn.Signed-off-by: Jan Kiszka
Signed-off-by: Marcelo Tosatti -
The kvm_host struct can include an mmu_notifier struct but mmu_notifier.h is
not included directly.Signed-off-by: Eric B Munson
Signed-off-by: Avi Kivity -
Detecting write-flooding does not work well, when we handle page written, if
the last speculative spte is not accessed, we treat the page is
write-flooding, however, we can speculative spte on many path, such as pte
prefetch, page synced, that means the last speculative spte may be not point
to the written page and the written page can be accessed via other sptes, so
depends on the Accessed bit of the last speculative spte is not enoughInstead of detected page accessed, we can detect whether the spte is accessed
after it is written, if the spte is not accessed but it is written frequently,
we treat is not a page table or it not used for a long timeSigned-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Sometimes, we only modify the last one byte of a pte to update status bit,
for example, clear_bit is used to clear r/w bit in linux kernel and 'andb'
instruction is used in this function, in this case, kvm_mmu_pte_write will
treat it as misaligned access, and the shadow page table is zappedSigned-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
kvm_mmu_pte_write is too long, we split it for better readable
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
In kvm_mmu_pte_write, we do not need to alloc shadow page, so calling
kvm_mmu_free_some_pages is really unnecessarySigned-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Fast prefetch spte for the unsync shadow page on invlpg path
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Directly Use mmu_page_zap_pte to zap spte in FNAME(invlpg), also remove the
same code between FNAME(invlpg) and FNAME(sync_page)Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
In current code, the accessed bit is always set when page fault occurred,
do not need to set it on pte write pathSigned-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
Remove the same code between emulator_pio_in_emulated and
emulator_pio_out_emulatedSigned-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity -
If the emulation is caused by #PF and it is non-page_table writing instruction,
it means the VM-EXIT is caused by shadow page protected, we can zap the shadow
page and retry this instruction directlyThe idea is from Avi
Signed-off-by: Xiao Guangrong
Signed-off-by: Avi Kivity