08 Jun, 2020

1 commit

  • Pull char/misc driver updates from Greg KH:
    "Here is the large set of char/misc driver patches for 5.8-rc1

    Included in here are:

    - habanalabs driver updates, loads

    - mhi bus driver updates

    - extcon driver updates

    - clk driver updates (approved by the clock maintainer)

    - firmware driver updates

    - fpga driver updates

    - gnss driver updates

    - coresight driver updates

    - interconnect driver updates

    - parport driver updates (it's still alive!)

    - nvmem driver updates

    - soundwire driver updates

    - visorbus driver updates

    - w1 driver updates

    - various misc driver updates

    In short, loads of different driver subsystem updates along with the
    drivers as well.

    All have been in linux-next for a while with no reported issues"

    * tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits)
    habanalabs: correctly cast u64 to void*
    habanalabs: initialize variable to default value
    extcon: arizona: Fix runtime PM imbalance on error
    extcon: max14577: Add proper dt-compatible strings
    extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()'
    extcon: remove redundant assignment to variable idx
    w1: omap-hdq: print dev_err if irq flags are not cleared
    w1: omap-hdq: fix interrupt handling which did show spurious timeouts
    w1: omap-hdq: fix return value to be -1 if there is a timeout
    w1: omap-hdq: cleanup to add missing newline for some dev_dbg
    /dev/mem: Revoke mappings when a driver claims the region
    misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages()
    misc: xilinx-sdfec: cleanup return value in xsdfec_table_write()
    misc: xilinx-sdfec: improve get_user_pages_fast() error handling
    nvmem: qfprom: remove incorrect write support
    habanalabs: handle MMU cache invalidation timeout
    habanalabs: don't allow hard reset with open processes
    habanalabs: GAUDI does not support soft-reset
    habanalabs: add print for soft reset due to event
    habanalabs: improve MMU cache invalidation code
    ...

    Linus Torvalds
     

02 Jun, 2020

1 commit

  • Pull documentation updates from Jonathan Corbet:
    "A fair amount of stuff this time around, dominated by yet another
    massive set from Mauro toward the completion of the RST conversion. I
    *really* hope we are getting close to the end of this. Meanwhile,
    those patches reach pretty far afield to update document references
    around the tree; there should be no actual code changes there. There
    will be, alas, more of the usual trivial merge conflicts.

    Beyond that we have more translations, improvements to the sphinx
    scripting, a number of additions to the sysctl documentation, and lots
    of fixes"

    * tag 'docs-5.8' of git://git.lwn.net/linux: (130 commits)
    Documentation: fixes to the maintainer-entry-profile template
    zswap: docs/vm: Fix typo accept_threshold_percent in zswap.rst
    tracing: Fix events.rst section numbering
    docs: acpi: fix old http link and improve document format
    docs: filesystems: add info about efivars content
    Documentation: LSM: Correct the basic LSM description
    mailmap: change email for Ricardo Ribalda
    docs: sysctl/kernel: document unaligned controls
    Documentation: admin-guide: update bug-hunting.rst
    docs: sysctl/kernel: document ngroups_max
    nvdimm: fixes to maintainter-entry-profile
    Documentation/features: Correct RISC-V kprobes support entry
    Documentation/features: Refresh the arch support status files
    Revert "docs: sysctl/kernel: document ngroups_max"
    docs: move locking-specific documents to locking/
    docs: move digsig docs to the security book
    docs: move the kref doc into the core-api book
    docs: add IRQ documentation at the core-api book
    docs: debugging-via-ohci1394.txt: add it to the core-api book
    docs: fix references for ipmi.rst file
    ...

    Linus Torvalds
     

19 May, 2020

21 commits

  • Adds a notify callback for CPU PM events to the CTI driver - for
    CPU bound CTI devices.

    Signed-off-by: Mike Leach
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-24-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • Adds registration of CPU start and stop functions to CPU hotplug
    mechanisms - for any CPU bound CTI.

    Sets CTI powered flag according to state.
    Will enable CTI on CPU start if there are existing enable requests.

    Signed-off-by: Mike Leach
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-23-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • etm probe could be deferred due to the dependency in the trace
    path chain and may be retried. We need to clear the per-cpu
    etmdrvdata entry for the etm in case of a failure to avoid
    use-after-free cases as reported below:

    KASAN use-after-free bug in etm4_cpu_pm_notify():

    [ 8.574566] coresight etm0: CPU0: ETM v4.2 initialized
    [ 8.581920] BUG: KASAN: use-after-free in etm4_cpu_pm_notify+0x580/0x2024
    [ 8.581925] Read of size 8 at addr ffffff813304f8c8 by task swapper/3/0
    [ 8.581927]
    [ 8.581934] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G S W 5.4.28 #314
    [ 8.587775] coresight etm1: CPU1: ETM v4.2 initialized
    [ 8.594195] Call trace:
    [ 8.594205] dump_backtrace+0x0/0x188
    [ 8.594209] show_stack+0x20/0x2c
    [ 8.594216] dump_stack+0xdc/0x144
    [ 8.594227] print_address_description+0x3c/0x494
    [ 8.594232] __kasan_report+0x144/0x168
    [ 8.601598] coresight etm2: CPU2: ETM v4.2 initialized
    [ 8.602563] kasan_report+0x10/0x18
    [ 8.602568] check_memory_region+0x1a4/0x1b4
    [ 8.602572] __kasan_check_read+0x18/0x24
    [ 8.602577] etm4_cpu_pm_notify+0x580/0x2024
    [ 8.665945] notifier_call_chain+0x5c/0x90
    [ 8.670166] __atomic_notifier_call_chain+0x90/0xf8
    [ 8.675182] cpu_pm_notify+0x40/0x6c
    [ 8.678858] cpu_pm_enter+0x38/0x80
    [ 8.682451] psci_enter_idle_state+0x34/0x70
    [ 8.686844] cpuidle_enter_state+0xb8/0x20c
    [ 8.691143] cpuidle_enter+0x38/0x4c
    [ 8.694820] call_cpuidle+0x3c/0x68
    [ 8.698408] do_idle+0x1a0/0x280
    [ 8.701729] cpu_startup_entry+0x24/0x28
    [ 8.705768] secondary_start_kernel+0x15c/0x170
    [ 8.710423]
    [ 8.711972] Allocated by task 242:
    [ 8.715473] __kasan_kmalloc+0xf0/0x1ac
    [ 8.719426] kasan_slab_alloc+0x14/0x1c
    [ 8.723375] __kmalloc_track_caller+0x23c/0x388
    [ 8.728040] devm_kmalloc+0x38/0x94
    [ 8.731632] etm4_probe+0x48/0x3c8
    [ 8.735140] amba_probe+0xbc/0x158
    [ 8.738645] really_probe+0x144/0x408
    [ 8.742412] driver_probe_device+0x70/0x140
    [ 8.746716] __device_attach_driver+0x9c/0x110
    [ 8.751287] bus_for_each_drv+0x90/0xd8
    [ 8.755236] __device_attach+0xb4/0x164
    [ 8.759188] device_initial_probe+0x20/0x2c
    [ 8.763490] bus_probe_device+0x34/0x94
    [ 8.767436] device_add+0x34c/0x3e0
    [ 8.771029] amba_device_try_add+0x68/0x440
    [ 8.775332] amba_deferred_retry_func+0x48/0xc8
    [ 8.779997] process_one_work+0x344/0x648
    [ 8.784127] worker_thread+0x2ac/0x47c
    [ 8.787987] kthread+0x128/0x138
    [ 8.791313] ret_from_fork+0x10/0x18
    [ 8.794993]
    [ 8.796532] Freed by task 242:
    [ 8.799684] __kasan_slab_free+0x15c/0x22c
    [ 8.803897] kasan_slab_free+0x10/0x1c
    [ 8.807761] kfree+0x25c/0x4bc
    [ 8.810913] release_nodes+0x240/0x2b0
    [ 8.814767] devres_release_all+0x3c/0x54
    [ 8.818887] really_probe+0x178/0x408
    [ 8.822661] driver_probe_device+0x70/0x140
    [ 8.826963] __device_attach_driver+0x9c/0x110
    [ 8.831539] bus_for_each_drv+0x90/0xd8
    [ 8.835487] __device_attach+0xb4/0x164
    [ 8.839431] device_initial_probe+0x20/0x2c
    [ 8.843732] bus_probe_device+0x34/0x94
    [ 8.847678] device_add+0x34c/0x3e0
    [ 8.851274] amba_device_try_add+0x68/0x440
    [ 8.855576] amba_deferred_retry_func+0x48/0xc8
    [ 8.860240] process_one_work+0x344/0x648
    [ 8.864366] worker_thread+0x2ac/0x47c
    [ 8.868228] kthread+0x128/0x138
    [ 8.871557] ret_from_fork+0x10/0x18
    [ 8.875231]
    [ 8.876782] The buggy address belongs to the object at ffffff813304f800
    [ 8.876782] which belongs to the cache kmalloc-1k of size 1024
    [ 8.889632] The buggy address is located 200 bytes inside of
    [ 8.889632] 1024-byte region [ffffff813304f800, ffffff813304fc00)
    [ 8.901761] The buggy address belongs to the page:
    [ 8.906695] page:ffffffff04ac1200 refcount:1 mapcount:0 mapping:ffffff8146c03800 index:0x0 compound_mapcount: 0
    [ 8.917047] flags: 0x4000000000010200(slab|head)
    [ 8.921799] raw: 4000000000010200 dead000000000100 dead000000000122 ffffff8146c03800
    [ 8.929753] raw: 0000000000000000 0000000000100010 00000001ffffffff 0000000000000000
    [ 8.937703] page dumped because: kasan: bad access detected
    [ 8.943433]
    [ 8.944974] Memory state around the buggy address:
    [ 8.949903] ffffff813304f780: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
    [ 8.957320] ffffff813304f800: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
    [ 8.964742] >ffffff813304f880: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
    [ 8.972157] ^
    [ 8.977886] ffffff813304f900: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
    [ 8.985298] ffffff813304f980: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
    [ 8.992713] ==================================================================

    Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states")
    Reported-by: Sai Prakash Ranjan
    Tested-by: Sai Prakash Ranjan
    Cc: Mathieu Poirier
    Cc: Mike Leach
    Signed-off-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-22-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Suzuki K Poulose
     
  • We don't need to cast void pointers, such as the amba_id data. Assign to
    a local variable to make the code prettier and also return NULL instead
    of 0 to make sparse happy.

    Cc: Suzuki K Poulose
    Cc: Mike Leach
    Reviewed-by: Joe Perches
    Signed-off-by: Stephen Boyd
    Reviewed-by: Mike Leach
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-21-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Stephen Boyd
     
  • We should include headers that C files use in the C files that use them
    and avoid relying on implicit includes as much as possible. This helps
    avoid compiler errors in the future about missing declarations when
    header files change includes in the future.

    Cc: Douglas Anderson
    Cc: Suzuki K Poulose
    Cc: Mike Leach
    Signed-off-by: Stephen Boyd
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-20-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Stephen Boyd
     
  • Sparse gets annoyed when this initializer is 0 but the first struct
    member is a pointer. Just use { } to initialize instead so that sparse
    is quiet.

    Cc: Suzuki K Poulose
    Cc: Mike Leach
    Signed-off-by: Stephen Boyd
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-19-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Stephen Boyd
     
  • These variables are assigned again before they're used. Leave them
    unassigned at first so that the compiler can detect problems in the
    future with use before initialization.

    Cc: Suzuki K Poulose
    Cc: Mike Leach
    Signed-off-by: Stephen Boyd
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-18-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Stephen Boyd
     
  • These functions aren't used outside the file they're in. Mark them
    static to indicate as such and silence tools like sparse.

    Cc: Suzuki K Poulose
    Cc: Mike Leach
    Signed-off-by: Stephen Boyd
    [Dropped changes in coresight-cti.c and coresight-etb10.c]
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-17-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Stephen Boyd
     
  • Add PID for Arm Neoverse N1 ETM to the list of supported/known ETMs.

    Signed-off-by: Anurag Koul
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-16-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Anurag Koul
     
  • Differing default states set on driver init / perf init and as a result
    of a sysfs reset.

    The ETMv4 can be programmed to trace the entire instruction address range
    without the need to use address comparator filter resources.
    (Described in the ETMv4.x technical reference manual)

    sysfs reset was using this method, perf and default driver init were setup
    with an address range comparator for the entire address range.

    The perf / driver init has been altered to use the method without needing
    any comparator address hardware.

    Minor adjustment to the vinst_ctrl register initialisation to ensure
    correct zero initialisation.

    Signed-off-by: Mike Leach
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-15-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • On some QCOM platforms like SC7180, SDM845 and SM8150,
    reading TMC mode register without proper coresight power
    management can lead to async exceptions like the one in
    the call trace below in tmc_read_prepare_etb(). This can
    happen if the user tries to read the TMC etf data via
    device node without setting up source and the sink first.
    Fix this by having a check for coresight sysfs mode
    before reading TMC mode management register.

    Kernel panic - not syncing: Asynchronous SError Interrupt
    CPU: 7 PID: 2605 Comm: hexdump Tainted: G S 5.4.30 #122
    Call trace:
    dump_backtrace+0x0/0x188
    show_stack+0x20/0x2c
    dump_stack+0xdc/0x144
    panic+0x168/0x36c
    panic+0x0/0x36c
    arm64_serror_panic+0x78/0x84
    do_serror+0x130/0x138
    el1_error+0x84/0xf8
    tmc_read_prepare_etb+0x88/0xb8
    tmc_open+0x40/0xd8
    misc_open+0x120/0x158
    chrdev_open+0xb8/0x1a4
    do_dentry_open+0x268/0x3a0
    vfs_open+0x34/0x40
    path_openat+0x39c/0xdf4
    do_filp_open+0x90/0x10c
    do_sys_open+0x150/0x3e8
    __arm64_compat_sys_openat+0x28/0x34
    el0_svc_common+0xa8/0x160
    el0_svc_compat_handler+0x2c/0x38
    el0_svc_compat+0x8/0x10

    Fixes: 4525412a5046 ("coresight: tmc: making prepare/unprepare functions generic")
    Reported-by: Stephen Boyd
    Suggested-by: Mathieu Poirier
    Signed-off-by: Sai Prakash Ranjan
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-14-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Sai Prakash Ranjan
     
  • On some systems the firmware may not describe all the ports
    connected to a component (e.g, for security reasons). This
    could be especially problematic for "funnels" where we could
    end up in modifying memory beyond the allocated space for
    refcounts.

    e.g, for a funnel with input ports listed 0, 3, 5, nr_inport = 3.
    However the we could access refcnts[5] while checking for
    references, like :

    [ 526.110401] ==================================================================
    [ 526.117988] BUG: KASAN: slab-out-of-bounds in funnel_enable+0x54/0x1b0
    [ 526.124706] Read of size 4 at addr ffffff8135f9549c by task bash/1114
    [ 526.131324]
    [ 526.132886] CPU: 3 PID: 1114 Comm: bash Tainted: G S 5.4.25 #232
    [ 526.140397] Hardware name: Qualcomm Technologies, Inc. SC7180 IDP (DT)
    [ 526.147113] Call trace:
    [ 526.149653] dump_backtrace+0x0/0x188
    [ 526.153431] show_stack+0x20/0x2c
    [ 526.156852] dump_stack+0xdc/0x144
    [ 526.160370] print_address_description+0x3c/0x494
    [ 526.165211] __kasan_report+0x144/0x168
    [ 526.169170] kasan_report+0x10/0x18
    [ 526.172769] check_memory_region+0x1a4/0x1b4
    [ 526.177164] __kasan_check_read+0x18/0x24
    [ 526.181292] funnel_enable+0x54/0x1b0
    [ 526.185072] coresight_enable_path+0x104/0x198
    [ 526.189649] coresight_enable+0x118/0x26c

    ...

    [ 526.237782] Allocated by task 280:
    [ 526.241298] __kasan_kmalloc+0xf0/0x1ac
    [ 526.245249] kasan_kmalloc+0xc/0x14
    [ 526.248849] __kmalloc+0x28c/0x3b4
    [ 526.252361] coresight_register+0x88/0x250
    [ 526.256587] funnel_probe+0x15c/0x228
    [ 526.260365] dynamic_funnel_probe+0x20/0x2c
    [ 526.264679] amba_probe+0xbc/0x158
    [ 526.268193] really_probe+0x144/0x408
    [ 526.271970] driver_probe_device+0x70/0x140

    ...

    [ 526.316810]
    [ 526.318364] Freed by task 0:
    [ 526.321344] (stack is not available)
    [ 526.325024]
    [ 526.326580] The buggy address belongs to the object at ffffff8135f95480
    [ 526.326580] which belongs to the cache kmalloc-128 of size 128
    [ 526.339439] The buggy address is located 28 bytes inside of
    [ 526.339439] 128-byte region [ffffff8135f95480, ffffff8135f95500)
    [ 526.351399] The buggy address belongs to the page:
    [ 526.356342] page:ffffffff04b7e500 refcount:1 mapcount:0 mapping:ffffff814b00c380 index:0x0 compound_mapcount: 0
    [ 526.366711] flags: 0x4000000000010200(slab|head)
    [ 526.371475] raw: 4000000000010200 ffffffff05034008 ffffffff0501eb08 ffffff814b00c380
    [ 526.379435] raw: 0000000000000000 0000000000190019 00000001ffffffff 0000000000000000
    [ 526.387393] page dumped because: kasan: bad access detected
    [ 526.393128]
    [ 526.394681] Memory state around the buggy address:
    [ 526.399619] ffffff8135f95380: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
    [ 526.407046] ffffff8135f95400: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
    [ 526.414473] >ffffff8135f95480: 04 fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
    [ 526.421900] ^
    [ 526.426029] ffffff8135f95500: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
    [ 526.433456] ffffff8135f95580: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
    [ 526.440883] ==================================================================

    To keep the code simple, we now track the maximum number of
    possible input/output connections to/from this component
    @ nr_inport and nr_outport in platform_data, respectively.
    Thus the output connections could be sparse and code is
    adjusted to skip the unspecified connections.

    Cc: Mathieu Poirier
    Cc: Mike Leach
    Reported-by: Sai Prakash Ranjan
    Tested-by: Sai Prakash Ranjan
    Tested-by: Stephen Boyd
    Signed-off-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-13-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Suzuki K Poulose
     
  • Fix the following sparse warning:

    drivers/hwtracing/coresight/coresight-etb10.c:720:30: warning: symbol
    'coresight_etb_groups' was not declared. Should it be static?

    Reported-by: Hulk Robot
    Signed-off-by: Jason Yan
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-12-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Jason Yan
     
  • Fix the following sparse warning:

    drivers/hwtracing/coresight/coresight-cti.c:22:1: warning: symbol
    'ect_net' was not declared. Should it be static?
    drivers/hwtracing/coresight/coresight-cti.c:625:32: warning: symbol
    'cti_ops_ect' was not declared. Should it be static?
    drivers/hwtracing/coresight/coresight-cti.c:630:28: warning: symbol
    'cti_ops' was not declared. Should it be static?

    Reported-by: Hulk Robot
    Signed-off-by: Jason Yan
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-11-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Jason Yan
     
  • Replace the AMBA ETM PIDs with UCI IDs to avoid future
    conflicts when adding the CTI support for QCOM Kryo385
    CPU cores.

    Fixes: 17b4add0d4e0 ("coresight: etm4x: Add ETM PIDs for SDM845 and MSM8996")
    Signed-off-by: Sai Prakash Ranjan
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-10-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Sai Prakash Ranjan
     
  • Add ETM UCI IDs for Qualcomm SC7180 SoC. It has 2
    big CPU cores based on Cortex-A76 and 6 LITTLE CPU
    cores based on Cortex-A55.

    Signed-off-by: Sai Prakash Ranjan
    Reviewed-by: Stephen Boyd
    Tested-by: Stephen Boyd
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-9-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Sai Prakash Ranjan
     
  • Adds in sysfs links for connections where the connected device is another
    coresight device. This allows examination of the coresight topology.

    Non-coresight connections remain just as a reference name.

    Signed-off-by: Mike Leach
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-6-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • Coresight device connections are a bit complicated and is not
    exposed currently to the user. One has to look at the platform
    descriptions (DT bindings or ACPI bindings) to make an understanding.
    Given the new naming scheme, it will be helpful to have this information
    to choose the appropriate devices for tracing. This patch exposes
    the device connections via links in the sysfs directories.

    e.g, for a connection devA[OutputPort_X] -> devB[InputPort_Y]
    is represented as two symlinks:

    /sys/bus/coresight/.../devA/out:X -> /sys/bus/coresight/.../devB
    /sys/bus/coresight/.../devB/in:Y -> /sys/bus/coresight/.../devA

    Signed-off-by: Suzuki K Poulose
    [Revised to use the generic sysfs links functions & link structures.
    Provides a connections sysfs group in each device to hold the links.]
    Co-developed-by: Mike Leach
    Signed-off-by: Mike Leach
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-5-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Suzuki K Poulose
     
  • To allow the connections between coresight components to be represented
    in sysfs, generic methods for creating sysfs links between two coresight
    devices are added.

    Signed-off-by: Mike Leach
    Reviewed-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-4-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • Handle failures in fixing up connections for a newly registered
    device. This will be useful to handle cases where we fail to expose
    the links via sysfs for the connections.

    Signed-off-by: Suzuki K Poulose
    Signed-off-by: Mike Leach
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-3-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Suzuki K Poulose
     
  • As we prepare to expose the links between the devices in
    sysfs, pass the coresight_device instance to the
    coresight_release_platform_data in order to free up the connections
    when the device is removed.

    No functional changes as such in this patch.

    Signed-off-by: Suzuki K Poulose
    Signed-off-by: Mike Leach
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200518180242.7916-2-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Suzuki K Poulose
     

15 May, 2020

1 commit


21 Apr, 2020

1 commit

  • Several references got broken due to txt to ReST conversion.

    Several of them can be automatically fixed with:

    scripts/documentation-file-ref-check --fix

    Reviewed-by: Mathieu Poirier # hwtracing/coresight/Kconfig
    Reviewed-by: Paul E. McKenney # memory-barrier.txt
    Acked-by: Alex Shi # translations/zh_CN
    Acked-by: Federico Vaga # translations/it_IT
    Acked-by: Marc Zyngier # kvm/arm64
    Signed-off-by: Mauro Carvalho Chehab
    Link: https://lore.kernel.org/r/6f919ddb83a33b5f2a63b6b5f0575737bb2b36aa.1586881715.git.mchehab+huawei@kernel.org
    Signed-off-by: Jonathan Corbet

    Mauro Carvalho Chehab
     

24 Mar, 2020

1 commit

  • Some use cases prefer to keep collecting the trace data into the last
    available window while the other windows are being offloaded instead of
    stopping the trace. In this scenario, the window switch happens
    automatically when the next window becomes available again.

    Add an option to allow this and a sysfs attribute to enable it.

    Signed-off-by: Alexander Shishkin
    Reviewed-by: Andy Shevchenko
    Link: https://lore.kernel.org/r/20200319085152.52183-1-alexander.shishkin@linux.intel.com
    Signed-off-by: Greg Kroah-Hartman

    Alexander Shishkin
     

23 Mar, 2020

1 commit


21 Mar, 2020

8 commits

  • Dynamically adds sysfs attributes for all connections defined in the CTI.

    Each connection has a triggers sub-directory with name, in_signals,
    in_types, out_signals and out_types as read-only parameters in the
    directory. in_ or out_ parameters may be omitted if there are no in or
    out signals for the connection.

    Additionally each device has a nr_cons in the connections sub-directory.

    This allows clients to explore the connection and trigger signal details
    without needing to refer to device tree or specification of the device.

    Standardised type information is provided for certain common functions -
    e.g. snk_full for a trigger from a sink indicating full. Otherwise type
    defaults to genio.

    Signed-off-by: Mike Leach
    Reviewed-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200320165303.13681-10-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • The CoreSight subsystem enables a path of devices from source to sink.
    Any CTI devices associated with the path devices must be enabled at the
    same time.

    This patch adds an associated coresight_device element to the main
    coresight device structure, and uses this to create associations between
    the CTI and other devices based on the device tree data. The associated
    device element is used to enable CTI in conjunction with the path elements.

    CTI devices are reference counted so where a single CTI is associated with
    multiple elements on the path, it will be enabled on the first associated
    device enable, and disabled with the last associated device disable.

    Signed-off-by: Mike Leach
    Reviewed-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200320165303.13681-9-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • Adds support for CTIs whose connections are implementation defined at
    hardware design time, and not constrained by v8 architecture.

    These CTIs have no standard connection setup, all the settings have to
    be defined in the device tree files. The patch creates a set of connections
    and trigger signals based on the information provided.

    Signed-off-by: Mike Leach
    Reviewed-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200320165303.13681-8-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • The v8 architecture defines the relationship between a PE, its optional ETM
    and a CTI. Unlike non-architectural CTIs which are implementation defined,
    this has a fixed set of connections which can therefore be represented as a
    simple tag in the device tree.

    This patch defines the tags needed to create an entry for this PE/ETM/CTI
    relationship, and provides functionality to implement the connection model
    in the CTI driver.

    Signed-off-by: Mike Leach
    Reviewed-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200320165303.13681-7-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • Adds a user API to allow programming of CTI by trigger ID and
    channel number. This will take the channel and trigger ID supplied
    by the user and program the appropriate register values.

    Signed-off-by: Mike Leach
    Reviewed-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200320165303.13681-5-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • Adds in sysfs programming support for the CTI function register sets.
    Allows direct manipulation of channel / trigger association registers.

    Signed-off-by: Mike Leach
    Reviewed-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200320165303.13681-4-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • Adds sysfs access to the coresight management registers.

    Signed-off-by: Mike Leach
    Reviewed-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200320165303.13681-3-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     
  • This introduces a baseline CTI driver and associated configuration files.

    Uses the platform agnostic naming standard for CoreSight devices, along
    with a generic platform probing method that currently supports device
    tree descriptions, but allows for the ACPI bindings to be added once these
    have been defined for the CTI devices.

    Driver will probe for the device on the AMBA bus, and load the CTI driver
    on CoreSight ID match to CTI IDs in tables.

    Initial sysfs support for enable / disable provided.

    Default CTI interconnection data is generated based on hardware
    register signal counts, with no additional connection information.

    Signed-off-by: Mike Leach
    Reviewed-by: Suzuki K Poulose
    Signed-off-by: Mathieu Poirier
    Link: https://lore.kernel.org/r/20200320165303.13681-2-mathieu.poirier@linaro.org
    Signed-off-by: Greg Kroah-Hartman

    Mike Leach
     

18 Mar, 2020

5 commits

  • This adds support for the Trace Hub in Elkhart Lake CPU.

    Signed-off-by: Alexander Shishkin
    Reviewed-by: Andy Shevchenko
    Cc: stable@vger.kernel.org
    Link: https://lore.kernel.org/r/20200317062215.15598-7-alexander.shishkin@linux.intel.com
    Signed-off-by: Greg Kroah-Hartman

    Alexander Shishkin
     
  • There are a few places in the driver that end up returning ENOTSUPP to
    the user, replace those with EINVAL.

    Signed-off-by: Alexander Shishkin
    Reviewed-by: Andy Shevchenko
    Fixes: ba82664c134ef ("intel_th: Add Memory Storage Unit driver")
    Cc: stable@vger.kernel.org # v4.4+
    Link: https://lore.kernel.org/r/20200317062215.15598-6-alexander.shishkin@linux.intel.com
    Signed-off-by: Greg Kroah-Hartman

    Alexander Shishkin
     
  • The unexpected state warning should only warn on illegal state
    transitions. Fix that.

    Signed-off-by: Alexander Shishkin
    Reviewed-by: Andy Shevchenko
    Fixes: 615c164da0eb4 ("intel_th: msu: Introduce buffer interface")
    Cc: stable@vger.kernel.org # v5.4+
    Link: https://lore.kernel.org/r/20200317062215.15598-5-alexander.shishkin@linux.intel.com
    Signed-off-by: Greg Kroah-Hartman

    Alexander Shishkin
     
  • The operands of time_after() are in a wrong order in both instances in
    the sys-t driver. Fix that.

    Signed-off-by: Alexander Shishkin
    Reviewed-by: Andy Shevchenko
    Fixes: 39f10239df75 ("stm class: p_sys-t: Add support for CLOCKSYNC packets")
    Fixes: d69d5e83110f ("stm class: Add MIPI SyS-T protocol support")
    Cc: stable@vger.kernel.org # v4.20+
    Link: https://lore.kernel.org/r/20200317062215.15598-3-alexander.shishkin@linux.intel.com
    Signed-off-by: Greg Kroah-Hartman

    Alexander Shishkin
     
  • Some versions of Intel TH have an issue that prevents the multi mode of
    MSU from working correctly, resulting in no trace data and potentially
    stuck MSU pipeline.

    Disable multi mode on such devices.

    Signed-off-by: Alexander Shishkin
    Reviewed-by: Andy Shevchenko
    Link: https://lore.kernel.org/r/20200317062215.15598-2-alexander.shishkin@linux.intel.com
    Signed-off-by: Greg Kroah-Hartman

    Alexander Shishkin