24 Nov, 2020

1 commit

  • Currently array of fix length PM_API_MAX is used to cache
    the pm_api version (valid or invalid). However ATF based
    PM APIs values are much higher then PM_API_MAX.
    So to include ATF based PM APIs also, use hash-table to
    store the pm_api version status.

    Signed-off-by: Amit Sunil Dhamne
    Reported-by: Arnd Bergmann 
    Signed-off-by: Ravi Patel
    Signed-off-by: Rajan Vaja
    Reviewed-by: Arnd Bergmann
    Tested-by: Michal Simek
    Fixes: f3217d6f2f7a ("firmware: xilinx: fix out-of-bounds access")
    Cc: stable
    Link: https://lore.kernel.org/r/1606197161-25976-1-git-send-email-rajan.vaja@xilinx.com
    Signed-off-by: Michal Simek

    Amit Sunil Dhamne
     

28 Apr, 2020

25 commits


04 Apr, 2020

1 commit

  • Pull ARM SoC updates from Arnd Bergmann:
    "The code changes are mostly for 32-bit platforms and include:

    - Lots of updates for the Nvidia Tegra platform, including cpuidle,
    pmc, and dt-binding changes

    - Microchip at91 power management updates for the recently added
    sam9x60 SoC

    - Treewide setup_irq deprecation by afzal mohammed

    - STMicroelectronics stm32 gains earlycon support

    - Renesas platforms with Cortex-A9 can now use the global timer

    - Some TI OMAP2+ platforms gain cpuidle support

    - Various cleanups for the i.MX6 and Orion platforms, as well as
    Kconfig files across all platforms"

    * tag 'arm-soc-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (75 commits)
    ARM: qcom: Add support for IPQ40xx
    ARM: mmp: replace setup_irq() by request_irq()
    ARM: cns3xxx: replace setup_irq() by request_irq()
    ARM: spear: replace setup_irq() by request_irq()
    ARM: ep93xx: Replace setup_irq() by request_irq()
    ARM: iop32x: replace setup_irq() by request_irq()
    arm: mach-dove: Mark dove_io_desc as __maybe_unused
    ARM: orion: replace setup_irq() by request_irq()
    ARM: debug: stm32: add UART early console support for STM32MP1
    ARM: debug: stm32: add UART early console support for STM32H7
    ARM: debug: stm32: add UART early console configuration for STM32F7
    ARM: debug: stm32: add UART early console configuration for STM32F4
    cpuidle: tegra: Disable CC6 state if LP2 unavailable
    cpuidle: tegra: Squash Tegra114 driver into the common driver
    cpuidle: tegra: Squash Tegra30 driver into the common driver
    cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle
    ARM: tegra: cpuidle: Remove unnecessary memory barrier
    ARM: tegra: cpuidle: Make abort_flag atomic
    ARM: tegra: cpuidle: Handle case where secondary CPU hangs on entering LP2
    ARM: tegra: Make outer_disable() open-coded
    ...

    Linus Torvalds
     

02 Apr, 2020

1 commit

  • Pull crypto updates from Herbert Xu:
    "API:
    - Fix out-of-sync IVs in self-test for IPsec AEAD algorithms

    Algorithms:
    - Use formally verified implementation of x86/curve25519

    Drivers:
    - Enhance hwrng support in caam

    - Use crypto_engine for skcipher/aead/rsa/hash in caam

    - Add Xilinx AES driver

    - Add uacce driver

    - Register zip engine to uacce in hisilicon

    - Add support for OCTEON TX CPT engine in marvell"

    * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (162 commits)
    crypto: af_alg - bool type cosmetics
    crypto: arm[64]/poly1305 - add artifact to .gitignore files
    crypto: caam - limit single JD RNG output to maximum of 16 bytes
    crypto: caam - enable prediction resistance in HRWNG
    bus: fsl-mc: add api to retrieve mc version
    crypto: caam - invalidate entropy register during RNG initialization
    crypto: caam - check if RNG job failed
    crypto: caam - simplify RNG implementation
    crypto: caam - drop global context pointer and init_done
    crypto: caam - use struct hwrng's .init for initialization
    crypto: caam - allocate RNG instantiation descriptor with GFP_DMA
    crypto: ccree - remove duplicated include from cc_aead.c
    crypto: chelsio - remove set but not used variable 'adap'
    crypto: marvell - enable OcteonTX cpt options for build
    crypto: marvell - add the Virtual Function driver for CPT
    crypto: marvell - add support for OCTEON TX CPT engine
    crypto: marvell - create common Kconfig and Makefile for Marvell
    crypto: arm/neon - memzero_explicit aes-cbc key
    crypto: bcm - Use scnprintf() for avoiding potential buffer overflow
    crypto: atmel-i2c - Fix wakeup fail
    ...

    Linus Torvalds
     

24 Mar, 2020

1 commit

  • SD DLL resets are required for some of the operations on ZynqMP platform.
    Add DLL reset support in ZynqMP firmware driver for SD DLL reset.

    Signed-off-by: Manish Narani
    Acked-by: Michal Simek
    Link: https://lore.kernel.org/r/1579602095-30060-3-git-send-email-manish.narani@xilinx.com
    Signed-off-by: Ulf Hansson

    Manish Narani
     

09 Mar, 2020

1 commit


28 Feb, 2020

1 commit


09 Feb, 2020

1 commit

  • Pull ARM SoC-related driver updates from Olof Johansson:
    "Various driver updates for platforms:

    - Nvidia: Fuse support for Tegra194, continued memory controller
    pieces for Tegra30

    - NXP/FSL: Refactorings of QuickEngine drivers to support
    ARM/ARM64/PPC

    - NXP/FSL: i.MX8MP SoC driver pieces

    - TI Keystone: ring accelerator driver

    - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.

    - Xilinx ZynqMP: feature checking interface for firmware. Mailbox
    communication for power management

    - Overall support patch set for cpuidle on more complex hierarchies
    (PSCI-based)

    and misc cleanups, refactorings of Marvell, TI, other platforms"

    * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits)
    drivers: soc: xilinx: Use mailbox IPI callback
    dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
    drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists
    MAINTAINERS: Add brcmstb PCIe controller entry
    soc/tegra: fuse: Unmap registers once they are not needed anymore
    soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
    soc/tegra: fuse: Warn if straps are not ready
    soc/tegra: fuse: Cache values of straps and Chip ID registers
    memory: tegra30-emc: Correct error message for timed out auto calibration
    memory: tegra30-emc: Firm up hardware programming sequence
    memory: tegra30-emc: Firm up suspend/resume sequence
    soc/tegra: regulators: Do nothing if voltage is unchanged
    memory: tegra: Correct reset value of xusb_hostr
    soc/tegra: fuse: Add APB DMA dependency for Tegra20
    bus: tegra-aconnect: Remove PM_CLK dependency
    dt-bindings: mediatek: add MT6765 power dt-bindings
    soc: mediatek: cmdq: delete not used define
    memory: tegra: Add support for the Tegra194 memory controller
    memory: tegra: Only include support for enabled SoCs
    memory: tegra: Support DVFS on Tegra186 and later
    ...

    Linus Torvalds
     

24 Jan, 2020

2 commits

  • To achieve best possible rate, maximum limit of divider is required
    while computation. Get maximum supported divisor from firmware. To
    maintain backward compatibility assign maximum possible value(0xFFFF)
    if query for max divisor is not successful.

    Signed-off-by: Rajan Vaja
    Link: https://lkml.kernel.org/r/1575527759-26452-5-git-send-email-rajan.vaja@xilinx.com
    Acked-by: Michal Simek
    [sboyd@kernel.org: Remove else return and just return]
    Signed-off-by: Stephen Boyd

    Rajan Vaja
     
  • Warn user if clock is used by more than allowed devices.
    This check is done by firmware and returns respective
    error code. Upon receiving error code for excessive user,
    warn user for the same.

    This change is done to restrict VPLL use count. It is
    assumed that VPLL is used by one user only.

    Signed-off-by: Michal Simek
    Signed-off-by: Rajan Vaja
    Link: https://lkml.kernel.org/r/1575527759-26452-4-git-send-email-rajan.vaja@xilinx.com
    Acked-by: Michal Simek
    Signed-off-by: Stephen Boyd

    Rajan Vaja
     

12 Dec, 2019

1 commit


06 Dec, 2019

1 commit

  • Pull ARM SoC driver updates from Olof Johansson:
    "Various driver updates for platforms:

    - A larger set of work on Tegra 2/3 around memory controller and
    regulator features, some fuse cleanups, etc..

    - MMP platform drivers, in particular for USB PHY, and other smaller
    additions.

    - Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
    and ASV (adaptive voltage), allowing the platform to run at more
    optimal operating points.

    - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas

    - Clock/reset control driver for TI/OMAP

    - Meson-A1 reset controller support

    - Qualcomm sdm845 and sda845 SoC IDs for socinfo"

    * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
    firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
    soc: fsl: add RCPM driver
    dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
    memory: tegra: Consolidate registers definition into common header
    memory: tegra: Ensure timing control debug features are disabled
    memory: tegra: Introduce Tegra30 EMC driver
    memory: tegra: Do not handle error from wait_for_completion_timeout()
    memory: tegra: Increase handshake timeout on Tegra20
    memory: tegra: Print a brief info message about EMC timings
    memory: tegra: Pre-configure debug register on Tegra20
    memory: tegra: Include io.h instead of iopoll.h
    memory: tegra: Adapt for Tegra20 clock driver changes
    memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
    memory: tegra: Add gr2d and gr3d to DRM IOMMU group
    memory: tegra: Set DMA mask based on supported address bits
    soc: at91: Add Atmel SFR SN (Serial Number) support
    memory: atmel-ebi: switch to SPDX license identifiers
    memory: atmel-ebi: move NUM_CS definition inside EBI driver
    soc: mediatek: Refactor bus protection control
    soc: mediatek: Refactor sram control
    ...

    Linus Torvalds
     

20 Nov, 2019

1 commit


16 Oct, 2019

1 commit

  • For "0" requirement which is used to inform firmware that device is
    not required currently by master, Versal PLM (Platform Loader and
    Manager) which runs on Platform Management Controller and is responsible
    platform management of devices that disables clock, power it down
    and reset the device. genpd_power_off() is being called during runtime
    suspend also. So, if any device goes to runtime suspend state during
    resumes it needs to be re-initialized again. It is possible that
    drivers do not reinitialize device upon resume from runtime suspend
    every time ans so dont want it to be powered down or get reset
    during runtime suspend.

    In Versal PLM new PM_CAP_UNUSABLE capability is added, which disables
    clock only and avoids power down and reset during runtime suspend. Power
    and reset will be gated with core suspend.So, this patch sets
    CAPABILITY_UNUSABLE requirement during gpd_power_off()
    if platform is other than zynqmp.

    Signed-off-by: Tejas Patel
    Signed-off-by: Jolly Shah
    Signed-off-by: Michal Simek

    Tejas Patel
     

21 Jun, 2019

1 commit


15 Apr, 2019

1 commit