05 Sep, 2009
1 commit
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Change msr-reg.o to obj-y (it will be included in virtually every
kernel since it is used by the initialization code for AMD processors)
and add a separate C file to export its symbols to modules, so that
msr.ko can use them; on uniprocessors we bypass the helper functions
in msr.o and use the accessor functions directly via inlines.Signed-off-by: H. Peter Anvin
LKML-Reference:
Cc: Borislav Petkov
04 Sep, 2009
6 commits
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Otherwise, system with apci id lifting will have wrong apicid in
/proc/cpuinfo.and use that in srat_detect_node().
Signed-off-by: Yinghai Lu
Cc: Andreas Herrmann
Cc: Suresh Siddha
Cc: Cyrill Gorcunov
LKML-Reference:
Signed-off-by: Ingo Molnar -
Current sched domain creation code can't handle multi-node processors.
When switching to power_savings scheduling errors show up and
system might hang later on (due to broken sched domain hierarchy):# echo 0 >> /sys/devices/system/cpu/sched_mc_power_savings
CPU0 attaching sched-domain:
domain 0: span 0-5 level MC
groups: 0 1 2 3 4 5
domain 1: span 0-23 level NODE
groups: 0-5 6-11 18-23 12-17
...
# echo 1 >> /sys/devices/system/cpu/sched_mc_power_savings
CPU0 attaching sched-domain:
domain 0: span 0-11 level MC
groups: 0 1 2 3 4 5 6 7 8 9 10 11
ERROR: parent span is not a superset of domain->span
domain 1: span 0-5 level CPU
ERROR: domain->groups does not contain CPU0
groups: 6-11 (__cpu_power = 12288)
ERROR: groups don't span domain->span
domain 2: span 0-23 level NODE
groups:
ERROR: domain->cpu_power not setERROR: groups don't span domain->span
...Fixing all aspects of power-savings scheduling for Magny-Cours needs
some larger changes in the sched domain creation code.As a short-term and temporary workaround avoid the problems by
extending "the worst possible hack" ;-(
and always use llc_shared_map on AMD Magny-Cours when MC domain span
is calculated.With this I get:
# echo 1 >> /sys/devices/system/cpu/sched_mc_power_savings
CPU0 attaching sched-domain:
domain 0: span 0-5 level MC
groups: 0 1 2 3 4 5
domain 1: span 0-5 level CPU
groups: 0-5 (__cpu_power = 6144)
domain 2: span 0-23 level NODE
groups: 0-5 (__cpu_power = 6144) 6-11 (__cpu_power = 6144) 18-23 (__cpu_power = 6144) 12-17 (__cpu_power = 6144)
...I.e. no errors during sched domain creation, no system hangs, and also
mc_power_savings scheduling works to a certain extend.Cc: Peter Zijlstra
Signed-off-by: Andreas Herrmann
Signed-off-by: H. Peter Anvin -
This fixes threshold_bank4 support on multi-node processors.
The correct mask to use is llc_shared_map, representing an internal
node on Magny-Cours.We need to create 2 sets of symlinks for sibling shared banks -- one
set for each internal node, symlinks of each set should target the
first core on same internal node.Currently only one set is created where all symlinks are targeting
the first core of the entire socket.Signed-off-by: Andreas Herrmann
Signed-off-by: H. Peter Anvin -
L3 cache size, associativity and shared_cpu information need to be
adapted to show information for an internal node instead of the
entire physical package.Signed-off-by: Andreas Herrmann
Signed-off-by: H. Peter Anvin -
Construct entire NodeID and use it as cpu_llc_id. Thus internal node
siblings are stored in llc_shared_map.Signed-off-by: Andreas Herrmann
Signed-off-by: H. Peter Anvin -
The macro was defined in the 32-bit path as well - breaking the
build on 32-bit platforms:arch/x86/lib/msr-reg.S: Assembler messages:
arch/x86/lib/msr-reg.S:53: Error: Bad macro parameter list
arch/x86/lib/msr-reg.S:100: Error: invalid character '_' in mnemonic
arch/x86/lib/msr-reg.S:101: Error: invalid character '_' in mnemonicCc: Borislav Petkov
Cc: H. Peter Anvin
LKML-Reference:
Signed-off-by: Ingo Molnar
02 Sep, 2009
2 commits
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This function measures whether the FPU/SSE state can be touched in
interrupt context. If the interrupted code is in user space or has no
valid FPU/SSE context (CR0.TS == 1), FPU/SSE state can be used in IRQ
or soft_irq context too.This is used by AES-NI accelerated AES implementation and PCLMULQDQ
accelerated GHASH implementation.v3:
- Renamed to irq_fpu_usable to reflect the purpose of the function.v2:
- Renamed to irq_is_fpu_using to reflect the real situation.Signed-off-by: Huang Ying
CC: H. Peter Anvin
Signed-off-by: H. Peter Anvin -
msr-reg.S used the :req option on a macro argument, which wasn't
supported by gas 2.16.1 (but apparently by some earlier versions of
gas, just to be confusing.) It isn't necessary, so just remove it.Signed-off-by: H. Peter Anvin
Cc: Borislav Petkov
01 Sep, 2009
10 commits
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Conflicts:
arch/x86/include/asm/paravirt.hManual merge:
arch/x86/include/asm/paravirt_types.hMerge reason: x86/paravirt conflicts non-trivially with x86/cpu,
resolve it.Signed-off-by: Ingo Molnar
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Make it possible to access the all-register-setting/getting MSR
functions via the MSR driver. This is implemented as an ioctl() on
the standard MSR device node.Signed-off-by: H. Peter Anvin
Cc: Borislav Petkov -
Create _on_cpu helpers for {rw,wr}msr_safe_regs() analogously with the
other MSR functions. This will be necessary to add support for these
to the MSR driver.Signed-off-by: H. Peter Anvin
Cc: Borislav Petkov -
For some reason, the _safe MSR functions returned -EFAULT, not -EIO.
However, the only user which cares about the return code as anything
other than a boolean is the MSR driver, which wants -EIO. Change it
to -EIO across the board.Signed-off-by: H. Peter Anvin
Cc: Jeremy Fitzhardinge
Cc: Chris Wright
Cc: Alok Kataria
Cc: Rusty Russell -
Add CFI annotations for native_{rd,wr}msr_safe_regs().
Simplify the 64-bit implementation: we don't allow the upper half
registers to be set, and so we can use them to carry state across the
operation.Signed-off-by: H. Peter Anvin
Cc: Borislav Petkov
LKML-Reference: -
We have had this convenient macro _ASM_EXTABLE() to generate exception
table entry in inline assembly. Make it also usable for pure
assembly.Signed-off-by: H. Peter Anvin
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Add 32-bit versions of the combined CFI macros, equivalent to the
64-bit ones except, obviously, operating on 32-bit stack words.Signed-off-by: H. Peter Anvin
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fbd8b1819e80ac5a176d085fdddc3a34d1499318 turns off the bit for
/proc/cpuinfo. However, a proper/full fix would be to additionally
turn off the bit in the CPUID output so that future callers get
correct CPU features info.Do that by basically reversing what the BIOS wrongfully does at boot.
Signed-off-by: Borislav Petkov
LKML-Reference:
Signed-off-by: H. Peter Anvin -
Switch them to native_{rd,wr}msr_safe_regs and remove
pv_cpu_ops.read_msr_amd.Signed-off-by: Borislav Petkov
LKML-Reference:
Signed-off-by: H. Peter Anvin -
native_{rdmsr,wrmsr}_safe_regs are two new interfaces which allow
presetting of a subset of eight x86 GPRs before executing the rd/wrmsr
instructions. This is needed at least on AMD K8 for accessing an erratum
workaround MSR.Originally based on an idea by H. Peter Anvin.
Signed-off-by: Borislav Petkov
LKML-Reference:
Signed-off-by: H. Peter Anvin
23 Aug, 2009
2 commits
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Add another option when selecting CPU family so the kernel can be
optimized for Intel Atom CPUs. If GCC supports tuning options for
Intel Atom they will be used.Signed-off-by: Tobias Doerffel
Signed-off-by: H. Peter Anvin
LKML-Reference:
Signed-off-by: Ingo Molnar
22 Aug, 2009
7 commits
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In commit a8e7d49aa7be728c4ae241a75a2a124cdcabc0c5 ("Fix race in
create_empty_buffers() vs __set_page_dirty_buffers()"), I removed a test
for a NULL page mapping unintentionally when some of the code inside
__set_page_dirty() was moved to the callers.That removal generally didn't matter, since a filesystem would serialize
truncation (which clears the page mapping) against writing (which marks
the buffer dirty), so locking at a higher level (either per-page or an
inode at a time) should mean that the buffer page would be stable. And
indeed, nothing bad seemed to happen.Except it turns out that apparently reiserfs does something odd when
under load and writing out the journal, and we have a number of bugzilla
entries that look similar:http://bugzilla.kernel.org/show_bug.cgi?id=13556
http://bugzilla.kernel.org/show_bug.cgi?id=13756
http://bugzilla.kernel.org/show_bug.cgi?id=13876and it looks like reiserfs depended on that check (the common theme
seems to be "data=journal", and a journal writeback during a truncate).I suspect reiserfs should have some additional locking, but in the
meantime this should get us back to the pre-2.6.29 behavior.Pattern-pointed-out-by: Roland Kletzing
Cc: stable@kernel.org (2.6.29 and 2.6.30)
Cc: Jeff Mahoney
Cc: Nick Piggin
Cc: Al Viro
Signed-off-by: Linus Torvalds -
* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
drm/radeon: add GET_PARAM/INFO support for Z pipes
drm/radeon/kms: add r100/r200 OQ support.
drm: Fix sysfs device confusion.
drm/radeon/kms: implement the bo busy ioctl properly. -
* 'btrfs' of git://git.kernel.dk/linux-2.6-block:
btrfs: fix inode rbtree corruption -
As noted in 83d349f35e1ae72268c5104dbf9ab2ae635425d4 ("x86: don't send
an IPI to the empty set of CPU's"), some APIC's will be very unhappy
with an empty destination mask. That commit added a WARN_ON() for that
case, and avoided the resulting problem, but didn't fix the underlying
reason for why those empty mask cases happened.This fixes that, by checking the result of 'cpumask_andnot()' of the
current CPU actually has any other CPU's left in the set of CPU's to be
sent a TLB flush, and not calling down to the IPI code if the mask is
empty.The reason this started happening at all is that we started passing just
the CPU mask pointers around in commit 4595f9620 ("x86: change
flush_tlb_others to take a const struct cpumask"), and when we did that,
the cpumask was no longer thread-local.Before that commit, flush_tlb_mm() used to create it's own copy of
'mm->cpu_vm_mask' and pass that copy down to the low-level flush
routines after having tested that it was not empty. But after changing
it to just pass down the CPU mask pointer, the lower level TLB flush
routines would now get a pointer to that 'mm->cpu_vm_mask', and that
could still change - and become empty - after the test due to other
CPU's having flushed their own TLB's.See
http://bugzilla.kernel.org/show_bug.cgi?id=13933
for details.
Tested-by: Thomas Björnell
Cc: stable@kernel.org
Signed-off-by: Linus Torvalds -
When 'and'ing two bitmasks (where 'andnot' is a variation on it), some
cases want to know whether the result is the empty set or not. In
particular, the TLB IPI sending code wants to do cpumask operations and
determine if there are any CPU's left in the final set.So this just makes the bitmask (and cpumask) functions return a boolean
for whether the result has any bits set.Cc: stable@kernel.org (2.6.30, needed by TLB shootdown fix)
Signed-off-by: Linus Torvalds -
The default_send_IPI_mask_logical() function uses the "flat" APIC mode
to send an IPI to a set of CPU's at once, but if that set happens to be
empty, some older local APIC's will apparently be rather unhappy. So
just warn if a caller gives us an empty mask, and ignore it.This fixes a regression in 2.6.30.x, due to commit 4595f9620 ("x86:
change flush_tlb_others to take a const struct cpumask"), documented
here:http://bugzilla.kernel.org/show_bug.cgi?id=13933
which causes a silent lock-up. It only seems to happen on PPro, P2, P3
and Athlon XP cores. Most developers sadly (or not so sadly, if you're
a developer..) have more modern CPU's. Also, on x86-64 we don't use the
flat APIC mode, so it would never trigger there even if the APIC didn't
like sending an empty IPI mask.Reported-by: Pavel Vilim
Reported-and-tested-by: Thomas Björnell
Reported-and-tested-by: Martin Rogge
Cc: Mike Travis
Cc: Ingo Molnar
Cc: stable@kernel.org
Signed-off-by: Linus Torvalds
21 Aug, 2009
11 commits
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Needed for occlusion queries on rv530 chips.
Signed-off-by: Alex Deucher
Signed-off-by: Dave Airlie -
Node may not be inserted over existing node. This causes inode tree
corruption and I was seeing crashes in inode_tree_del which I can not
reproduce after this patch.The other way to fix this would be to tie inode lifetime in the rbtree
with inode while not in freeing state. I had a look at this but it is
not so trivial at this point. At least this patch gets things working again.Signed-off-by: Nick Piggin
Cc: Chris Mason
Acked-by: Yan Zheng
Signed-off-by: Jens Axboe -
This adds the relocation necessary for OQ support on the r100/r200
chipsets.Signed-off-by: Dave Airlie
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The drm sysfs class suspend / resume methods could not distinguish
between different device types wich could lead to illegal type casts.Use struct device_type and make sure the class suspend / resume callbacks
are aware of those. There is no per device-type suspend / resume. Only
new-style PM.Signed-off-by: Thomas Hellstrom
Reviewed-by: Jesse Barnes
Signed-off-by: Dave Airlie -
The previous patch assumes the ioctl already existed, when
it actually didn't.It also didn't return the correct error code.
Signed-off-by: Dave Airlie
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* 'i2c-fixes-rc6' of git://aeryn.fluff.org.uk/bjdooks/linux:
i2c-stu300: I2C STU300 stability updates
i2c-omap: Enable workaround for Errata 1.153 based on
i2c-omap: ACK pending [R/X]DR and [R/X]RDY interrupts
i2c-omap: Fix I2C status ACK -
- blk clk is enabled when an irq arrives. The clk should be enabled,
but just to make sure.
- All error bits are handled no matter state machine state
- All irq's will run complete() except for irq's that wasn't an event.
- No more looking into status registers just in case an interrupt
has happend and the irq handle wasn't executed.
- irq_disable/enable are now separete functions.
- clk settings calculation changed to round upwards instead of
downwards.
- Number of address send attempts before giving up is increased to 12
from 10 since it most times take 8 tries before getting through.Signed-off-by: Linus Walleij
Signed-off-by: Ben Dooks -
Silicon Errata 1.153 has been fixed on OMAP 3630|4430 with the use of a later
version of I2C IP block.The errata impacts OMAP 2420|2430|3430, enable the workaround for these based
on I2C IP block revision number instead of OMAP CPU typeSigned-off-by: Moiz Sonasath
Signed-off-by: Vikram Pandita
Signed-off-by: Ben Dooks -
ACK any pending read/write interrupts before exiting the ISR either after
completing the operation [ARDY interrupt] or in case of an error
[NACK|AL interrupt]Signed-off-by: Moiz Sonasath
Signed-off-by: Vikram Pandita
Signed-off-by: Ben Dooks -
I2C status ack for [RX]RDR and [RX]RDY could
cause race conditions of clearing the event
twice and a violation of the programing
sequence as defined in TRM This patch fixes
the same.Signed-off-by: Nishanth Menon
Signed-off-by: Moiz Sonasath
Signed-off-by: Ben Dooks -
* 'fix/hda' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6:
ALSA: hda - Fix probe of Toshiba laptops with ALC268 codec
ALSA: hda: add model for Intel DG45ID/DG45FC boards
ALSA: hda: enable speaker output for Compaq 6530s/6531s
20 Aug, 2009
1 commit
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There are many variants of Toshiba laptops with ALC268 codec, and
it seems that a few of them don't work with model=toshiba preset
since they have the secondary ALC268 codec just for HDMI output.
This is a regression due to the previous clean-up work to merge all
Toshiba quirk entries into a single check.This patch adds the identification of such laptops to apply the
standard BIOS-probing method. Unfortunately, Toshiba laptops have
all the same PCI SSID, so we need to check the codec SSID to identify
each device.Tested-by: Alexey Dobriyan
Signed-off-by: Takashi Iwai
