26 Oct, 2015

1 commit


11 Aug, 2015

2 commits

  • Add the compatible strings for the at91sam9x5, at91sam9n12, sama5d4 and
    sama5d2 SoCs.
    Update the documentation accordingly.

    Signed-off-by: Boris Brezillon
    Signed-off-by: Nicolas Ferre
    Signed-off-by: Lee Jones

    Boris Brezillon
     
  • Some HLCDC registers cannot be written until the hardware has finished
    applying the previous configuration request. If they are written while
    an action is still in progress, the new configuration might be silently
    ignored, resulting in unpredictable behavior.

    Hide the config synchronization stuff in a regmap implementation and use
    this implementation instead of the generic mmio one.

    Signed-off-by: Boris Brezillon
    Acked-by: Nicolas Ferre
    Signed-off-by: Lee Jones

    Boris Brezillon
     

26 Nov, 2014

1 commit

  • The HLCDC IP available on some Atmel SoCs (i.e. at91sam9n12, at91sam9x5
    family or sama5d3 family) exposes 2 subdevices:
    - a display controller (controlled by a DRM driver)
    - a PWM chip

    The MFD device provides a regmap and several clocks (those connected
    to this hardware block) to its subdevices.

    This way concurrent accesses to the iomem range are handled by the regmap
    framework, and each subdevice can safely access HLCDC registers.

    Signed-off-by: Boris Brezillon
    Tested-by: Anthony Harivel
    Tested-by: Ludovic Desroches
    Signed-off-by: Lee Jones

    Boris Brezillon