12 Feb, 2019
40 commits
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This patch is to add CAN wakeup function on MX8 platforms and update the
binding file fsl-flexcan.txt.For MX8, the function "flexcan_irq()" should not call "flexcan_exit_stop_mode()"
due to firmware(SCU) cannot make SC IPC calls from an interrupt context.
If not exit stop mode in ISR, it will continuously enter wakeup ISR for the reason
that system will respond IRQ before call CAN system resume.
To fix the issue, we can exit stop mode during noirq resume stage.For wakeup case, it should not set pinctrl to sleep state by
pinctrl_pm_select_sleep_state.Reviewed-by: Dong Aisheng
Reviewed-by: Andy Duan
Signed-off-by: Joakim Zhang -
When do CAN wakeup test, it printed "flexcan 2094000.can: Unbalanced
pm_runtime_enable!" warning.For wakeup system resume case, it will call pm_runtime_force_resume(),
however, pm_runtime_force_suspend() haven't been called in system suspend.
While pm_runtime_force_resume() will decrease the variable "disable_depth",
and pm_runtime_force_suspend() will increase "disable_depth". So, if we
didn't call pm_runtime_force_suspend() but called pm_runtime_force_resume(),
would produce this waring.To fix this warning, pm_runtime_force_suspend() and pm_runtime_force_resume()
should appear in pairs.Reviewed-by: Dong Aisheng
Reviewed-by: Andy Duan
Signed-off-by: Joakim Zhang -
Keep the same pmic driver name as the product name in board, although
bd71840 share the same driver as bd71837.Signed-off-by: Robin Gong
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Add bd71840 driver name to sync the product name on board.
Signed-off-by: Robin Gong
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According to pixel combiner spec, there is a clock mux before
the display clock input of stream1 to choose the clock from
disp1 clock(only for stream1) or disp0 clock(usually for stream0).
So, we should enable disp0 clock when pixel combiner is used
instead of enabling the display clock of master stream.Signed-off-by: Liu Ying
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This reverts commit 05d335b07bab856b34317acbe3e3b9d9f58946ce, since the
commit e07309cfdc567623a3f0cde6b79b972910248152 (MLK-19819-1 drm/imx:
lcdif: bypass atomic check when CRTC is disabled) can cover the function
that commit 05d335b07bab856b34317acbe3e3b9d9f58946ce can provide.Signed-off-by: Fancy Fang
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On 4.14.y kernel branch, the DRM framework has been modified that
when no CONNECTOR attach to CRTC, the fb creation wil be deferred
until some CONNECTOR has been detected via hotplug. And the system
suspend workflow is also affected accordingly, if the CRTC atomic
check fails, the display-subsystem suspend also will be caused to
fail. So bypass the 'bus_format' check when CRTC is going to be
disabled.Signed-off-by: Fancy Fang
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This needs to be one individual change since otherwise the driver
and the dtbs won't build anymore. This updates all the dts and dtsi files,
the clock index defines and the imx8mq clock driver itselfSigned-off-by: Abel Vesa
Reviewed-by: Leonard Crestez -
Since a lot of clocks on imx8m are formed by a mux, gate, predivider and
divider, the idea here is to combine all of those into one composite clock,
but we need to deal with both predivider and divider at the same time and
therefore we add the imx8m_clk_composite_divider_ops and register
the composite clock with those.Signed-off-by: Abel Vesa
Suggested-by: Sascha Hauer
Reviewed-by: Sascha Hauer
Acked-by: Leonard Crestez -
The imx/clk-composite is only used by 7ulp. It makes more sense
to mention that in the name of the file and the register function
since later imx-composite clocks may be added.Signed-off-by: Abel Vesa
Reviewed-by: Leonard Crestez -
While running suspend/resume tests it may happen to go to suspend while
CTXLD still has entries to be commited. Currently, when this happens,
the scaler freezes.This patch will fire up context loader just before going to suspend,
thus commiting everything to DCSS before cutting off the clocks.Signed-off-by: Laurentiu Palcu
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The current DCSS driver uses the generic drm_atomic_helper_commit().
But, this helper offers no protection against concurent commits by
userspace apps that may not wait for flip_done events.This patch customizes the atomic_commit() callback by reusing the
drm_atomic_helper_commit() helper and adding a spinlock that will not
allow for another commit to go through if one is already pending.Since we'll be calling the dcss_drm_atomic_commit_tail() ourselves,
there's no need for drm_mode_config_helper_funcs anymore. So, remove it.Signed-off-by: Laurentiu Palcu
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This change adds a workqueue and a commit object that can be used by the
drivers to protect pending commits (non-blocking ones) from concurent
commits using legacy API (for example).A non-blocking commit will defer the work to a workqueue and it may wait
for fences to be cleared. Waiting for fences to be cleared is
interruptible. Hence, if a SETPLANE IOCTL is performed (to disable a
plane), it may preempt the current commit and will mess up the atomic
states. When the legacy calls finish, the non-blocking commit worker
will resume, but the crtc and/or FBs of some planes are already NULL.
Hence, the non-blocking commit will crash in
drm_atomic_helper_commit_planes() with NULL pointer dereference.This particular patch does not affect existing drivers in any way.
Signed-off-by: Laurentiu Palcu
CC: Ying Liu
CC: Fancy Fang -
At xhci removal the USB3 hcd (shared_hcd) is removed before the primary
USB2 hcd. Interrupts for port status changes may still occur for USB3
ports after the shared_hcd is freed, causing NULL pointer dereference.Check if xhci->shared_hcd is still valid before handing USB3 port events
Cc:
Reported-by: Peter Chen
Tested-by: Jack Pham
Signed-off-by: Mathias Nyman
Signed-off-by: Peter Chen -
(Merged upstream reviewing patch, and add cdns support -- Peter Chen)
Ensure that the shared_hcd pointer is valid when calling usb_put_hcd()
The shared_hcd is removed and freed in xhci by first calling
usb_remove_hcd(xhci->shared_hcd), and later
usb_put_hcd(xhci->shared_hcd)Afer commit fe190ed0d602 ("xhci: Do not halt the host until both HCD have
disconnected their devices.") the shared_hcd was never properly put as
xhci->shared_hcd was set to NULL before usb_put_hcd(xhci->shared_hcd) was
called.shared_hcd (USB3) is removed before primary hcd (USB2).
While removing the primary hcd we might need to handle xhci interrupts
to cleanly remove last USB2 devices, therefore we need to set
xhci->shared_hcd to NULL before removing the primary hcd to let xhci
interrupt handler know shared_hcd is no longer available.xhci-plat.c, cdns/host.c first create both their hcd's before
adding them. so to keep the correct reverse removal order use a temporary
shared_hcd variable for them.
For more details see commit 4ac53087d6d4 ("usb: xhci: plat: Create both
HCDs before adding them")Fixes: fe190ed0d602 ("xhci: Do not halt the host until both
HCD have disconnected their devices.")
Cc: Joel Stanley
Cc: Chunfeng Yun
Cc: Thierry Reding
Cc: Jianguo Sun
Cc:
Tested-by: Peter Chen
Tested-by: Jack Pham
Reported-by: Jack Pham
Signed-off-by: Mathias Nyman
Signed-off-by: Peter Chen -
Signed-off-by: ming_qian
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Fix the kernel panic during tty rpmsg str echo demo.
Root cause: The driver name may be flushed.
Use the kasprintf to setup the rpmsg tty driver name to
fix this issue.
[ 35.494361] Unable to handle kernel paging request at virtual address
ffff000021b4ba40
[ 35.502321] Mem abort info:
[ 35.505117] Exception class = DABT (current EL), IL = 32 bits
[ 35.511099] SET = 0, FnV = 0
[ 35.514188] EA = 0, S1PTW = 0
[ 35.517328] Data abort info:
[ 35.520255] ISV = 0, ISS = 0x00000007
[ 35.524130] CM = 0, WnR = 0
[ 35.527140] swapper pgtable: 4k pages, 48-bit VAs, pgd =
ffff0000096dd000
[ 35.533964] [ffff000021b4ba40] *pgd=000000097fffe803,
*pud=000000097fffd803, *pmd=0000000973d20003, *pte=0000000000000000
[ 35.544976] Internal error: Oops: 96000007 [#1] PREEMPT SMP
[ 35.550553] Modules linked in: imx_rpmsg_tty
[ 35.554843] CPU: 2 PID: 3911 Comm: sh Not tainted
4.14.62-05098-gcff652e-dirty #41
[ 35.562419] Hardware name: Freescale i.MX8QM MEK (DT)
[ 35.567479] task: ffff8008f3950000 task.stack: ffff000021b10000
[ 35.573413] PC is at string+0x28/0x98
[ 35.577080] LR is at vsnprintf+0x3c0/0x688
[ 35.581177] pc : [] lr : []
pstate: a0000145
[ 35.588577] sp : ffff000021b13970
[ 35.591894] x29: ffff000021b13970 x28: ffff80097365f56f
[ 35.597219] x27: ffff0000092cf03a x26: ffff0000092cf03a
[ 35.602544] x25: ffff000021b13a80 x24: ffff8008f365f570
[ 35.607869] x23: 00000000ffffffd8 x22: ffff000008fc08dc
[ 35.613195] x21: 000000007fffffff x20: ffff000008fc08cc
[ 35.618512] x19: ffff8008f365f570 x18: 0000000000000000
[ 35.623827] x17: 0000ffffbec93588 x16: ffff00000820b2c0
[ 35.629144] x15: 0000000000000000 x14: ffffffffffffffff
[ 35.634461] x13: 0000000000000018 x12: 0101010101010101
[ 35.639777] x11: 0000000000000000 x10: ffff000021b13a80
[ 35.645085] x9 : ffff000021b13a80 x8 : ffff000021b13a80
[ 35.650402] x7 : ffff8008f365f570 x6 : fffffffffffffffe
[ 35.655718] x5 : 00000000ffffffd0 x4 : ffff000021b4ba40
[ 35.661035] x3 : ffff0a00ffffff04 x2 : ffff80097365f56f
[ 35.666354] x1 : ffff80097365f56f x0 : ffffffffffffffff
[ 35.671672] Process sh (pid: 3911, stack limit = 0xffff000021b10000)
[ 35.678022] Call trace:
[ 35.680465] Exception stack(0xffff000021b13830 to 0xffff000021b13970)
[ 35.686911] 3820: ffffffffffffffff
ffff80097365f56f
[ 35.694748] 3840: ffff80097365f56f ffff0a00ffffff04 ffff000021b4ba40
00000000ffffffd0
[ 35.702581] 3860: fffffffffffffffe ffff8008f365f570 ffff000021b13a80
ffff000021b13a80
[ 35.710409] 3880: ffff000021b13a80 0000000000000000 0101010101010101
0000000000000018
[ 35.718245] 38a0: ffffffffffffffff 0000000000000000 ffff00000820b2c0
0000ffffbec93588
[ 35.726081] 38c0: 0000000000000000 ffff8008f365f570 ffff000008fc08cc
000000007fffffff
[ 35.733908] 38e0: ffff000008fc08dc 00000000ffffffd8 ffff8008f365f570
ffff000021b13a80
[ 35.741744] 3900: ffff0000092cf03a ffff0000092cf03a ffff80097365f56f
ffff000021b13970
[ 35.749583] 3920: ffff000008d61c70 ffff000021b13970 ffff000008d5f1a0
00000000a0000145
[ 35.757417] 3940: ffff8008fff5fb00 0000000000001c00 0000ffffffffffff
ffff000008d61930
[ 35.765254] 3960: ffff000021b13970 ffff000008d5f1a0
[ 35.770129] [] string+0x28/0x98
[ 35.774837] [] vsnprintf+0x3c0/0x688
[ 35.779980] [] sprintf+0x4c/0x58Signed-off-by: Richard Zhu
Reviewed-by: Fugang Duan -
commit 108e99f6487("MLK-19774 VPU: Add CSR address in dts and remove some CM4 legacy code")
did not take xen domu into consideration and cause VPU probe failure in
domu.Fix it by add reg-csr in domu dts and passthrough the reg space.
Signed-off-by: Peng Fan
Reviewed-by: Fugang Duan -
Signed-off-by: Gilles Talis
Reviewed-by: Zhou Peng -
Signed-off-by: Gilles Talis
Reviewed-by: Zhou Peng -
Signed-off-by: Gilles Talis
Reviewed-by: Zhou Peng -
Signed-off-by: ming_qian
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Passthrough to domu.
BuildInfo:
- SCFW a27e9643, SECO-FW 31fabbff, IMX-MKIMAGE 7eae081f, ATF e6db8a6
- U-Boot 2018.03-00007-gb8296e64d2Signed-off-by: Peng Fan
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Passthrough usb typec to domu
Signed-off-by: Peng Fan
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Use ISI0-3 in DomU, use ISI4-7 in Dom0.
BuildInfo:
- SCFW a958746e, SECO-FW 31fabbff, IMX-MKIMAGE f244aefa, ATF 1590be0
- U-Boot 2018.03-00707-g884cada50bUse `mx8_v4l2_cap_drm.out -cam 0xf` to test camera in Dom0 and DomU
after `systemctl stop weston`.One remaing issue is that ISI_CH0 is the parent power domain,
if dom0 runtime power down this domain, DomU will camera will
panic.Since there is an i2c controller passthrough, the orignal backend
pvi2c adapter idx will be changed to 0, so reflect that change
in domu.dts.Signed-off-by: Peng Fan
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Introduce xen_i2c node and passthrough the i2c0 sensors to domu.
The BuildInfo
- SCFW 148acb34, SECO-FW 31fabbff, IMX-MKIMAGE f244aefa, ATF 1590be0
- U-Boot 2018.03-00707-g884cada50b-dirtySigned-off-by: Peng Fan
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Add xen,i2c bindings
Signed-off-by: Peng Fan
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Select I2C backend driver.
Signed-off-by: Peng Fan
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Add i2c backend frontend support.
The transaction only support one msg each time.
The frontend sends a request to backend, backend use i2c_transfer
to do real transaction to hardware and return the results to frontend.Now i2cdump/get/set works.
In domu cfg file, use
"vi2c = ['backend=0,be-adapter=5a800000.i2c,addr=0x51;0x44']" to
create a dummy controller in frontend and allowed slaves in backend.Currently the slave address check not added, it will be supported in
furture patch.Signed-off-by: Peng Fan
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Introduce i2cif from xen. This will be used by paravirtualization
i2c driver.Signed-off-by: Peng Fan
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Clean vpu decoder code, add CSR address in dts and remove some CM4
legacy codeSigned-off-by: Huang Chaofan
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Store9 unit can be shared bewteen display engine(for sync mode fixup)
and blit engine. It's proper to get the store resource in the DPU
common driver and then pass it to relevant client drivers. From the
CRTC driver point of view, it's straightforward to get the store
resource via platform data instead of getting it directly, which avoids
the wrong situation where getting it twice(one time for one of the two
CRTCs of one DPU, respectively).Signed-off-by: Liu Ying
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No need to add extra ref count for the dma fence in the API viv_fence_create.
Incrence the ref-count in dma_fence_init and sync_file_create
decrease the ref-count in gckOS_Signal and close(fd).Signed-off-by Yong Gan
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Add new setup_wml() for i.mx6ul, otherwise, kernel crash triggered
since no such function on i.mx6ul.This issue is brought by
commit 85c124bbc1c4 ("MLK-18983-1: spi: imx: move wml setting to
later than setup_transfer").Signed-off-by: Robin Gong
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Correct wml as the last rx sg length instead of the whole transfer
length.Signed-off-by: Robin Gong
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Current dynamic burst lengt
h is based on the whole transfer length,
that's ok if there is only one sg, but not correct in case multi sgs
in one transfer,because the tail data should based on the last sg
length instead of the whole transfer length. Move wml setting for DMA
to the later place, thus, the next patch could get the right last sg
length for wml setting. This patch is a preparation one, no any
function change involved.Signed-off-by: Robin Gong
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The driver creates constant objects with the type of struct dpu_devtype,
so it's unnecessary to use const modifiers for those non-pointer entries.Signed-off-by: Liu Ying
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1. Before enabling ISI channel, driver need to fill its out buffer
address, so correct this sequence2. Because ISI use ping-pong buffer and write data to memory with
BUF1->BUF2->BUF1... sequence. If it finish with BUF1 and user start
a new capture process, it will start with BUF2. This will lead the
buffer ready for being read is not equal to buffer written by ISI.So
HW reset ISI, in order to confirm it start with BUF1.Signed-off-by: Guoniu.Zhou
(cherry picked from commit 794ce0cb7d7f129fb46f5d6f38e82cc1e7f2a367) -
Update nominal operating point frequency to correct value.
Signed-off-by: Teo Hall
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Added a check to see if the EDID read fails before copying the EDID.
Added a check to see if buf parameter is NULL.Signed-off-by: Oliver Brown