29 Sep, 2006
10 commits
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* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (130 commits)
[ARM] 3856/1: Add clocksource for Intel IXP4xx platforms
[ARM] 3855/1: Add generic time support
[ARM] 3873/1: S3C24XX: Add irq_chip names
[ARM] 3872/1: S3C24XX: Apply consistant tabbing to irq_chips
[ARM] 3871/1: S3C24XX: Fix ordering of EINT4..23
[ARM] nommu: confirms the CR_V bit in nommu mode
[ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores.
[ARM] 3870/1: AT91: Start removing static memory mappings
[ARM] 3869/1: AT91: NAND support for DK and KB9202 boards
[ARM] 3868/1: AT91 hardware header update
[ARM] 3867/1: AT91 GPIO update
[ARM] 3866/1: AT91 clock update
[ARM] 3865/1: AT91RM9200 header updates
[ARM] 3862/2: S3C2410 - add basic power management support for AML M5900 series
[ARM] kthread: switch arch/arm/kernel/apm.c
[ARM] Off-by-one in arch/arm/common/icst*
[ARM] 3864/1: Refactore sharpsl_pm
[ARM] 3863/1: Add Locomo SPI Device
[ARM] 3847/2: Convert LOMOMO to use struct device for GPIOs
[ARM] Use CPU_CACHE_* where possible in asm/cacheflush.h
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Enables the ixp4xx platforms to use Generic time-of-day.
Signed-off-by: Kevin Hilman
Acked-by: John Stultz
Signed-off-by: Deepak Saxena
Signed-off-by: Russell King -
This patch adds Generic time-of-day support for the ARM architecture.
The support is currently added using #ifdef's so that it can support
sub-arches that do not (yet) have a clocksource added. As sub-arches
add clocksource support, they should 'select GENERIC_TIME'Signed-off-by: Deepak Saxena
Signed-off-by: Daniel WalkerSigned-off-by: Kevin Hilman
Acked-by: John Stultz
Signed-off-by: Russell King -
Add names to all the irq_chip structes
Signed-off-by: Ben Dooks
Signed-off-by: Russell King -
Apply consistant tabbing to the IRQ chip
structures in arch/arm/mach-s3c2410/irq.cSigned-off-by: Ben Dooks
Signed-off-by: Russell King -
The demux code for the IRQ EINTs above 3 was
using find last set instead of finding first
set.Also fix it so that we only check EINT4..7
when the parent EINT4t7 goes off, and the
8..23 when EINT8t23 goes off.Signed-off-by: Ben Dooks
Signed-off-by: Russell King -
In nommu mode, the exception vector location depends on the platforms.
Some of the implementations may have some special exception control
forwarding method in their ROM/flash and for some of them has its own
re-mapping mechanism by the h/w.This patch introduces a special configuration CONFIG_CPU_HIGH_VECTOR which
turns on the CR_V bit in nommu mode. The CR_V bit is turned off by default.
This feature depends on CP15 and does not supported by ARM740.Signed-off-by: Hyok S. Choi
Signed-off-by: Russell King -
There is no FSR/FAR register on no-CP15 or MPU cores. This patch adds a
dummy abort handler which returns zero for the base restored Data Abort
model !CPU_CP15_MMU cores. The abort-lv4t.S is still used with the fix-up
for the base updated Data Abort model cores.Signed-off-by: Hyok S. Choi
Signed-off-by: Russell King -
This patch removes the static memory mapping for the currently-unused
peripherals [Synchronous Serial, Timer/Counter unit], and for those
drivers that already ioremap() their registers [UART].Also, the Ethernet driver now uses the platform_device resources but
doesn't yet use ioremap() so we need to pass it the virtual address
instead of the physical address.Signed-off-by: Andrew Victor
Signed-off-by: Russell King
28 Sep, 2006
30 commits
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Major cleanup of all s390 inline assemblies. They now have a common
coding style. Quite a few have been shortened, mainly by using register
asm variables. Use of the EX_TABLE macro helps as well. The atomic ops,
bit ops and locking inlines new use the Q-constraint if a newer gcc
is used. That results in slightly better code.Thanks to Christian Borntraeger for proof reading the changes.
Signed-off-by: Martin Schwidefsky
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Huge s390 assembly files whitespace cleanup.
Signed-off-by: Heiko Carstens
Signed-off-by: Martin Schwidefsky -
A user space program can read uninitialised kernel memory
by appending to a file from a bad address and then reading
the result back. The cause is the copy_from_user function
that does not clear the remaining bytes of the kernel
buffer after it got a fault on the user space address.Signed-off-by: Martin Schwidefsky
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Add a kernel config option for the IBM System z9. This will produce
faster code on newer compilers using the -march=z9-109 option.Signed-off-by: Christian Borntraeger
Signed-off-by: Martin Schwidefsky -
The clocksource infrastructure introduced with commit
ad596171ed635c51a9eef829187af100cbf8dcf7 broke 31 bit s390.
The reason is that the do_div() primitive for 31 bit always
had a restriction: it could only divide an unsigned 64 bit
integer by an unsigned 31 bit integer. The clocksource code
now uses do_div() with a base value that has the most
significant bit set. The result is that clock->cycle_interval
has a funny value which causes the linux time to jump around
like mad.
The solution is "obvious": implement a proper __div64_32
function for 31 bit s390.Signed-off-by: Martin Schwidefsky
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sparse complains, if we use bitwise operations on enums. Cast enum to
long in order to fix that problem!Signed-off-by: Michael Holzheu
Signed-off-by: Martin Schwidefsky -
Don't use static initialization for struct members containing
variables because gcc would generate more code and use double space
on stack.Signed-off-by: Gerald Schaefer
Signed-off-by: Martin Schwidefsky -
Lock for mmap_sem is missing on page fault retry for init task
when it fails due to out of memory.Signed-off-by: Akinobu Mita
Signed-off-by: Martin Schwidefsky -
This patch adds support for the NAND flash on the Atmel AT91RM9200-DK
and KwikByte KB920x boards.Signed-off-by: Andrew Victor
Signed-off-by: Russell King -
This patch makes the AT91 gpio.c support processor-generic (AT91RM9200
and AT91SAM9xxx). The GPIO controllers supported by a particular AT91
processor are defined in the processor-specific file and are registered
with gpio.c at startup.Signed-off-by: Andrew Victor
Signed-off-by: Russell King -
This patch makes the AT91 clock.c support processor-generic (AT91RM9200
and AT91SAM9xxx). The clocks supported by a particular AT91 processor
are defined in the processor-specific file and are registered with
clock.c at startup.Signed-off-by: Andrew Victor
Signed-off-by: Russell King -
This is more preparation for adding support for the new Atmel AT91SAM9
processors.Changes include:
- Replace AT91_BASE_* with AT91RM9200_BASE_*
- Replace AT91_ID_* with AT91RM9200_ID_*
- ROM, SRAM and UHP address definitions moved to at91rm9200.h.
- The raw AT91_P[ABCD]_* definitions are now depreciated in favour of
the GPIO API.Signed-off-by: Andrew Victor
Signed-off-by: Russell King -
this patch registers the wakeup irq, sets a gpio pin to indicate the
status of system for suspend/resume operations, and adds the machine to
the supported machines for use with the simtec-pmSigned-off-by: David Anders
Signed-off-by: Ben Dooks
Signed-off-by: Russell King -
Switch arch/arm/kernel/apm.c from using kernel_thread - whose export
is deprecated - to kthread.Signed-off-by: Serge E. Hallyn
Signed-off-by: Russell King -
hi,
a quick find -iname \*.[ch] | xargs grep "> ARRAY_SIZE(", revealed
these in the icst drivers.
If i == ARRAY_SIZE, we get past the idx2s array.Signed-off-by: Eric Sesterhenn
Signed-off-by: Russell King -
This patch adds another hook into sharpsl_pm to notify the machine
specific driver immediately after resume. This is needed to support the Sharp SL-6000 (Tosa).Signed-off-by: Dirk Opfer
Signed-off-by: Russell King -
The Locomo chip has a SPI interface which is used for SD/MMC cards (only collie).
This patch adds the definition for the SPI device inside the Locomo chip.Signed-off-by: Dirk Opfer
Signed-off-by: Russell King -
Convert LOMOMO to use struct device * for GPIOs instead of struct
locomo_dev. This enables access to the GPIOs from code which is not
a locomo device itself (such as audio). Access for gpio 31 is removed
for error handling (no such hardware exists).Signed-off-by: Richard Purdie
Signed-off-by: Russell King -
This updates the PXA 25x UDC board-independent infrastructure for VBUS sensing
and the D+ pullup. The original code evolved from rather bizarre support on
Intel's "Lubbock" reference hardware, so that on more sensible hardware it
doesn't work as well as it could/should.The change is just to teach the UDC driver how to use built-in PXA GPIO pins
directly. This reduces the amount of board-specfic object code needed, and
enables the use of a VBUS sensing IRQ on boards (like Gumstix) that have one.
With VBUS sensing, the UDC is unclocked until a host is actually connected.Signed-off-by: David Brownell
Signed-off-by: Greg Kroah-Hartman -
Move to .
Signed-off-by: David Brownell
Signed-off-by: Greg Kroah-Hartman -
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] minor reformatting to vmlinux.lds.S
[IA64] CMC/CPE: Reverse the order of fetching log and checking poll threshold
[IA64] PAL calls need physical mode, stacked
[IA64] ar.fpsr not set on MCA/INIT kernel entry
[IA64] printing support for MCA/INIT
[IA64] trim output of show_mem()
[IA64] show_mem() printk levels
[IA64] Make gp value point to Region 5 in mca handler
Revert "[IA64] Unwire set/get_robust_list"
[IA64] Implement futex primitives
[IA64-SGI] Do not request DMA memory for BTE
[IA64] Move perfmon tables from thread_struct to pfm_context
[IA64] Add interface so modules can discover whether multithreading is on.
[IA64] kprobes: fixup the pagefault exception caused by probehandlers
[IA64] kprobe opcode 16 bytes alignment on IA64
[IA64] esi-support
[IA64] Add "model name" to /proc/cpuinfo -
Don't offer non-MMU based CPUs for selection when CONFIG_MMU is
set.Signed-off-by: Russell King
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This patch adds ARM946E-S core support which has typically 8KB I&D cache.
It has a MPU and supports ARMv5TE instruction set.Because the ARM946E-S core can be synthesizable with various cache size,
CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations.Signed-off-by: Hyok S. Choi
Signed-off-by: Russell King -
This patch adds ARM940T core support which has 4KB D-cache, 4KB I-cache
and a MPU.Signed-off-by: Hyok S. Choi
Signed-off-by: Russell King -
This patch adds ARM9TDMI core support which has no cache and no CP15
register(no memory control unit).Signed-off-by: Hyok S. Choi
Signed-off-by: Russell King -
This patch adds ARM740T core support which has a MPU and 4KB or 8KB cache.
Signed-off-by: Hyok S. Choi
Signed-off-by: Russell King -
This patch adds ARM7TDMI core support which has no cache and no CP15
register(no memory control unit).Signed-off-by: Hyok S. Choi
Signed-off-by: Russell King -
All the current CP15 access codes in ARM arch can be categorized and
conditioned by the defines as follows:Related operation Safe condition
a. any CP15 access !CPU_CP15
b. alignment trap CPU_CP15_MMU
c. D-cache(C-bit) CPU_CP15
d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 ||
CPU_ARM720 || CPU_ARM740 ||
CPU_XSCALE || CPU_XSC3 )
e. alternate vector CPU_CP15 && !CPU_ARM740
f. TTB CPU_CP15_MMU
g. Domain CPU_CP15_MMU
h. FSR/FAR CPU_CP15_MMUFor example, alternate vector is supported if and only if
"CPU_CP15 && !CPU_ARM740" is satisfied.Signed-off-by: Hyok S. Choi
Signed-off-by: Russell King -
By merging of uClinux/ARM, we need to treat various CPU cores which have
MMU, MPU or even none for memory management. The memory management
coprocessors are controlled by CP15 register set and the ARM core family
can be categorized by 5 groups by the register ;
G-a. CP15 is MMU : 610, 710, 720, 920, 922, 925, 926, 1020, 1020e, 1022,
v6 and the derivations sa1100, sa110, xscale, xsc3.
G-b. CP15 is MPU : 740, 940, 946, 996, 1156.
G-c. CP15 is MPU or MMU : 1026 (selectable by schematic design)
G-d. CP15 is exist, but nothing for memory managemnt : 966, 968.
G-e. no-CP15 : 7tdmi, 9tdmi, 9e, 9ejThis patch defines CPU_CP15, CPU_CP15_MMU and CPU_CP15_MPU. Thus the
family can be defined as :
- CPU_CP15 only : G-d
- CPU_CP15_MMU(implies CPU_CP15) : G-a, G-c(selectable)
- CPU_CP15_MPU(implies CPU_CP15) : G-b, G-c(selectable)
- !CPU_CP15 : G-eSigned-off-by: Hyok S. Choi
Signed-off-by: Russell King
