04 Aug, 2022
1 commit
-
nvmem: auto load kernel-mod imx_fsb_s400_fuse_match
Signed-off-by: Alice Guo
Signed-off-by: Pankaj Gupta
06 Jul, 2022
1 commit
-
This patch adds i.MX93 nvmem ocotp driver to access the fuse in i.MX93.
Sentinel have read access of OTP shadow register 0-511, and fsb have
read access of shadow 0-51/312-511.Reviewed-by: Ye Li
Signed-off-by: Alice Guo
11 Mar, 2022
1 commit
-
This is the 5.15.27 stable release
* tag 'v5.15.27': (3069 commits)
Linux 5.15.27
hamradio: fix macro redefine warning
KVM: x86/mmu: Passing up the error state of mmu_alloc_shadow_roots()
...Signed-off-by: Jason Liu
Conflicts:
arch/arm/boot/dts/imx7ulp.dtsi
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
arch/arm64/boot/dts/freescale/imx8mq.dtsi
drivers/dma-buf/heaps/cma_heap.c
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
drivers/gpu/drm/mxsfb/mxsfb_kms.c
drivers/mmc/host/sdhci-esdhc-imx.c
drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.c
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
drivers/rpmsg/rpmsg_char.c
drivers/soc/imx/gpcv2.c
drivers/thermal/imx_thermal.c
02 Mar, 2022
1 commit
-
commit f6c052afe6f802d87c74153b7a57c43b2e9faf07 upstream.
Wp-gpios property can be used on NVMEM nodes and the same property can
be also used on MTD NAND nodes. In case of the wp-gpios property is
defined at NAND level node, the GPIO management is done at NAND driver
level. Write protect is disabled when the driver is probed or resumed
and is enabled when the driver is released or suspended.When no partitions are defined in the NAND DT node, then the NAND DT node
will be passed to NVMEM framework. If wp-gpios property is defined in
this node, the GPIO resource is taken twice and the NAND controller
driver fails to probe.It would be possible to set config->wp_gpio at MTD level before calling
nvmem_register function but NVMEM framework will toggle this GPIO on
each write when this GPIO should only be controlled at NAND level driver
to ensure that the Write Protect has not been enabled.A way to fix this conflict is to add a new boolean flag in nvmem_config
named ignore_wp. In case ignore_wp is set, the GPIO resource will
be managed by the provider.Fixes: 2a127da461a9 ("nvmem: add support for the write-protect pin")
Cc: stable@vger.kernel.org
Signed-off-by: Christophe Kerello
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20220220151432.16605-2-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
11 Feb, 2022
1 commit
-
Renaming files relevant to sentinel causes imx-ocotp-fsb-s400.c is not
compiled.Fixes: 2601f7ac2409 ("Nomenclature changes from sentinel to ele")
Reviewed-by: Ye Li
Signed-off-by: Alice Guo
27 Jan, 2022
1 commit
-
[ Upstream commit 86192251033308bb42f1e9813c962989d8ed07ec ]
For some reason we never set the size for nvmem sysfs binary file.
Set this.Reported-by: Gilles BULOZ
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20211130133909.6154-1-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
Signed-off-by: Sasha Levin
18 Nov, 2021
1 commit
-
- Added the support to invoke the base API(s) offered by
Secure Enclave.
-- Update the read_common_fuses to use the above
common functions.- Updated the base API "read_common_fuses", to take minimum arguments:
-- fuse id, and
-- pointer to the value, to be populated with fuse values.- With the update in the base API "read_common_fuses", function calls
in drivers/nvmem/imx-ocotp-fsb-s400.c, is update.
-- depency on IMX_SENCLAVE_MU is added to drivers/nvmem/KconfigSigned-off-by: Pankaj Gupta
Reviewed-by: Alice Guo
02 Nov, 2021
3 commits
-
According to the FSB words list, the reserved 48 words are ahead of the
bank 5.Reviewed-by: Peng Fan
Signed-off-by: Alice Guo
Acked-by: Jason Liu -
i.MX8ULP nvmem ocotp driver provides the services to access common fuse
through s400 baseline api and fuse status block.Reviewed-by: Ye Li
Signed-off-by: Alice Guo
(cherry picked from commit f221b7e283e86a985956914824b610e3aa8bb1c5) -
There might be chance that after we calculate timing based on the ipg_clk,
but ipg_clk was changed by busfreq which cause fuse prog and shadow
reload not work stable. So let request high bus to let the ipg clk fixed
during the stage programming and reloading.Reviewed-by: Jacky Bai
Signed-off-by: Peng Fan
13 Oct, 2021
1 commit
-
If a cell has 'nbits' equal to a multiple of BITS_PER_BYTE the logic
*p &= GENMASK((cell->nbits%BITS_PER_BYTE) - 1, 0);
will become undefined behavior because nbits modulo BITS_PER_BYTE is 0, and we
subtract one from that making a large number that is then shifted more than the
number of bits that fit into an unsigned long.UBSAN reports this problem:
UBSAN: shift-out-of-bounds in drivers/nvmem/core.c:1386:8
shift exponent 64 is too large for 64-bit type 'unsigned long'
CPU: 6 PID: 7 Comm: kworker/u16:0 Not tainted 5.15.0-rc3+ #9
Hardware name: Google Lazor (rev3+) with KB Backlight (DT)
Workqueue: events_unbound deferred_probe_work_func
Call trace:
dump_backtrace+0x0/0x170
show_stack+0x24/0x30
dump_stack_lvl+0x64/0x7c
dump_stack+0x18/0x38
ubsan_epilogue+0x10/0x54
__ubsan_handle_shift_out_of_bounds+0x180/0x194
__nvmem_cell_read+0x1ec/0x21c
nvmem_cell_read+0x58/0x94
nvmem_cell_read_variable_common+0x4c/0xb0
nvmem_cell_read_variable_le_u32+0x40/0x100
a6xx_gpu_init+0x170/0x2f4
adreno_bind+0x174/0x284
component_bind_all+0xf0/0x264
msm_drm_bind+0x1d8/0x7a0
try_to_bring_up_master+0x164/0x1ac
__component_add+0xbc/0x13c
component_add+0x20/0x2c
dp_display_probe+0x340/0x384
platform_probe+0xc0/0x100
really_probe+0x110/0x304
__driver_probe_device+0xb8/0x120
driver_probe_device+0x4c/0xfc
__device_attach_driver+0xb0/0x128
bus_for_each_drv+0x90/0xdc
__device_attach+0xc8/0x174
device_initial_probe+0x20/0x2c
bus_probe_device+0x40/0xa4
deferred_probe_work_func+0x7c/0xb8
process_one_work+0x128/0x21c
process_scheduled_works+0x40/0x54
worker_thread+0x1ec/0x2a8
kthread+0x138/0x158
ret_from_fork+0x10/0x20Fix it by making sure there are any bits to mask out.
Fixes: 69aba7948cbe ("nvmem: Add a simple NVMEM framework for consumers")
Cc: Douglas Anderson
Cc: stable@vger.kernel.org
Signed-off-by: Stephen Boyd
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20211013124511.18726-1-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
21 Sep, 2021
1 commit
-
The Nintendo Wii and Wii U OTP is only present on Nintendo Wii and Wii U
consoles. Hence add a dependency on WII, to prevent asking the user
about this driver when configuring a kernel without Nintendo Wii and Wii
U console support.Fixes: 3683b761fe3a10ad ("nvmem: nintendo-otp: Add new driver for the Wii and Wii U OTP")
Reviewed-by: Emmanuel Gil Peyrot
Signed-off-by: Geert Uytterhoeven
Link: https://lore.kernel.org/r/01318920709dddc4d85fe895e2083ca0eee234d8.1631611652.git.geert+renesas@glider.be
Signed-off-by: Greg Kroah-Hartman
13 Aug, 2021
1 commit
-
This OTP is read-only and contains various keys used by the console to
decrypt, encrypt or verify various pieces of storage.Its size depends on the console, it is 128 bytes on the Wii and
1024 bytes on the Wii U (split into eight 128 bytes banks).It can be used directly by writing into one register and reading from
the other one, without any additional synchronisation.This driver was written based on reversed documentation, see:
https://wiiubrew.org/wiki/Hardware/OTPTested-by: Jonathan Neuschäfer # on Wii
Tested-by: Emmanuel Gil Peyrot # on Wii U
Signed-off-by: Emmanuel Gil Peyrot
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210810153036.1494-3-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
06 Aug, 2021
3 commits
-
Current error path on failure of validating keepout regions is calling
put_device, eventhough the device is not even registered at that point.Fix this by adding proper error handling of freeing ida and nvmem.
Fixes: fd3bb8f54a88 ("nvmem: core: Add support for keepout regions")
Cc:
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210806085947.22682-5-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
On sc7280, to reliably blow fuses, we need an additional vote
on max performance state of 'MX' power-domain.
Add support for power-domain performance state voting in the
driver.Reviewed-by: Douglas Anderson
Signed-off-by: Rajendra Nayak
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210806085947.22682-4-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
qfprom_disable_fuse_blowing() disables a bunch of resources,
and then does a few register writes in the 'conf' address
space.
It works perhaps because the resources are needed only for the
'raw' register space writes, and that the 'conf' space allows
read/writes regardless.
However that makes the code look confusing, so just move the
register writes before turning off the resources in the
function.Reviewed-by: Douglas Anderson
Signed-off-by: Rajendra Nayak
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210806085947.22682-3-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
06 Jul, 2021
1 commit
-
Pull char / misc driver updates from Greg KH:
"Here is the big set of char / misc and other driver subsystem updates
for 5.14-rc1. Included in here are:- habanalabs driver updates
- fsl-mc driver updates
- comedi driver updates
- fpga driver updates
- extcon driver updates
- interconnect driver updates
- mei driver updates
- nvmem driver updates
- phy driver updates
- pnp driver updates
- soundwire driver updates
- lots of other tiny driver updates for char and misc drivers
This is looking more and more like the "various driver subsystems
mushed together" tree...All of these have been in linux-next for a while with no reported
issues"* tag 'char-misc-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (292 commits)
mcb: Use DEFINE_RES_MEM() helper macro and fix the end address
PNP: moved EXPORT_SYMBOL so that it immediately followed its function/variable
bus: mhi: pci-generic: Add missing 'pci_disable_pcie_error_reporting()' calls
bus: mhi: Wait for M2 state during system resume
bus: mhi: core: Fix power down latency
intel_th: Wait until port is in reset before programming it
intel_th: msu: Make contiguous buffers uncached
intel_th: Remove an unused exit point from intel_th_remove()
stm class: Spelling fix
nitro_enclaves: Set Bus Master for the NE PCI device
misc: ibmasm: Modify matricies to matrices
misc: vmw_vmci: return the correct errno code
siox: Simplify error handling via dev_err_probe()
fpga: machxo2-spi: Address warning about unused variable
lkdtm/heap: Add init_on_alloc tests
selftests/lkdtm: Enable various testable CONFIGs
lkdtm: Add CONFIG hints in errors where possible
lkdtm: Enable DOUBLE_FAULT on all architectures
lkdtm/heap: Add vmalloc linear overflow test
lkdtm/bugs: XFAIL UNALIGNED_LOAD_STORE_WRITE
...
11 Jun, 2021
6 commits
-
'for_each_child_of_node' performs an of_node_get on each iteration, so a
return from the middle of the loop requires an of_node_put.Fixes: e888d445ac33 ("nvmem: resolve cells from DT at registration time")
Cc:
Signed-off-by: Christophe JAILLET
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210611102321.11509-1-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
Added enum and string for FRAM (ferroelectric RAM) to expose it as file
named "fram".
Added documentation of sysfs file.Signed-off-by: Jiri Prchal
Link: https://lore.kernel.org/r/20210611094601.95131-2-jiri.prchal@aksignal.cz
Signed-off-by: Greg Kroah-Hartman -
In review feedback Joe Perches found the existing comment
confusing. Let's use something based on the wording proposed by Joe.Suggested-by: Joe Perches
Signed-off-by: Douglas Anderson
Reviewed-by: Stephen Boyd
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210611083348.20170-10-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
The caller doesn't modify the memory pointed to by the pointer so it
can be const.Suggested-by: Stephen Boyd
Signed-off-by: Douglas Anderson
Reviewed-by: Stephen Boyd
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210611083348.20170-9-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
Fix a missed newline, change an 'if' to 'else if' and update
a comment which is stale after the merge of '5a1bea2a: nvmem:
qfprom: Add support for fuseblowing on sc7280'Signed-off-by: Rajendra Nayak
Reviewed-by: Douglas Anderson
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210611083348.20170-8-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
This device currently reports an "Unknown" type in sysfs.
Since it is an eFuse hardware device, set its type to OTP.Signed-off-by: Samuel Holland
Acked-by: Chen-Yu Tsai
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210611083348.20170-7-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
14 May, 2021
1 commit
-
'ret' is known to be 0 here.
The expected error status is stored in 'status', so use it instead.Also change %d in %u, because status is an u32, not a int.
Fixes: 096030e7f449 ("nvmem: sprd: Add Spreadtrum SoCs eFuse support")
Acked-by: Chunyan Zhang
Signed-off-by: Christophe JAILLET
Link: https://lore.kernel.org/r/5bc44aace2fe7e1c91d8b35c8fe31e7134ceab2c.1620406852.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Greg Kroah-Hartman
10 May, 2021
1 commit
-
Until now, the of_node of the parent device is used. Some devices
provide more than just the nvmem provider. To avoid name space clashes,
add a way to allow specifying the nvmem cells in subnodes. Consider the
following example:flash@0 {
compatible = "jedec,spi-nor";partitions {
compatible = "fixed-partitions";
#address-cells = ;
#size-cells = ;partition@0 {
reg = ;
};
};otp {
compatible = "user-otp";
#address-cells = ;
#size-cells = ;serial-number@0 {
reg = ;
};
};
};There the nvmem provider might be the MTD partition or the OTP region of
the flash.Add a new config->of_node parameter, which if set, will be used instead
of the parent's of_node.Signed-off-by: Michael Walle
Acked-by: Srinivas Kandagatla
Signed-off-by: Miquel Raynal
Link: https://lore.kernel.org/linux-mtd/20210424110608.15748-2-michael@walle.cc
02 Apr, 2021
7 commits
-
Handle the differences across LDO voltage needed for blowing fuses,
and the blow timer value, identified using a minor version of 15
on sc7280.Signed-off-by: Rajendra Nayak
Signed-off-by: Ravi Kumar Bokka
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210330111241.19401-11-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
Fix below error reporte by kernel test robot
rmem.c:(.text+0x14e): undefined reference to memremap
s390x-linux-gnu-ld: rmem.c:(.text+0x1b6): undefined reference to memunmapFixes: 5a3fa75a4d9c ("nvmem: Add driver to expose reserved memory as nvmem")
Reported-by: kernel test robot
Reviewed-by: Nicolas Saenz Julienne
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210330111241.19401-9-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
The shifting of the u8 integer buf[3] by 24 bits to the left will
be promoted to a 32 bit signed int and then sign-extended to a
u64. In the event that the top bit of buf[3] is set then all
then all the upper 32 bits of the u64 end up as also being set
because of the sign-extension. Fix this by casting buf[i] to
a u64 before the shift.Fixes: a28e824fb827 ("nvmem: core: Add functions to make number reading easy")
Reviewed-by: Douglas Anderson
Signed-off-by: Colin Ian King
Signed-off-by: Srinivas Kandagatla
Addresses-Coverity: ("Unintended sign extension")
Link: https://lore.kernel.org/r/20210330111241.19401-8-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
Sometimes the clients of nvmem just want to get a number out of
nvmem. They don't want to think about exactly how many bytes the nvmem
cell took up. They just want the number. Let's make it easy.In general this concept is useful because nvmem space is precious and
usually the fewest bits are allocated that will hold a given value on
a given system. However, even though small numbers might be fine on
one system that doesn't mean that logically the number couldn't be
bigger. Imagine nvmem containing a max frequency for a component. On
one system perhaps that fits in 16 bits. On another system it might
fit in 32 bits. The code reading this number doesn't care--it just
wants the number.We'll provide two functions: nvmem_cell_read_variable_le_u32() and
nvmem_cell_read_variable_le_u64().Comparing these to the existing functions like nvmem_cell_read_u32():
* These new functions have no problems if the value was stored in
nvmem in fewer bytes. It's OK to use these function as long as the
value stored will fit in 32-bits (or 64-bits).
* These functions avoid problems that the earlier APIs had with bit
offsets. For instance, you can't use nvmem_cell_read_u32() to read a
value has nbits=32 and bit_offset=4 because the nvmem cell must be
at least 5 bytes big to hold this value. The new API accounts for
this and works fine.
* These functions make it very explicit that they assume that the
number was stored in little endian format. The old functions made
this assumption whenever bit_offset was non-zero (see
nvmem_shift_read_buffer_in_place()) but didn't whenever the
bit_offset was zero.NOTE: it's assumed that we don't need an 8-bit or 16-bit version of
this function. The 32-bit version of the function can be used to read
8-bit or 16-bit data.At the moment, I'm only adding the "unsigned" versions of these
functions, but if it ends up being useful someone could add a "signed"
version that did 2's complement sign extension.At the moment, I'm only adding the "little endian" versions of these
functions. Adding the "big endian" version would require adding "big
endian" support to nvmem_shift_read_buffer_in_place().Signed-off-by: Douglas Anderson
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210330111241.19401-7-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
This driver provides access to Broadcom's NVRAM.
Signed-off-by: Rafał Miłecki
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210330111241.19401-6-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
QFPROM controller hardware requires 1.8V min for fuse blowing.
So, this change sets the voltage to 1.8V, required to blow the fuse
for qfprom-efuse controller.To disable fuse blowing, we set the voltage to 0V since this may
be a shared rail and may be able to run at a lower rate when we're
not blowing fuses.Fixes: 93b4e49f8c86 ("nvmem: qfprom: Add fuse blowing support")
Reported-by: Douglas Anderson
Suggested-by: Douglas Anderson
Reviewed-by: Douglas Anderson
Signed-off-by: Ravi Kumar Bokka
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210330111241.19401-4-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
Replace a comma between expression statements by a semicolon.
Reviewed-by: Bjorn Andersson
Signed-off-by: Zheng Yongjun
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210330111241.19401-3-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
05 Feb, 2021
6 commits
-
"sdam->pdev" is uninitialized and it is used to print error logs.
Fix it. Since device pointer can be used from sdam_config, use it
directly thereby removing pdev pointer.Fixes: 40ce9798794f ("nvmem: add QTI SDAM driver")
Cc: stable@vger.kernel.org
Signed-off-by: Subbaraman Narayanamurthy
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210205100853.32372-3-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
s/drivers/driver/ as the configuration selects a single driver.
Suggested-by: Randy Dunlap
Acked-by: Randy Dunlap
Signed-off-by: Nicolas Saenz Julienne
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210205100853.32372-2-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
The nvmem cell binding applies to all eeprom child nodes matching
"^.*@[0-9a-f]+$" without taking a compatible into account.Linux drivers, like at24, are even more extensive and assume
_all_ at24 eeprom child nodes to be nvmem cells since e888d445ac33
("nvmem: resolve cells from DT at registration time").Since df5f3b6f5357 ("dt-bindings: nvmem: stm32: new property for
data access"), the additionalProperties: True means it's Ok to have
other properties as long as they don't match "^.*@[0-9a-f]+$".The barebox bootloader extends the MTD partitions binding to
EEPROM and can fix up following device tree node:&eeprom {
partitions {
compatible = "fixed-partitions";
};
};This is allowed binding-wise, but drivers using nvmem_register()
like at24 will fail to parse because the function expects all child
nodes to have a reg property present. This results in the whole
EEPROM driver probe failing despite the device tree being correct.Fix this by skipping nodes lacking a reg property instead of
returning an error. This effectively makes the drivers adhere
to the binding because all nodes with a unit address must have
a reg property and vice versa.Fixes: e888d445ac33 ("nvmem: resolve cells from DT at registration time").
Signed-off-by: Ahmad Fatoum
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210129171430.11328-6-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
Firmware/co-processors might use reserved memory areas in order to pass
data stemming from an nvmem device otherwise non accessible to Linux.
For example an EEPROM memory only physically accessible to firmware, or
data only accessible early at boot time.In order to expose this data to other drivers and user-space, the driver
models the reserved memory area as an nvmem device.Tested-by: Tim Gover
Reviewed-by: Rob Herring
Signed-off-by: Nicolas Saenz Julienne
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210129171430.11328-5-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
The retrieval of driver data via of_device_get_match_data() can make
the code simpler.Use of_device_get_match_data() to simplify the code.
Signed-off-by: Fabio Estevam
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210129171430.11328-3-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
This doesn't call of_node_put() on the error path so it leads to a
memory leak.Fixes: 0749aa25af82 ("nvmem: core: fix regression in of_nvmem_cell_get()")
Signed-off-by: Dan Carpenter
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20210129171430.11328-2-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
27 Nov, 2020
2 commits
-
When offset is not 4 bytes aligned, directly shift righty by 2 bits
will cause reading out wrong data. Since imx ocotp only supports
4 bytes reading once, we need handle offset is not 4 bytes aligned
and enlarge the bytes to 4 bytes aligned. After reading finished,
copy the needed data from buffer to caller and free buffer.Signed-off-by: Peng Fan
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20201127102837.19366-6-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman -
Some fuse ranges are protected by the XPU such that the AP cannot
access them. Attempting to do so causes an SError. Use the newly
introduced per-soc compatible string, and the newly introduced
nvmem keepout support to attach the set of regions
we should not access.Reviewed-by: Douglas Anderson
Signed-off-by: Evan Green
Signed-off-by: Srinivas Kandagatla
Link: https://lore.kernel.org/r/20201127102837.19366-5-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman
