21 Mar, 2016
1 commit
-
Pull ARM SoC non-urgent fixes from Arnd Bergmann:
"As usual, we queue up a few fixes that don't seem urgent enough to go
in through -rc.- a number of randconfig warning fixes from Arnd
- various small fixes for OMAP
- one somewhat larger patch to restore the OMAP3 cpuidle tuning that
was lost in a cleanup
- a small regression fix for cns3xxx PCI"* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
CNS3xxx: Fix PCI cns3xxx_write_config()
MAINTAINERS: unify email addrs for Kevin Hilman
CNS3xxx: remove unused *_VIRT definitions
ARM: OMAP2+: Fix hwmod clock for l4_ls
soc: TI knav_qmss: fix dma_addr_t printing
ARM: prima2: always enable reset controller
ARM: socfpga: hide unused functions
ARM: ux500: fix ureachable iounmap()
ARM: ks8695: fix __initdata annotation
ARM: mvebu: mark mvebu_hwcc_pci_nb as __maybe_unused
ARM: mv78xx0: avoid unused function warning
ARM: orion: only select I2C_BOARDINFO when using I2C
ARM: OMAP2+: Fix out of range register access with syscon_config.max_register
ARM: OMAP3: Add cpuidle parameters table for omap3430
ARM: davinci: make I2C support optional
ARM: davinci: DA8xx+DMx combined kernels need PATCH_PHYS_VIRT
ARM: davinci: avoid unused mityomapl138_pn_info variable
ARM: davinci: limit DT support to DA850
ARM: DRA7: hwmod: Add reset data for PCIe
ARM: DRA7: hwmod: Fix OCP2SCP sysconfig
...
27 Feb, 2016
1 commit
-
The cpu_die and cpu_kill callbacks are only used when CONFIG_HOTPLUG_CPU
is enabled, otherwise we get a warning about them:arch/arm/mach-socfpga/platsmp.c:102:13: error: 'socfpga_cpu_die' defined but not used [-Werror=unused-function]
arch/arm/mach-socfpga/platsmp.c:115:12: error: 'socfpga_cpu_kill' defined but not used [-Werror=unused-function]This adds the appropriate #ifdef.
Signed-off-by: Arnd Bergmann
Acked-by: Dinh Nguyen
11 Feb, 2016
2 commits
-
Enable ECC for On-Chip RAM on machine startup. The ECC has to be enabled
before data is stored in memory otherwise the ECC will fail on reads.Signed-off-by: Thor Thayer
Acked-by: Dinh Nguyen
Cc: devicetree@vger.kernel.org
Cc: dougthompson@xmission.com
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-doc@vger.kernel.org
Cc: linux-edac
Cc: mark.rutland@arm.com
Cc: m.chehab@samsung.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: Russell King
Cc: tthayer.linux@gmail.com
Cc: tthayer@opensource.altera.com
Link: http://lkml.kernel.org/r/1455132384-17108-4-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov -
Enable ECC for L2 cache on machine startup. The ECC has to be enabled
before data is stored in memory otherwise the ECC will fail on reads.Signed-off-by: Thor Thayer
Acked-by: Dinh Nguyen
Cc: devicetree@vger.kernel.org
Cc: galak@codeaurora.org
Cc: grant.likely@linaro.org
Cc: ijc+devicetree@hellion.org.uk
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux@arm.linux.org.uk
Cc: linux-doc@vger.kernel.org
Cc: linux-edac
Cc: mark.rutland@arm.com
Cc: m.chehab@samsung.com
Cc: pawel.moll@arm.com
Cc: robh+dt@kernel.org
Cc: Russell King
Link: http://lkml.kernel.org/r/1455132384-17108-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov
02 Dec, 2015
2 commits
-
Many ARM sub-architectures use prompts followed by "if" conditional,
but it is wrong.Please notice the difference between
config ARCH_FOO
bool "Foo SoCs" if ARCH_MULTI_V7and
config ARCH_FOO
bool "Foo SoCs"
depends on ARCH_MULTI_V7These two are *not* equivalent!
In the former statement, it is not ARCH_FOO, but its prompt that
depends on ARCH_MULTI_V7. So, it is completely valid that ARCH_FOO
is selected by another, but ARCH_MULTI_V7 is still disabled. As it is
not unmet dependency, Kconfig never warns. This is probably not what
you want.The former should be used only when you need to do so, and you really
understand what you are doing. (In most cases, it should be wrong!)For enabling/disabling sub-architectures, the latter is always correct.
As a good side effect, this commit fixes some entries over 80 columns
(mach-imx, mach-integrator, mach-mbevu).[Arnd: I note that there is not really a bug here, according to
the discussion that followed, but I can see value in being consistent
and in making the lines shorter]Signed-off-by: Masahiro Yamada
Acked-by: Maxime Ripard
Acked-by: Nicolas Ferre
Acked-by: Heiko Stuebner
Acked-by: Patrice Chotard
Acked-by: Liviu Dudau
Acked-by: Krzysztof Kozlowski
Acked-by: Jun Nie
Acked-by: Matthias Brugger
Acked-by: Simon Horman
Acked-by: Gregory CLEMENT
Acked-by: Shawn Guo
Acked-by: Sebastian Hesselbarth
Acked-by: Thierry Reding
Acked-by: Krzysztof Halasa
Acked-by: Maxime Coquelin
Signed-off-by: Arnd Bergmann -
These smp_operations structures are not over-written, so add "const"
qualifier and replace __initdata with __initconst.Also, add "static" where it is possible.
Signed-off-by: Masahiro Yamada
Acked-by: Krzysztof Kozlowski
Acked-by: Maxime Ripard
Acked-by: Moritz Fischer
Acked-by: Stephen Boyd # qcom part
Acked-by: Viresh Kumar
Acked-by: Patrice Chotard
Acked-by: Heiko Stuebner
Acked-by: Wei Xu
Acked-by: Florian Fainelli
Acked-by: Sebastian Hesselbarth
Acked-by: Gregory CLEMENT
Acked-by: Shawn Guo
Acked-by: Matthias Brugger
Acked-by: Thierry Reding
Acked-by: Nicolas Pitre
Acked-by: Liviu Dudau
Acked-by: Linus Walleij
Signed-off-by: Arnd Bergmann
05 Sep, 2015
1 commit
-
This change modifies gen_pool_get() and devm_gen_pool_create() client
interfaces adding one more argument "name" of a gen_pool object.Due to implementation gen_pool_get() is capable to retrieve only one
gen_pool associated with a device even if multiple gen_pools are created,
fortunately right at the moment it is sufficient for the clients, hence
provide NULL as a valid argument on both producer devm_gen_pool_create()
and consumer gen_pool_get() sides.Because only one created gen_pool per device is addressable, explicitly
add a restriction to devm_gen_pool_create() to create only one gen_pool
per device, this implies two possible error codes returned by the
function, account it on client side (only misc/sram). This completes
client side changes related to genalloc updates.[akpm@linux-foundation.org: gen_pool_get() cleanup]
Signed-off-by: Vladimir Zapolskiy
Cc: Philipp Zabel
Cc: Greg Kroah-Hartman
Cc: Russell King
Cc: Nicolas Ferre
Cc: Alexandre Belloni
Cc: Jean-Christophe Plagniol-Villard
Cc: Shawn Guo
Cc: Sascha Hauer
Cc: Mauro Carvalho Chehab
Cc: Arnd Bergmann
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
21 Jul, 2015
1 commit
-
Since the Arria10's reset register offset is different from the Cyclone/Arria 5,
it's best to add a new DT_MACHINE_START() for the Arria10.Signed-off-by: Dinh Nguyen
---
v2: use altera_a10_dt_match for the A10 machine desc
08 Jul, 2015
1 commit
-
Kexec_load syscall in ARM requires that machine-specific code
has the smp_ops.cpu_kill() before loading kernel image.
This patch adds the cpu_kill(), as a result, kexec reboot and
kernel crash dump become available in mach-socfpga.Signed-off-by: Hiraku Toyooka
Cc: Dinh Nguyen
Cc: Russell King
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Link: http://lists.infradead.org/pipermail/linux-arm-kernel/2015-June/348004.html
Signed-off-by: Dinh Nguyen
01 Jul, 2015
1 commit
-
To be consistent with other genalloc interface namings, rename
dev_get_gen_pool() to gen_pool_get(). The original omitted "dev_" prefix
is removed, since it points to argument type of the function, and so it
does not bring any useful information.[akpm@linux-foundation.org: update arch/arm/mach-socfpga/pm.c]
Signed-off-by: Vladimir Zapolskiy
Acked-by: Nicolas Ferre
Cc: Philipp Zabel
Cc: Shawn Guo
Cc: Sascha Hauer
Cc: Alexandre Belloni
Cc: Russell King
Cc: Mauro Carvalho Chehab
Cc: Vinod Koul
Cc: Takashi Iwai
Cc: Jaroslav Kysela
Cc: Mark Brown
Cc: Nicolas Ferre
Cc: Alan Tull
Cc: Dinh Nguyen
Cc: Kevin Hilman
Cc: Stephen Rothwell
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
27 Jun, 2015
1 commit
-
Pull ARM SoC platform support updates from Kevin Hilman:
"Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC"* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
ARM: zx: Add basic defconfig support for ZX296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
dt-bindings: Add #defines for ZTE ZX296702 clocks
ARM: socfpga: fix build error due to secondary_startup
MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
ARM: ep93xx: simone: support for SPI-based MMC/SD cards
MAINTAINERS: update Shawn's email to use kernel.org one
ARM: socfpga: support suspend to ram
ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
ARM: EXYNOS: register power domain driver from core_initcall
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
ARM: SAMSUNG: Constify platform_device_id
ARM: EXYNOS: Constify irq_domain_ops
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
ARM: EXYNOS: add exynos_get_boot_addr() helper
ARM: EXYNOS: add exynos_set_boot_addr() helper
ARM: EXYNOS: make exynos_core_restart() less verbose
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
...
12 Jun, 2015
1 commit
-
After commit 02b4e2756e01 (ARM: v7 setup function should invalidate L1
cache) the soc specific secondary_startup is removed, causing build
failures:../arch/arm/mach-socfpga/platsmp.c: In function 'socfpga_a10_boot_secondary':
../arch/arm/mach-socfpga/platsmp.c:66:140: error: 'socfpga_secondary_startup' undeclared (first use in this function)
../arch/arm/mach-socfpga/platsmp.c:66:140: note: each undeclared identifier is reported only once for each function it appears inTo fix, use the generic secondary_startup.
Cc: Dinh Nguyen
Signed-off-by: Kevin Hilman
11 Jun, 2015
3 commits
-
Add code that requests that the sdr controller go into
self-refresh mode. This code is run from ocram.Suspend-to-RAM and EDAC support are mutually exclusive on
SOCFPGA. If the EDAC is enabled, it will prevent the
platform from going into suspend.Example of how to request to suspend to ram:
$ echo enabled > \
/sys/devices/soc/ffc02000.serial0/tty/ttyS0/power/wakeup$ echo -n mem > /sys/power/state
Signed-off-by: Alan Tull
Signed-off-by: Dinh Nguyen
Signed-off-by: Kevin Hilman -
Add boot_secondary implementation for the Arria10 platform. Bringing up
the secondary core on the Arria 10 platform is pretty similar to the
Cyclone/Arria 5 platform, with the exception of the following differences:- Register offset to bringup CPU1 out of reset is different.
- The cpu1-start-addr for Arria10 contains an additional nibble.Signed-off-by: Dinh Nguyen
Signed-off-by: Kevin Hilman -
Convert cyclone5/arria5 to use CPU_METHOD_OF_DECLARE for smp operations.
Signed-off-by: Dinh Nguyen
Signed-off-by: Kevin Hilman
01 Jun, 2015
1 commit
-
All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU. This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state. Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.Reviewed-by: Florian Fainelli
Tested-by: Florian Fainelli
Tested-by: Heiko Stuebner
Tested-by: Dinh Nguyen
Acked-by: Sebastian Hesselbarth
Tested-by: Sebastian Hesselbarth
Acked-by: Shawn Guo
Tested-by: Thierry Reding
Acked-by: Thierry Reding
Tested-by: Geert Uytterhoeven
Tested-by: Michal Simek
Tested-by: Wei Xu
Signed-off-by: Russell King
13 May, 2015
1 commit
-
Use of_iomap to map the "arm,cortex-a9-scu". By doing this, we can remove
map_io in socfpga.c.Also, we can remove socfpga_smp_init_cpus, as arm_dt_init_cpu_maps is
already doing the CPU mapping.Signed-off-by: Dinh Nguyen
12 May, 2015
3 commits
-
All the necessary debug uart mapping is already being done in
debug_ll_io_init, there's no need for it here.Signed-off-by: Dinh Nguyen
-
Now the debug and platsmp.S are fixed for big endian, the
architecture can now advertise big endian support.Signed-off-by: Ben Dooks
Signed-off-by: Dinh Nguyen -
Update the secondary code to allow the secondary boot to work when the
system is running big endian.Signed-off-by: Ben Dooks
Signed-off-by: Dinh Nguyen
05 Mar, 2015
2 commits
-
Make sure socfpga_cpu1start_addr is properly flushed from it's cache line so
that secondary cpu's can see it.Signed-off-by: Russell King
Tested-by: Steffen Trumtrar
Signed-off-by: Dinh Nguyen -
Correct SCU virtual mapping that was causing this BUG message:
"BUG: mapping for 0xfffec000 at 0xfffec000 out of vmalloc space"
Signed-off-by: Vince Bridgers
Signed-off-by: Dinh Nguyen
21 Nov, 2014
1 commit
-
Use WFI when putting CPU1 to sleep. Don't hold CPU1 in reset
since that results in increased power consumption.Reset CPU1 briefly during CPU1 bootup.
This has been tested for hotplug and suspend/resume and results
in no increased power consumption.Signed-off-by: Alan Tull
Acked-by: Pavel Machek
Signed-off-by: Dinh Nguyen
Signed-off-by: Arnd Bergmann
22 Oct, 2014
1 commit
-
When CPU1 is brought out of reset, it's MMU is not turned on yet, so it will
only be able to use physical addresses. For systems with that have the
MMU page configured for 0xC0000000, 0x80000000, or 0x40000000
"BIC 0x40000000" will work just fine, as it was just converting the
virtual address of &cpu1start_addr into a physical address, ie. 0xC0000000
became 0x80000000. So for systems where the SDRAM controller was able to do a
wrap-around access, this was working fine, as it was just dropping the MSB,
but for systems where out of bounds memory access is not allowed, this would
not allow CPU1 to correctly fetch &cpu1start_addr.This patch fixes the secondary_trampoline code to correctly fetch the
physical address of cpu1start_addr directly. The patch will subtract the
correct PAGE_OFFSET from &cpu1start_addr. And since on this platform, the
physical memory will always start at 0x0, subtracting PAGE_OFFSET from
&cpu1start_addr will allow CPU1 to correctly fetch the value of cpu1start_addr.While at it, change the name of cpu1start_addr to socfpga_cpu1start_addr
to avoid any future naming collisions for multiplatform image.Signed-off-by: Dinh Nguyen
---
v4: Updated commit log to correctly lay out the usage of PAGE_OFFSET and
add comments to the same effect.
v3: Used PAGE_OFFSET to get the physical address
v2: Correctly get the physical address instead of just a BIC hack.
30 May, 2014
1 commit
-
Remove the explicit call to l2x0_of_init(), converting to the generic
infrastructure instead.Signed-off-by: Russell King
22 May, 2014
1 commit
-
They're u32, they're not unsigned long. The UL suffix is not required
here.Acked-by: Shawn Guo
Signed-off-by: Russell King
06 Apr, 2014
1 commit
-
Pull clock framework changes from Mike Turquette:
"The clock framework changes for 3.15 look similar to past pull
requests. Mostly clock driver updates, more Device Tree support in
the form of common functions useful across platforms and a handful of
features and fixes to the framework core"* tag 'clk-for-linus-3.15' of git://git.linaro.org/people/mike.turquette/linux: (86 commits)
clk: shmobile: fix setting paretn clock rate
clk: shmobile: rcar-gen2: fix lb/sd0/sd1/sdh clock parent to pll1
clk: Fix minor errors in of_clk_init() function comments
clk: reverse default clk provider initialization order in of_clk_init()
clk: sirf: update copyright years to 2014
clk: mmp: try to use closer one when do round rate
clk: mmp: fix the wrong calculation formula
clk: mmp: fix wrong mask when calculate denominator
clk: st: Adds quadfs clock binding
clk: st: Adds clockgen-vcc and clockgen-mux clock binding
clk: st: Adds clockgen clock binding
clk: st: Adds divmux and prediv clock binding
clk: st: Support for A9 MUX clocks
clk: st: Support for ClockGenA9/DDR/GPU
clk: st: Support for QUADFS inside ClockGenB/C/D/E/F
clk: st: Support for VCC-mux and MUX clocks
clk: st: Support for PLLs inside ClockGenA(s)
clk: st: Support for DIVMUX and PreDiv Clocks
clk: support hardware-specific debugfs entries
clk: s2mps11: Use of_get_child_by_name
...
20 Feb, 2014
2 commits
-
All V7 platforms can run SMP kernels, so make CONFIG_SMP visible for V7
multi-platform builds.Signed-off-by: Rob Herring
Acked-by: Stephen Warren
Acked-by: Arnd Bergmann -
Multi-platform requires various kconfig options to be selected, so
platforms don't need to select them individually.Signed-off-by: Rob Herring
Acked-by: Linus Walleij
Cc: Russell King
Acked-by: Stephen Warren
Tested-by: Stephen Warren
Acked-by: Arnd Bergmann
19 Feb, 2014
2 commits
-
The only thing that socfpga_init_clocks was doing is setting up the smp_twd clk.
Now that twd-timer's clock phandle is populated in the DTS, we can remove
this function.Signed-off-by: Dinh Nguyen
Acked-by: Arnd Bergmann -
The clk manager's base address was being mapped in SOCFPGA's arch code and
being extern'ed out to the clock driver. This method is not correct, and the
arch code was not really doing anything with that clk manager anyways.This patch moves the mapping of the clk manager's base address in the clock
driver itself. Cleans up CLK_OF_DECLARE() into a single registration of all
the clocks.Suggested-by: Arnd Bergmann
Signed-off-by: Dinh Nguyen
Acked-by: Arnd Bergmann
---
v2: Use a static declaration for the clk_mgr_base_addr. Clean up the
CLK_OF_DECLARE() as suggested by Arnd.
04 Dec, 2013
1 commit
-
Update Kconfig to enable TWD.
Signed-off-by: Dinh Nguyen
Reviewed-by: Pavel Machek
Signed-off-by: Olof Johansson
08 Oct, 2013
1 commit
-
CLKDEV_LOOKUP selects HAVE_CLK and COMMON_CLK selects CLKDEV_LOOKUP. So
all symbols that select at least two of these symbols can be simplified.For imx, omap2 and ux500 some rearrangements were necessary before the
simplification.Acked-by: Tony Lindgren
Acked-by: Stephen Boyd
Acked-by: Dinh Nguyen
Acked-by: Nicolas Ferre
Acked-by: Pawel Moll
Acked-by: Linus Walleij
Signed-off-by: Uwe Kleine-König
Signed-off-by: Olof Johansson
30 Sep, 2013
2 commits
-
With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks.Signed-off-by: Sebastian Hesselbarth
Acked-by: Dinh Nguyen -
Current socfpga board init calls of_clk_init() from .machine_init. To
allow consolidation of DT driven .time_init, move of_clock_init() to
a temporary .time_init that will be removed when arch-wide callback is
available.Signed-off-by: Sebastian Hesselbarth
Acked-by: Dinh Nguyen
15 Jul, 2013
1 commit
-
The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications. For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out. Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings. In any case, they are temporary and harmless.This removes all the ARM uses of the __cpuinit macros from C code,
and all __CPUINIT from assembly code. It also had two ".previous"
section statements that were paired off against __CPUINIT
(aka .section ".cpuinit.text") that also get removed here.[1] https://lkml.org/lkml/2013/5/20/589
Cc: Russell King
Cc: Will Deacon
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Paul Gortmaker
10 Jul, 2013
1 commit
-
Preparing to move the parsing of reboot= to generic kernel code forces
the change in reboot_mode handling to use the enum.[akpm@linux-foundation.org: fix arch/arm/mach-socfpga/socfpga.c]
Signed-off-by: Robin Holt
Cc: Russell King
Cc: Russ Anderson
Cc: Robin Holt
Cc: H. Peter Anvin
Cc: Guan Xuetao
Acked-by: Russell King
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
21 Jun, 2013
1 commit
-
…it/mmind/linux-rockchip into next/soc
From Heiko Stuebner:
Adds basic support for Rockchip Cortex-A9 SoCs.
* tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm: add basic support for Rockchip RK3066a boards
arm: add debug uarts for rockchip rk29xx and rk3xxx series
arm: Add basic clocks for Rockchip rk3066a SoCs
clocksource: dw_apb_timer_of: use clocksource_of_init
clocksource: dw_apb_timer_of: select DW_APB_TIMER
clocksource: dw_apb_timer_of: add clock-handling
clocksource: dw_apb_timer_of: enable the use the clocksource as sched clockSigned-off-by: Arnd Bergmann <arnd@arndb.de>
12 Jun, 2013
2 commits
-
dw_apb_timer_init used to search the devicetree for matching timer
devices, making calls to it from board files necessary.Change the dw_apb_timer_init to work with CLOCKSOURCE_OF_DECLARE.
With this change the function gets called once for each timer node
and tracks these number of calls to attach clockevent and clocksource
devices to the nodes.Also remove the calls to dw_apb_timer_init from all previous users, as
clocksource_of_init is the default for init_time now.Tested on the upcoming rk3066 code.
Signed-off-by: Heiko Stuebner
Acked-by: Rob Herring
Acked-by: Arnd Bergmann
Acked-by: Jamie Iles
Acked-by: Dinh Nguyen -
dw_apb_timer_of is the driver part facing devicetree platforms and
calls into dw_apb_timer with the data gathered from the dt.Currently the two platforms using the dw_apb_timer_of select both
the options for the core timer and the dt addon.As dw_apb_timer_of always depends on dw_apb_timer let it select
DW_APB_TIMER itself without the need for every platform to do it.Signed-off-by: Heiko Stuebner
Acked-by: Jamie Iles
Acked-by: Dinh Nguyen
