05 Sep, 2017
2 commits
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Allwinner V3s has a DMA engine similar to the ones from A31, but with
fewer channels and DRQs.Add support for it.
Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
Acked-by: Rob Herring
Signed-off-by: Vinod Koul -
Originally we enable a special gate bit when the compatible indicates
A23/33.But according to BSP sources and user manuals, more SoCs will need this
gate bit.So make it a common quirk configured in the config struct.
Signed-off-by: Icenowy Zheng
Reviewed-by: Chen-Yu Tsai
Signed-off-by: Vinod Koul
14 Nov, 2016
1 commit
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dma_pool_alloc does not initialize the value of the newly allocated
block for the v_lli, and the uninitilize value make the tests failed
which is on pine64 with dmatest.
we can fix it just change the "|=" to "=" for the v_lli->cfg.Signed-off-by: Hao Zhang
Acked-by: Maxime Ripard
Signed-off-by: Vinod Koul
27 Sep, 2016
1 commit
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The A83T SoC has the same dma engine as the A31 (sun6i), with a reduced
amount of endpoints and physical channels.Signed-off-by: Jean-Francois Moine
Acked-by: Maxime Ripard
Signed-off-by: Vinod Koul
22 Jun, 2016
1 commit
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There is no point in calculating the residue if state does not
exist to store the value.Signed-off-by: Peter Griffin
Signed-off-by: Vinod Koul
02 May, 2016
3 commits
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DMA cyclic transfers are required by audio streaming.
Acked-by: Maxime Ripard
Signed-off-by: Jean-Francois Moine
Signed-off-by: Vinod Koul -
The transfer direction is now checked in set_config.
There is no need to check it twice.Signed-off-by: Jean-Francois Moine
Signed-off-by: Vinod Koul -
Some DMA clients, as audio, don't set the maxburst size and bus width
on the memory side when starting DMA transfers.
This patch prevents such transfers to be aborted by providing system
default values to the lacking ones.Signed-off-by: Jean-Francois Moine
Signed-off-by: Vinod Koul
26 Apr, 2016
3 commits
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Checking the DMA config before setting the lli list avoids to do tests
inside the setting loop.Signed-off-by: Jean-Francois Moine
Signed-off-by: Vinod Koul -
In the commit 1f9cd915b64bb95f ("dmaengine: sun6i: Fix memcpy operation"),
the signed values returned by convert_burst() and convert_buswidth()
were stored in an unsigned value.
Then, these values were considered as errors when non null.As a result, DMA transfers were rejected when the burst or buswidth
had values different from 1, as 8 for the burst or 4 for the bus width.Acked-by: Maxime Ripard
Signed-off-by: Jean-Francois Moine
Signed-off-by: Vinod Koul -
The IRQ register number is computed, but this number was not used
and the register was the one indexed by the channel index instead.
Then, only the first DMA channel was working.Acked-by: Maxime Ripard
Signed-off-by: Jean-Francois Moine
Signed-off-by: Vinod Koul
01 Oct, 2015
1 commit
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This platform driver has a OF device ID table but the OF module
alias information is not created so module autoloading won't work.Signed-off-by: Luis de Bethencourt
Acked-by: Maxime Ripard
Signed-off-by: Vinod Koul
05 Aug, 2015
1 commit
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Most drivers need to set constraints on the buffer alignment for async tx
operations. However, even though it is documented, some drivers either use
a defined constant that is not matching what the alignment variable expects
(like DMA_BUSWIDTH_* constants) or fill the alignment in bytes instead of
power of two.Add a new enum for these alignments that matches what the framework
expects, and convert the drivers to it.Signed-off-by: Maxime Ripard
Signed-off-by: Vinod Koul
08 May, 2015
1 commit
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The H3 SoC has the same dma engine as the A31 (sun6i), with a
reduced amount of endpoints and physical channels. Add the proper
config data and compatible string to support it.Signed-off-by: Jens Kuske
Acked-by: Maxime Ripard
Signed-off-by: Vinod Koul
19 Mar, 2015
3 commits
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Now that device_alloc_chan_resources handler in not mandatory, remove dummy
implementationsAcked-by: Maxime Ripard
Signed-off-by: Vinod Koul -
of_device_id is always used as const.
(See driver.of_match_table and open firmware functions)Signed-off-by: Fabian Frederick
Signed-off-by: Vinod Koul
22 Dec, 2014
2 commits
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Now that the generic slave caps code can make use of the device assigned
capabilities, instead of relying on a callback to be implemented.Make use of this code.
Signed-off-by: Maxime Ripard
Signed-off-by: Vinod Koul -
Split the device_control callback of the Allwinner A31 DMA driver to make use
of the newly introduced callbacks, that will eventually be used to retrieve
slave capabilities.Signed-off-by: Maxime Ripard
Signed-off-by: Vinod Koul
13 Dec, 2014
1 commit
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Pull dmaengine updates from Vinod Koul:
"Main features this time are:- BAM v1.3.0 support form qcom bam dma
- support for Allwinner sun8i dma
- atmels eXtended DMA Controller driver
- chancnt cleanup by Maxime
- fixes spread over drivers"* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (56 commits)
dmaenegine: Delete a check before free_percpu()
dmaengine: ioatdma: fix dma mapping errors
dma: cppi41: add a delay while setting the TD bit
dma: cppi41: wait longer for the HW to return the descriptor
dmaengine: fsl-edma: fixup reg offset and hw S/G support in big-endian model
dmaengine: fsl-edma: fix calculation of remaining bytes
drivers/dma/pch_dma: declare pch_dma_id_table as static
dmaengine: ste_dma40: fix error return code
dma: imx-sdma: clarify about firmware not found error
Documentation: devicetree: Fix Xilinx VDMA specification
dmaengine: pl330: update author info
dmaengine: clarify the issue_pending expectations
dmaengine: at_xdmac: Add DMA_PRIVATE
ARM: dts: at_xdmac: fix bad value of dma-cells in documentation
dmaengine: at_xdmac: fix missing spin_unlock
dmaengine: at_xdmac: fix a bug in transfer residue computation
dmaengine: at_xdmac: fix software lockup at_xdmac_tx_status()
dmaengine: at_xdmac: remove chancnt affectation
dmaengine: at_xdmac: prefer usage of readl/writel_relaxed
dmaengine: xdmac: fix print warning on dma_addr_t variable
...
17 Nov, 2014
2 commits
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The A23 SoC has the same dma engine as the A31 (sun6i), with a
reduced amount of endpoints and physical channels. Add the proper
config data and compatible string to support it.A slight difference in sun8i is an undocumented register needs
to be toggled for dma to function.Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Signed-off-by: Vinod Koul -
This patch adds support for hardware parameters tied to compatible
strings, so similar hardware can reuse the driver.Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Signed-off-by: Vinod Koul
12 Nov, 2014
1 commit
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The prep_memcpy call was not setting any meaningful burst and width because it
was relying on the dma_slave_config was not set already.Rework the needed conversion functions, and hardcode the width and burst to
use.Signed-off-by: Maxime Ripard
Cc: stable@vger.kernel.org
Signed-off-by: Vinod Koul
06 Nov, 2014
1 commit
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chanctnt is already filled by dma_async_device_register, which uses the channel
list to know how much channels there is.Since it's already filled, we can safely remove it from the drivers' probe
function.Signed-off-by: Maxime Ripard
Signed-off-by: Vinod Koul
24 Sep, 2014
1 commit
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The sun6i DMA controller requires the AHB1 bus clock to be
clocked from PLL6. This was originally done by the dmaengine
driver during probe time. The AHB1 clock driver has since been
unified, so the original code does not work.Remove the clk muxing code, and replace it with DT clk default
properties.Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Signed-off-by: Vinod Koul
30 Jul, 2014
3 commits
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The sun6i_dma_prep_memcpy and sun6i_dma_prep_slave_sg functions were both
leaking the descriptor they allocated if an error was happening after a
successful dma_pool_alloc call.It also fixes a memleak that was happening in the scatter gather list
traversal, that was allocating as much descriptor as there was scatter gather
items, but only freeing the current descriptor if an error was to arise.Reported-by: Dan Carpenter
Signed-off-by: Maxime Ripard
Signed-off-by: Vinod Koul -
There's still a small window between the call to sun6i_kill_tasklet and the end
of the driver remove function where a spurious interrupt might trigger, and
start using deallocated resources.Replace the call to synchronize_irq by a free_irq, so that we're sure that we
won't get any further interrupts when we're deallocating resources.Signed-off-by: Maxime Ripard
Signed-off-by: Vinod Koul -
Since the conversion routine is quite trivial, we don't need this switch, and
we can just use a simple calculation.Signed-off-by: Maxime Ripard
Signed-off-by: Vinod Koul
28 Jul, 2014
2 commits
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The sg_dma_len() returns unsigned int but we had driver print it as %zu, use
%u as documented in Documentation/printk-formats.txtdrivers/dma/sun6i-dma.c: In function ‘sun6i_dma_prep_slave_sg’:
drivers/dma/sun6i-dma.c:643: warning: format ‘%zu’ expects type ‘size_t’,
but argument 8 has type ‘unsigned int’
drivers/dma/sun6i-dma.c:661: warning: format ‘%zu’ expects type ‘size_t’,
but argument 8 has type ‘unsigned int’Reported-by: kbuild test robot
Signed-off-by: Vinod Koul -
Since the driver defined COMPILE_TEST, it gets compiled for different arch's
The driver uses __virt_to_phys() insteadof virt_to_phys, so replace itdrivers/dma/sun6i-dma.c: In function ‘sun6i_dma_dump_chan_regs’:
drivers/dma/sun6i-dma.c:203: error: implicit declaration of function '__virt_to_phys'Reported-by: kbuild test robot
Reported-by: Stephen Rothwell
Signed-off-by: Vinod Koul
25 Jul, 2014
1 commit
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The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older Allwinner SoCs, it's significantly different, I don't expect it to be
possible to share the driver for these two.The A31 Controller is able to memory-to-memory or memory-to-device transfers on
the 16 channels in parallel.Signed-off-by: Maxime Ripard
Acked-by: Arnd Bergmann
Signed-off-by: Vinod Koul