Eric Lee / smarc-fsl-linux-kernel

03 May, 2016

1 commit

  • 502d6df11   irqchip/gic-v2: Parse and export virtual GIC information ... Browse Code »

    For now, the firmware tables are parsed 2 times: once in the GIC
    drivers, the other timer when initializing the vGIC. It means code
    duplication and make more tedious to add the support for another
    firmware table (like ACPI).

    Introduce a new structure and set of helpers to get/set the virtual GIC
    information. Also fill up the structure for GICv2.

    Signed-off-by: Julien Grall
    Signed-off-by: Christoffer Dall

    Julien Grall
     

29 Sep, 2015

1 commit

  • 67510ccaf   irqchip/gicv3-its: Add HW revision detection and configuration ... Browse Code »

    Some GIC revisions require an individual configuration to esp. add
    workarounds for HW bugs. This patch implements generic code to parse
    the hw revision provided by an IIDR register value and runs specific
    code if hw matches. A function is added that reads the IIDR registers
    for ITS (GITS_IIDR) and then goes through a list of init functions to
    be called for specific versions. Same could be done for GICV3
    (GICD_IIDR), but there are no users yet for it.

    The patch is needed to implement workarounds for HW errata in Cavium's
    ThunderX GICV3 ITS.

    Signed-off-by: Robert Richter
    Reviewed-by: Marc Zygnier
    Acked-by: Catalin Marinas
    Cc: Tirumalesh Chalamarla
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: Jason Cooper
    Link: http://lkml.kernel.org/r/1442869119-1814-5-git-send-email-rric@kernel.org
    Signed-off-by: Thomas Gleixner

    Robert Richter
     

26 Jan, 2015

1 commit

  • fb7e7deb7   irqchip: gic: Allow interrupt level to be set for PPIs ... Browse Code »

    During a recent cleanup of the arm64 DTs it has become clear that
    the handling of PPIs in xxxx_set_type() is incorrect. The ARM TRMs
    for GICv2 and later allow for "implementation defined" support for
    setting the edge or level type of the PPI interrupts and don't restrict
    the activation level of the signal. Current ARM implementations
    do restrict the PPI level type to IRQ_TYPE_LEVEL_LOW, but licensees
    of the IP can decide to shoot themselves in the foot at any time.

    Signed-off-by: Liviu Dudau
    Acked-by: Marc Zyngier
    Cc: LAKML
    Cc: Russell King
    Cc: Rob Herring
    Cc: Mark Rutland
    Cc: Ian Campbell
    Cc: Jason Cooper
    Cc: Haojian Zhuang
    Link: http://lkml.kernel.org/r/1421772779-25764-1-git-send-email-Liviu.Dudau@arm.com
    Signed-off-by: Thomas Gleixner

    Liviu Dudau
     

09 Jul, 2014

1 commit

  • d51d0af43   irqchip: gic: Move some bits of GICv2 to a library-type file ... Browse Code »

    A few GICv2 low-level function are actually very useful to GICv3,
    and it makes some sense to share them across the two drivers.
    They end-up in their own file, with an additional parameter used
    to ensure an optional synchronization (unused on GICv2).

    Cc: Thomas Gleixner
    Cc: Jason Cooper
    Acked-by: Christoffer Dall
    Signed-off-by: Marc Zyngier
    Link: https://lkml.kernel.org/r/1404140510-5382-2-git-send-email-marc.zyngier@arm.com
    Signed-off-by: Jason Cooper

    Marc Zyngier