Eric Lee / smarc-fsl-linux-kernel

31 May, 2015

1 commit

  • 2ce39109a   EDAC, mpc85xx: Extend error address to 64 bit ... Browse Code »

    Extend err_addr to cover 64 bits for DDR errors.

    Signed-off-by: York Sun
    Acked-by: Johannes Thumshirn
    Cc: Mingkai.hu@freescale.com
    Link: http://lkml.kernel.org/r/1431425022-44766-2-git-send-email-Wenbin.Song@freescale.com
    Signed-off-by: songwenbin
    Signed-off-by: Borislav Petkov

    York Sun
     

02 Jan, 2015

1 commit

25 Nov, 2013

1 commit

  • c92132f59   edac/85xx: Add PCIe error interrupt edac support ... Browse Code »

    Add pcie error interrupt edac support for mpc85xx, p3041, p4080, and
    p5020. The mpc85xx uses the legacy interrupt report mechanism - the
    error interrupts are reported directly to mpic. While the p3041/
    p4080/p5020 attaches the most of error interrupts to interrupt zero. And
    report error interrupts to mpic via interrupt 0.

    This patch can handle both of them.

    Signed-off-by: Chunhe Lan
    Link: http://lkml.kernel.org/r/1384712714-8826-3-git-send-email-morbidrsa@gmail.com
    Cc: Doug Thompson
    Cc: Dave Jiang
    Signed-off-by: Johannes Thumshirn
    Signed-off-by: Borislav Petkov

    Chunhe Lan
     

19 Apr, 2011

1 commit

  • 152ba3942   edac: Drop __DATE__ usage ... Browse Code »

    The kernel already prints its build timestamp during boot, no need to
    repeat it in random drivers and produce different object files each
    time.

    Cc: Doug Thompson
    Cc: bluesmoke-devel@lists.sourceforge.net
    Cc: linux-edac@vger.kernel.org
    Acked-by: Mauro Carvalho Chehab
    Signed-off-by: Michal Marek

    Michal Marek
     

13 Mar, 2010

1 commit

  • 21768639b   edac: mpc85xx mask ecc syndrome correctly ... Browse Code »

    With a 64-bit wide data bus only the lowest 8-bits of the ECC syndrome are
    relevant. With a 32-bit wide data bus only the lowest 16-bits are
    relevant on most architectures.

    Without this change, the ECC syndrome displayed can be mildly confusing,
    eg:

    EDAC MPC85xx MC1: syndrome: 0x25252525

    When in reality the ECC syndrome is 0x25.

    A variety of Freescale manuals say a variety of different things about how
    to decode the CAPTURE_ECC (syndrome) register. I don't have a system with
    a 32-bit bus to test on, but I believe the change is correct. It'd be
    good to get an ACK from someone at Freescale about this change though.

    Signed-off-by: Peter Tyser
    Signed-off-by: Doug Thompson
    Cc: Kumar Gala
    Cc: Dave Jiang
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Peter Tyser
     

01 Jul, 2009

1 commit

08 Feb, 2008

1 commit