20 Sep, 2016
1 commit
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More radeon and amdgpu changes for 4.9. Highlights:
- Initial SI support for amdgpu (controlled by a Kconfig option)
- misc ttm cleanups
- runtimepm fixes
- S3/S4 fixes
- power improvements
- lots of code cleanups and optimizations* 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (151 commits)
drm/ttm: remove cpu_address member from ttm_tt
drm/radeon/radeon_device: remove unused function
drm/amdgpu: clean function declarations in amdgpu_ttm.c up
drm/amdgpu: use the new ring ib and dma frame size callbacks (v2)
drm/amdgpu/vce3: add ring callbacks for ib and dma frame size
drm/amdgpu/vce2: add ring callbacks for ib and dma frame size
drm/amdgpu/vce: add common ring callbacks for ib and dma frame size
drm/amdgpu/uvd6: add ring callbacks for ib and dma frame size
drm/amdgpu/uvd5: add ring callbacks for ib and dma frame size
drm/amdgpu/uvd4.2: add ring callbacks for ib and dma frame size
drm/amdgpu/sdma3: add ring callbacks for ib and dma frame size
drm/amdgpu/sdma2.4: add ring callbacks for ib and dma frame size
drm/amdgpu/cik_sdma: add ring callbacks for ib and dma frame size
drm/amdgpu/si_dma: add ring callbacks for ib and dma frame size
drm/amdgpu/gfx8: add ring callbacks for ib and dma frame size
drm/amdgpu/gfx7: add ring callbacks for ib and dma frame size
drm/amdgpu/gfx6: add ring callbacks for ib and dma frame size
drm/amdgpu/ring: add an interface to get dma frame and ib size
drm/amdgpu/sdma3: drop unused functions
drm/amdgpu/gfx6: drop gds_switch callback
...
19 Sep, 2016
1 commit
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Just random misc stuff that Sean/Sumit&Archit picked up while I relaxed.
Well except for one commit:* tag 'topic/drm-misc-2016-09-19' of git://anongit.freedesktop.org/drm-intel:
drm: Only use compat ioctl for addfb2 on X86/IA64
drm/qxl: squash lines for simple wrapper functions
drm/bridge: analogix_dp: squash lines for simple wrapper functions
drm/radeon: squash lines for simple wrapper functions
drm/amdgpu: squash lines for simple wrapper functions
dma-buf/sync-file: Avoid enable fence signaling if poll(.timeout=0)
drm/fence: allow fence waiting to be interrupted by userspace
drm: Move property validation to a helper, v2.
drm/bridge: adv7511: add support for the 2nd chip
17 Sep, 2016
29 commits
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Patch 3d50d4dcb0 exposed the CPU address of DMA-allocated pages as
returned by dma_alloc_coherent because Nouveau on Tegra needed it.This is not required anymore - as there were no other users for it,
remove it and save some memory for everyone.Reviewed-by: Christian König
Signed-off-by: Alexandre Courbot
Signed-off-by: Alex Deucher -
We get 2 warnings when building kernel with W=1:
drivers/gpu/drm/radeon/radeon_device.c:1961:5: warning: no previous prototype for 'radeon_debugfs_init' [-Wmissing-prototypes]
drivers/gpu/drm/radeon/radeon_device.c:1966:6: warning: no previous prototype for 'radeon_debugfs_cleanup' [-Wmissing-prototypes]In fact, these functions are dummy, but can be removed,
so this patch removes them.Reviewed-by: Christian König
Signed-off-by: Baoyou Xie
Signed-off-by: Alex Deucher -
We get 2 warnings when building kernel with W=1:
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:985:5: warning: no previous prototype for 'amdgpu_ttm_init' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1092:6: warning: no previous prototype for 'amdgpu_ttm_fini' [-Wmissing-prototypes]In fact, both functions are declared in
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c, but should be declared in
a header file, thus can be recognized in other file.So this patch moves the declarations into
drivers/gpu/drm/amd/amdgpu/amdgpu.h.Reviewed-by: Christian König
Signed-off-by: Baoyou Xie
Signed-off-by: Alex Deucher -
Use them to more accurately determine the ring size required
for ib submission.v2: drop extra alignment
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Used to properly calculate space on the ring for ib submissions.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
These are not used yet.
Reviewed-by: Edward O'Callaghan
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
GDS works differently on GFX6, plus the callback was
empty.Reviewed-by: Edward O'Callaghan
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
Missing for gfx6.
Reviewed-by: Edward O'Callaghan
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
The compute functions just called the gfx functions, drop
the wrapper.Reviewed-by: Edward O'Callaghan
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
We switched the other asics, but missed this.
Reviewed-by: Christian König
Signed-off-by: Alex Deucher -
partially revert commit I36f3c9e3a28cbf290652edfb6e19109da660c4f1
this will lead APU can't work.Signed-off-by: Rex Zhu
Reviewed-by: Huang Rui
Signed-off-by: Alex Deucher -
no need to set cg for uvd/vce in late init.
As when ring test, uvd/vce's dpm will be enabled/disabled.
the cg will be set.fix issue suspend when play video or encode, then resume back,
the clock will be bypassed on Polaris/Fiji.Signed-off-by: Rex Zhu
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher -
Signed-off-by: Rex Zhu
Acked-by: Christian König
Reviewed-by: Alex Deucher
Reviewed-by: Edward O'Callaghan
Signed-off-by: Alex Deucher -
Signed-off-by: Rex Zhu
Acked-by: Christian König
Reviewed-by: Alex Deucher
Reviewed-by: Edward O'Callaghan
Signed-off-by: Alex Deucher -
Signed-off-by: Rex Zhu
Acked-by: Christian König
Reviewed-by: Alex Deucher
Reviewed-by: Edward O'Callaghan
Signed-off-by: Alex Deucher -
Reviewed-by: Alex Deucher
Signed-off-by: Jordan Lazare
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher
15 Sep, 2016
9 commits
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Similar to struct drm_update_draw, struct drm_mode_fb_cmd2 has an
unaligned 64 bit field (modifier). This get packed differently between
32 bit and 64 bit modes on architectures that can handle unaligned 64
bit access (X86 and IA64). Other architectures pack the structs the
same and don't need the compat wrapper. Use the same condition for
drm_mode_fb_cmd2 as we use for drm_update_draw.Note that only the modifier will be packed differently between compat
and non-compat versions.Reviewed-by: Rob Clark
Signed-off-by: Kristian H. Kristensen
[seanpaul added not at bottom of commit msg re: modifier]
Signed-off-by: Sean Paul
Link: http://patchwork.freedesktop.org/patch/msgid/1473801645-116011-1-git-send-email-hoegsberg@chromium.org -
Remove unneeded variables and assignments.
Reviewed-by: Gustavo Padovan
Signed-off-by: Masahiro Yamada
Signed-off-by: Sean Paul
Link: http://patchwork.freedesktop.org/patch/msgid/1473863952-7658-5-git-send-email-yamada.masahiro@socionext.com -
Remove unneeded variables and assignments.
Reviewed-by: Gustavo Padovan
Signed-off-by: Masahiro Yamada
[seanpaul added analogix prefix to subject]
Signed-off-by: Sean Paul
Link: http://patchwork.freedesktop.org/patch/msgid/1473863952-7658-4-git-send-email-yamada.masahiro@socionext.com -
Remove unneeded variables and assignments.
Reviewed-by: Gustavo Padovan
Signed-off-by: Masahiro Yamada
Signed-off-by: Sean Paul
Link: http://patchwork.freedesktop.org/patch/msgid/1473863952-7658-3-git-send-email-yamada.masahiro@socionext.com -
Remove unneeded variables and assignments.
Reviewed-by: Gustavo Padovan
Signed-off-by: Masahiro Yamada
Signed-off-by: Sean Paul
Link: http://patchwork.freedesktop.org/patch/msgid/1473863952-7658-2-git-send-email-yamada.masahiro@socionext.com -
Use an explicit limit when moving things around to
force address space allocation.Signed-off-by: Christian König
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher -
This way the address space gets allocated immediately.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher -
Doesn't make much sense to clear the GTT when it was never filled.
Signed-off-by: Christian König
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher -
An invalid offset to be used by custom VRAM/GGT manager when we
don't have an offset for an BO.Signed-off-by: Christian König
Reviewed-by: Alex Deucher
Signed-off-by: Alex Deucher
