Eric Lee / smarc-fsl-linux-kernel

22 Nov, 2020

1 commit

  • d001e41e1   irqchip/exiu: Fix the index of fwspec for IRQ type ... Browse Code »

    Since fwspec->param_count of ACPI node is two, the index of IRQ type
    in fwspec->param[] should be 1 rather than 2.

    Fixes: 3d090a36c8c8 ("irqchip/exiu: Implement ACPI support")
    Signed-off-by: Chen Baozi
    Signed-off-by: Marc Zyngier
    Acked-by: Ard Biesheuvel
    Link: https://lore.kernel.org/r/20201117032015.11805-1-cbz@baozis.org
    Cc: stable@vger.kernel.org

    Chen Baozi
     

09 Jul, 2019

1 commit

  • 2a1ccd314   Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip ... Browse Code »

    Pull irq updates from Thomas Gleixner:
    "The irq departement provides the usual mixed bag:

    Core:

    - Further improvements to the irq timings code which aims to predict
    the next interrupt for power state selection to achieve better
    latency/power balance

    - Add interrupt statistics to the core NMI handlers

    - The usual small fixes and cleanups

    Drivers:

    - Support for Renesas RZ/A1, Annapurna Labs FIC, Meson-G12A SoC and
    Amazon Gravition AMR/GIC interrupt controllers.

    - Rework of the Renesas INTC controller driver

    - ACPI support for Socionext SoCs

    - Enhancements to the CSKY interrupt controller

    - The usual small fixes and cleanups"

    * 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (39 commits)
    irq/irqdomain: Fix comment typo
    genirq: Update irq stats from NMI handlers
    irqchip/gic-pm: Remove PM_CLK dependency
    irqchip/al-fic: Introduce Amazon's Annapurna Labs Fabric Interrupt Controller Driver
    dt-bindings: interrupt-controller: Add Amazon's Annapurna Labs FIC
    softirq: Use __this_cpu_write() in takeover_tasklets()
    irqchip/mbigen: Stop printing kernel addresses
    irqchip/gic: Add dependency for ARM_GIC_MAX_NR
    genirq/affinity: Remove unused argument from [__]irq_build_affinity_masks()
    genirq/timings: Add selftest for next event computation
    genirq/timings: Add selftest for irqs circular buffer
    genirq/timings: Add selftest for circular array
    genirq/timings: Encapsulate storing function
    genirq/timings: Encapsulate timings push
    genirq/timings: Optimize the period detection speed
    genirq/timings: Fix timings buffer inspection
    genirq/timings: Fix next event index function
    irqchip/qcom: Use struct_size() in devm_kzalloc()
    irqchip/irq-csky-mpintc: Remove unnecessary loop in interrupt handler
    dt-bindings: interrupt-controller: Update csky mpintc
    ...

    Linus Torvalds
     

19 Jun, 2019

1 commit

  • d2912cb15   treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 ... Browse Code »

    Based on 2 normalized pattern(s):

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license version 2 as
    published by the free software foundation

    this program is free software you can redistribute it and or modify
    it under the terms of the gnu general public license version 2 as
    published by the free software foundation #

    extracted by the scancode license scanner the SPDX license identifier

    GPL-2.0-only

    has been chosen to replace the boilerplate/reference in 4122 file(s).

    Signed-off-by: Thomas Gleixner
    Reviewed-by: Enrico Weigelt
    Reviewed-by: Kate Stewart
    Reviewed-by: Allison Randal
    Cc: linux-spdx@vger.kernel.org
    Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
    Signed-off-by: Greg Kroah-Hartman

    Thomas Gleixner
     

28 May, 2019

2 commits

  • 3d090a36c   irqchip/exiu: Implement ACPI support ... Browse Code »

    Expose the existing EXIU hierarchical irqchip domain code to permit
    the interrupt controller to be used as the irqchip component of a
    GPIO controller on ACPI systems, or as the target of ordinary
    interrupt resources.

    Reviewed-by: Mika Westerberg
    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Marc Zyngier

    Ard Biesheuvel
     
  • 0444638c0   irqchip/exiu: Preparatory refactor for ACPI support ... Browse Code »

    In preparation of adding support for EXIU controller devices described
    via ACPI, split the DT init function in a DT specific and a generic part,
    where the latter will be reused for ACPI support later.

    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Marc Zyngier

    Ard Biesheuvel
     

14 Nov, 2017

1 commit

  • 0e54705b0   irqchip/exiu: Fix return value check in exiu_init() ... Browse Code »

    In case of error, the function of_iomap() returns NULL pointer not
    ERR_PTR().

    Replace the IS_ERR() test of the return value with NULL test and return
    a proper error code.

    Fixes: 706cffc1b912 ("irqchip/exiu: Add support for Socionext Synquacer EXIU controller")
    Signed-off-by: Wei Yongjun
    Signed-off-by: Thomas Gleixner
    Acked-by: Ard Biesheuvel
    Cc: Marc Zyngier
    Cc: Jason Cooper
    Link: https://lkml.kernel.org/r/1510642648-123574-1-git-send-email-weiyongjun1@huawei.com

    Wei Yongjun
     

07 Nov, 2017

1 commit

  • 706cffc1b   irqchip/exiu: Add support for Socionext Synquacer EXIU controller ... Browse Code »

    The Socionext Synquacer SoC has an external interrupt unit (EXIU)
    that forwards a block of 32 configurable input lines to 32 adjacent
    level-high type GICv3 SPIs.

    The EXIU has per-interrupt level/edge and polarity controls, and
    mask bits that keep the outgoing lines de-asserted, even though
    the controller may still latch interrupt conditions that occur
    while the line is masked.

    Signed-off-by: Ard Biesheuvel
    Signed-off-by: Marc Zyngier

    Ard Biesheuvel