Eric Lee / smarc-fsl-linux-kernel

30 Dec, 2020

1 commit

  • f9e71ed02   soc: amlogic: canvas: add missing put_device() call in meson_canvas_get() ... Browse Code »

    [ Upstream commit 28f851e6afa858f182802e23ac60c3ed7d1c04a1 ]

    if of_find_device_by_node() succeed, meson_canvas_get() doesn't have
    a corresponding put_device(). Thus add put_device() to fix the exception
    handling for this function implementation.

    Fixes: 382f8be04551 ("soc: amlogic: canvas: Fix meson_canvas_get when probe failed")
    Signed-off-by: Yu Kuai
    Reviewed-by: Neil Armstrong
    Signed-off-by: Kevin Hilman
    Link: https://lore.kernel.org/r/20201117011322.522477-1-yukuai3@huawei.com
    Signed-off-by: Sasha Levin

    Yu Kuai
     

25 Sep, 2020

1 commit

  • 5aabf1180   soc: amlogic: pm-domains: use always-on flag ... Browse Code »

    Rather than use a governor to keep these domains always-on, instead
    use the flag GENPD_FLAG_ALWAYS_ON. This has the same effect, but with
    much lower overhead since the governor path is not used at all.

    Signed-off-by: Kevin Hilman
    Acked-by: Neil Armstrong
    Signed-off-by: Kevin Hilman
    Link: https://lore.kernel.org/r/20200921222135.7145-1-khilman@baylibre.com

    Kevin Hilman
     

19 Sep, 2020

1 commit

30 Jun, 2020

1 commit

  • d16d0481e   soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's ... Browse Code »

    Correct the SoC revision and package bits/mask values for S905D3/X3 to detect
    a wider range of observed SoC IDs, and tweak sort order for A311D/S922X.

    S905X3 05 0000 0101 (SEI610 initial devices)
    S905X3 10 0001 0000 (ODROID-C4 and recent Android boxes)
    S905X3 50 0101 0000 (SEI610 later revisions)
    S905D3 04 0000 0100 (VIM3L devices in kernelci)
    S905D3 b0 1011 0000 (VIM3L initial production)

    Fixes commit c9cc9bec36d0 ("soc: amlogic: meson-gx-socinfo: Add SM1 and S905X3 IDs")

    Suggested-by: Neil Armstrong
    Signed-off-by: Christian Hewitt
    Signed-off-by: Kevin Hilman
    Acked-by: Neil Armstrong
    Link: https://lore.kernel.org/r/20200609081318.28023-1-christianshewitt@gmail.com

    Christian Hewitt
     

20 May, 2020

2 commits

  • 53773f2df   soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs ... Browse Code »

    Add support for the Meson GX SoCs to the meson-ee-pwrc driver.

    The power domains on the GX SoCs are very similar to G12A. The only
    known differences so far are:
    - The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the
    VPU power-domain)
    - The GX SoCs have an additional reset line called "dvin"

    Signed-off-by: Martin Blumenstingl
    Signed-off-by: Kevin Hilman
    Reviewed-by: Neil Armstrong
    Link: https://lore.kernel.org/r/20200515204709.1505498-5-martin.blumenstingl@googlemail.com

    Martin Blumenstingl
     
  • 34217df28   soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2 ... Browse Code »

    This adds support for the power domains on Meson8/Meson8b/Meson8m2.
    Meson8 doesn't use any reset lines while Meson8b and Meson8m2 use the
    same set of reset lines (which is different from the newer SoCs).
    Add dedicated compatible strings for Meson8, Meson8b and Meson8m2 to
    support these differences.

    Notable differences between Meson8 and G12A are:
    - there is no HHI_VPU_MEM_PD_REG2 on the 32-bit SoCs
    - the Meson8b datasheet describes an "audio DSP memory" power domain
    which is used for the hardware audio decoder
    - the "amlogic,ao-sysctrl" only includes the power management related
    registers on the 32-bit SoCs, meaning the for example the
    AO_RTI_GEN_PWR_SLEEP0 register is at offset (0x2 << 2) rather than
    (0x3a << 2). As result of this (0x38 << 2) is subtracted from the
    register offsets, which is the start of the power management related
    registers.

    Signed-off-by: Martin Blumenstingl
    Signed-off-by: Kevin Hilman
    Link: https://lore.kernel.org/r/20200515204709.1505498-4-martin.blumenstingl@googlemail.com

    Martin Blumenstingl
     

01 Mar, 2020

1 commit

  • 9ef7a7920   soc: amlogic: fix compile failure with MESON_SECURE_PM_DOMAINS & !MESON_SM ... Browse Code »

    When MESON_SECURE_PM_DOMAINS & !MESON_SM, there will be compile failure:
    .../meson-secure-pwrc.o: In function `meson_secure_pwrc_on':
    .../meson-secure-pwrc.c:76: undefined reference to `meson_sm_call'

    Fix this by adding depends on MESON_SM for MESON_SECURE_PM_DOMAINS.

    Fixes: b3dde5013e13 ("soc: amlogic: Add support for Secure power domains controller")
    Reported-by: Stephen Rothwell
    Reported-by: patchwork-bot+linux-amlogic
    Reported-by: kbuild test robot
    Signed-off-by: Jianxin Pan
    Signed-off-by: Kevin Hilman
    Tested-by: Stephen Rothwell
    Link: https://lore.kernel.org/r/1581955933-69832-1-git-send-email-jianxin.pan@amlogic.com

    Jianxin Pan
     

15 Feb, 2020

1 commit

10 Dec, 2019

2 commits

07 Nov, 2019

1 commit

  • fdfc6997b   soc: amlogic: meson-gx-socinfo: Fix S905D3 ID for VIM3L ... Browse Code »

    Chip on the board is S905D3 not S905X3:

    [ 0.098998] soc soc0: Amlogic Meson SM1 (S905D3) Revision 2b:c (b0:2) Detected

    Change from v1: use 0xf0 mask instead of 0xf2 as advised by Neil Armstrong.

    Fixes: 1d7c541b8a5b ("soc: amlogic: meson-gx-socinfo: Add S905X3 ID for VIM3L")

    Signed-off-by: Christian Hewitt
    Acked-by: Neil Armstrong
    Signed-off-by: Kevin Hilman

    Christian Hewitt
     

08 Oct, 2019

2 commits

29 Aug, 2019

1 commit

21 Aug, 2019

2 commits

20 Aug, 2019

1 commit

06 Aug, 2019

3 commits

25 Jun, 2019

1 commit

23 May, 2019

1 commit

  • 9a98fdf5b   soc: amlogic: canvas: add support for Meson8, Meson8b and Meson8m2 ... Browse Code »

    The canvas IP on Meson8, Meson8b and Meson8m2 is mostly identical to the
    one on GXBB and newer. The only known difference so far is that that the
    "endianness" bits are not supported on Meson8m2 and earlier.

    Add new compatible strings and a check in meson_canvas_config() to
    validate that the endianness bits cannot be configured on the 32-bit
    SoCs.

    Signed-off-by: Martin Blumenstingl
    Reviewed-by: Maxime Jourdan
    Signed-off-by: Kevin Hilman

    Martin Blumenstingl
     

21 May, 2019

1 commit

17 Apr, 2019

2 commits

19 Mar, 2019

3 commits

  • fdda0a6ad   meson-gx-socinfo: add missing of_node_put after of_device_is_available ... Browse Code »

    Add an of_node_put when a tested device node is not available.

    The semantic patch that fixes this problem is as follows
    (http://coccinelle.lip6.fr):

    //
    @@
    identifier f;
    local idexpression e;
    expression x;
    @@

    e = f(...);
    ... when != of_node_put(e)
    when != x = e
    when != e = x
    when any
    if () {
    ... when != of_node_put(e)
    (
    return e;
    |
    + of_node_put(e);
    return ...;
    )
    }
    //

    Fixes: a9daaba2965e8 ("soc: Add Amlogic SoC Information driver")
    Signed-off-by: Julia Lawall
    Signed-off-by: Kevin Hilman

    Julia Lawall
     
  • 65f80df58   soc: amlogic: gx-socinfo: Add new SoC IDs and Packages IDs ... Browse Code »

    This adds the:
    - G12A SoC ID and S905X2, S905D2 package IDs, found booting the
    X96 Max and U200 Reference Board
    - G12B SoC ID and S922X package ID, found booting the Odroid-N2
    - S805X, S805Y package IDs found in the vendor U-Boot source

    Signed-off-by: Neil Armstrong
    Signed-off-by: Kevin Hilman

    Neil Armstrong
     
  • dce47aed2   soc: amlogic: gx-socinfo: Add mask for each SoC packages ... Browse Code »

    When updated IDs on f842c41adc04 ("amlogic: meson-gx-socinfo: Update soc ids")
    we introduced packages ids using the full 8bit value, but in the function
    socinfo_to_package_id() the id was filtered with the 0xf0 mask.

    While the 0xf0 mask is valid for most board, it filters out the lower
    4 bits which encodes some characteristics of the chip.

    This patch moves the mask into the meson_gx_package_id table to be applied
    on each package name independently and add the correct mask for some
    specific entries.

    An example is the S905, in the vendor code the S905 is package_id
    different from 0x20, and S905M is exactly 0x20.

    Another example are the The Wetek Hub & Play2 boards using a S905-H
    variant, which is the S905 SoC with some licence bits enabled.
    These licence bits are encoded in the lower 4bits, so to detect
    the -H variant, we must detect the id == 0x3 with the 0xf mask.

    Fixes: f842c41adc04 ("amlogic: meson-gx-socinfo: Update soc ids")
    Signed-off-by: Neil Armstrong
    Signed-off-by: Kevin Hilman

    Neil Armstrong
     

08 Feb, 2019

2 commits

07 Feb, 2019

1 commit

  • 99e5a8df8   soc: amlogic: add missing of_node_put() ... Browse Code »

    The call to of_parse_phandle returns a node pointer with refcount
    incremented thus it must be explicitly decremented here after the last
    usage.

    Signed-off-by: Wen Yang
    Reviewed-by: Neil Armstrong
    Fixes: d4983983d987 ("soc: amlogic: add meson-canvas driver")
    Signed-off-by: Kevin Hilman

    wen yang
     

11 Dec, 2018

1 commit

29 Nov, 2018

1 commit

  • 2b45ebef3   soc: amlogic: Add Meson Clock Measure driver ... Browse Code »

    The Amlogic Meson SoCs embeds a clock measurer IP to measure the internal
    clock paths frequencies.
    The precision is determined by stepping into the duration until the counter
    overflows.
    The debugfs slows a pretty summary and each clock can be measured
    individually aswell.

    Cc: Martin Blumenstingl
    Signed-off-by: Neil Armstrong
    Reviewed-by: Martin Blumenstingl
    Tested-by: Martin Blumenstingl
    Signed-off-by: Kevin Hilman

    Neil Armstrong
     

13 Sep, 2018

1 commit

  • d4983983d   soc: amlogic: add meson-canvas driver ... Browse Code »

    Amlogic SoCs have a repository of 256 canvas which they use to
    describe pixel buffers.

    They contain metadata like width, height, block mode, endianness [..]

    Many IPs within those SoCs like vdec/vpu rely on those canvas to read/write
    pixels.

    Reviewed-by: Jerome Brunet
    Tested-by: Neil Armstrong
    Signed-off-by: Maxime Jourdan
    Signed-off-by: Kevin Hilman

    Maxime Jourdan
     

20 Mar, 2018

1 commit

13 Feb, 2018

4 commits

01 Dec, 2017

1 commit

  • 044d71bc6   meson-gx-socinfo: Fix package id parsing ... Browse Code »

    I've noticed the following message while booting a S905X based board:

    soc soc0: Amlogic Meson GXL (S905D) Revision 21:82 (b:2) Detected

    The S905D string is obviously wrong. The vendor code does:
    ...
    ver = (readl(assist_hw_rev) >> 8) & 0xff;
    meson_cpu_version[MESON_CPU_VERSION_LVL_MINOR] = ver;
    ver = (readl(assist_hw_rev) >> 16) & 0xff;
    meson_cpu_version[MESON_CPU_VERSION_LVL_PACK] = ver;
    ...

    while the current code does:
    ...
    ...

    This means that the current mainline code has package id and minor
    version reversed.

    Fixes: a9daaba2965e8 ("soc: Add Amlogic SoC Information driver")
    Signed-off-by: Arnaud Patard
    Acked-by: Neil Armstrong
    Signed-off-by: Kevin Hilman

    Arnaud Patard