02 Feb, 2021
1 commit
-
Mailbox driver needs to wait and read all the words in response to a
SCFW API call, else the protocol gets messed up and results in kernel hang.
When the responses are longer than 3 words its possible that SCFW will
take some time to fill up the rest of the words in the MU, a timeout of
100us is arbritrary and too short. While waiting for Linux to consume the
first 3 words of the response SCFW can be busy doing other stuff and hence
Linux needs to wait for the rest of the words.
Similar restriction applies when writing messages that are longer than
3 words.
This patch increases the timeout to 5secs while waiting for response
or writing long messages to SCFW.Signed-off-by: Ranjani Vaidyanathan
08 Jan, 2021
1 commit
-
Fix the following compilation warnings on 64-bit platforms by using
the proper format (%zu) for size_t (return type for sizeof()):In file included from ./include/linux/device.h:15,
from ./include/linux/firmware/imx/ipc.h:11,
from drivers/mailbox/imx-mailbox.c:7:
drivers/mailbox/imx-mailbox.c: In function ‘imx_mu_seco_tx’:
drivers/mailbox/imx-mailbox.c:313:5: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 3 has type ‘long unsigned int’ [-Wformat=]
313 | "Exceed max msg size (%u) on TX, got: %i\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
./include/linux/dev_printk.h:19:22: note: in definition of macro ‘dev_fmt’
19 | #define dev_fmt(fmt) fmt
| ^~~
drivers/mailbox/imx-mailbox.c:312:4: note: in expansion of macro ‘dev_err’
312 | dev_err(priv->dev,
| ^~~~~~~
drivers/mailbox/imx-mailbox.c:313:28: note: format string is defined here
313 | "Exceed max msg size (%u) on TX, got: %i\n",
| ~^
| |
| unsigned int
| %lu
In file included from ./include/linux/device.h:15,
from ./include/linux/firmware/imx/ipc.h:11,
from drivers/mailbox/imx-mailbox.c:7:
drivers/mailbox/imx-mailbox.c: In function ‘imx_mu_seco_rxdb’:
CC drivers/mailbox/pcc.o
drivers/mailbox/imx-mailbox.c:374:22: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 3 has type ‘long unsigned int’ [-Wformat=]
374 | dev_err(priv->dev, "Exceed max msg size (%u) on RX, got: %i\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
./include/linux/dev_printk.h:19:22: note: in definition of macro ‘dev_fmt’
19 | #define dev_fmt(fmt) fmt
| ^~~
drivers/mailbox/imx-mailbox.c:374:3: note: in expansion of macro ‘dev_err’
374 | dev_err(priv->dev, "Exceed max msg size (%u) on RX, got: %i\n",
| ^~~~~~~
drivers/mailbox/imx-mailbox.c:374:45: note: format string is defined here
374 | dev_err(priv->dev, "Exceed max msg size (%u) on RX, got: %i\n",
| ~^
| |
| unsigned int
| %luFixes: eff00db88291 ("LF-3112: mailbox: imx: fix build warnings caused by type mismatch")
Signed-off-by: Horia Geantă
Acked-by: Jason Liu
05 Jan, 2021
1 commit
-
drivers/mailbox/imx-mailbox.c: In function ‘imx_mu_seco_tx’:
drivers/mailbox/imx-mailbox.c:313:5: warning: format ‘%li’ expects argument of type ‘long int’, but argument 3 has type ‘unsigned int’ [-Wformat=]
"Exceed max msg size (%li) on TX, got: %i\n",
^drivers/mailbox/imx-mailbox.c: In function ‘imx_mu_seco_rxdb’:
drivers/mailbox/imx-mailbox.c:374:22: warning: format ‘%li’ expects argument of type ‘long int’, but argument 3 has type ‘unsigned int’ [-Wformat=]
"Exceed max msg size (%li) on RX, got: %i\n",use %u instead of %li to fix the type mismatch issue
Signed-off-by: Jason Liu
Acked-by: Peng Fan
04 Jan, 2021
1 commit
-
This is the 5.10.4 stable release
* tag 'v5.10.4': (717 commits)
Linux 5.10.4
x86/CPU/AMD: Save AMD NodeId as cpu_die_id
drm/edid: fix objtool warning in drm_cvt_modes()
...Signed-off-by: Jason Liu
Conflicts:
drivers/gpu/drm/imx/dcss/dcss-plane.c
drivers/media/i2c/ov5640.c
30 Dec, 2020
1 commit
-
[ Upstream commit 9905f728b0bda737fe2c2afd7c24f3365a45cc7b ]
The mhu_db_channel info is allocated per channel using devm_kzalloc from
mhu_db_mbox_xlate which gets called from mbox_request_channel. However
we are releasing the allocated mhu_db_channel info using plain kfree from
mhu_db_shutdown which is called from mbox_free_channel.This leads to random crashes when the channel is freed like below one:
Unable to handle kernel paging request at virtual address 0080000400000008
[0080000400000008] address between user and kernel address ranges
Internal error: Oops: 96000044 [#1] PREEMPT SMP
Modules linked in: scmi_module(-)
CPU: 1 PID: 2212 Comm: rmmod Not tainted 5.10.0-rc5 #31
Hardware name: ARM LTD ARM Juno Development Platform/ARM Juno
Development Platform, BIOS EDK II Nov 19 2020
pstate: 20000085 (nzCv daIf -PAN -UAO -TCO BTYPE=--)
pc : release_nodes+0x74/0x230
lr : devres_release_all+0x40/0x68
Call trace:
release_nodes+0x74/0x230
devres_release_all+0x40/0x68
device_release_driver_internal+0x12c/0x1f8
driver_detach+0x58/0xe8
bus_remove_driver+0x64/0xe0
driver_unregister+0x38/0x68
platform_driver_unregister+0x1c/0x28
scmi_driver_exit+0x38/0x44 [scmi_module]
__arm64_sys_delete_module+0x188/0x260
el0_svc_common.constprop.0+0x80/0x1a8
do_el0_svc+0x2c/0x98
el0_sync_handler+0x160/0x168
el0_sync+0x174/0x180
Code: 1400000d eb07009f 54000460 f9400486 (f90004a6)
---[ end trace c55ffd306c140233 ]---Fix it by replacing kfree with devm_kfree as required.
Fixes: 7002ca237b21 ("mailbox: arm_mhu: Add ARM MHU doorbell driver")
Reported-by: Cristian Marussi
Signed-off-by: Sudeep Holla
Tested-by: Cristian Marussi
Reviewed-by: Cristian Marussi
Signed-off-by: Jassi Brar
Signed-off-by: Sasha Levin
14 Dec, 2020
6 commits
-
The parameter to ack the doorbell are not passed in the right
order to the write function so the system does not work as
expected.This patch fixes the issue.
Fixes: 0d7bf1ee6aed (MLK-23421: mailbox: imx: add SECO MU support)
Signed-off-by: Franck LENORMAND
Reviewed-by: Dong Aisheng -
When performign a suspend/resume test, the following error occurs:
Unable to handle kernel NULL pointer dereference at virtual address 0000000000000000
[ 49.938177] Mem abort info:
[ 49.940971] ESR = 0x86000004
[ 49.944032] EC = 0x21: IABT (current EL), IL = 32 bits
[ 49.949346] SET = 0, FnV = 0
[ 49.952404] EA = 0, S1PTW = 0
[ 49.955553] user pgtable: 4k pages, 48-bit VAs, pgdp=00000008b440b000
[ 49.961995] [0000000000000000] pgd=0000000000000000, p4d=0000000000000000
[ 49.968801] Internal error: Oops: 86000004 [#1] PREEMPT SMP
[ 49.974375] Modules linked in:
[ 49.977440] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.9.0-rc2-next-20200828 #306
[ 49.985017] Hardware name: Freescale i.MX8QXP MEK (DT)
[ 49.990165] pstate: 60000085 (nZCv daIf -PAN -UAO BTYPE=--)
[ 49.995743] pc : 0x0
[ 49.997945] lr : imx_mu_isr+0xfc/0x200
[ 50.001697] sp : ffff800011bbbe60
[ 50.005013] x29: ffff800011bbbe60 x28: ffff8000119c2040
[ 50.010338] x27: 0000000000000060 x26: ffff80001148c400
[ 50.015666] x25: ffff800011aeebaf x24: ffff00083a4ce800
[ 50.020991] x23: 0000000000000055 x22: ffff800011bbbf24
[ 50.026317] x21: ffff00083a590098 x20: ffff00083a5905f0
[ 50.031642] x19: 0000000000000001 x18: 0000000000000000
[ 50.036968] x17: 0000000000000000 x16: 0000000000000000
[ 50.042291] x15: 0000000260dfc140 x14: 0000000000000000
[ 50.047617] x13: 003d090000000000 x12: 00003d0900000000
[ 50.052942] x11: 0000000000000040 x10: ffff800011a19148
[ 50.058270] x9 : ffff800011a19140 x8 : ffff0008380aab80
[ 50.063595] x7 : 0000000000000000 x6 : 0000000010000000
[ 50.068921] x5 : ffff00083a591228 x4 : 0000000010000000
[ 50.074246] x3 : 0000000000100000 x2 : 0000000000000000
[ 50.079571] x1 : ffff00083a591228 x0 : ffff00083a590080
[ 50.084897] Call trace:
[ 50.087351] 0x0
[ 50.089206] __handle_irq_event_percpu+0x5c/0x168
[ 50.093919] handle_irq_event_percpu+0x38/0x90
[ 50.098376] handle_irq_event+0x48/0xe0
[ 50.102218] handle_fasteoi_irq+0xb8/0x170
[ 50.106325] generic_handle_irq+0x30/0x48
[ 50.110347] __handle_domain_irq+0x64/0xc0
[ 50.114458] gic_handle_irq+0xc8/0x168
[ 50.118218] el1_irq+0xb8/0x180
[ 50.121361] arch_cpu_idle+0x14/0x20
[ 50.124942] do_idle+0x220/0x298
[ 50.128172] cpu_startup_entry+0x24/0x70
[ 50.132103] rest_init+0xd8/0xe8
[ 50.135343] arch_call_rest_init+0x10/0x1c
[ 50.139449] start_kernel+0x4ac/0x4e4
[ 50.143120] Code: bad PC value
[ 50.146192] ---[ end trace 864e7f4cd5df243c ]---
[ 50.150821] Kernel panic - not syncing: Fatal exception in interrupt
[ 50.157180] SMP: stopping secondary CPUs
[ 50.161113] Kernel Offset: disabled
[ 50.164607] CPU features: 0x0240002,20002008
[ 50.168879] Memory Limit: none
[ 50.171946] ---[ end Kernel panic - not syncing: Fatal exception in interrupt ]---It happens because the rxdb field of imx_mu_cfg_imx8_scu is not set
which leads to the NULL pointer beign accessed.Fixes: 0d7bf1ee6aed (MLK-23421: mailbox: imx: add SECO MU support)
Signed-off-by: Franck LENORMAND
Reviewed-by: Dong Aisheng -
The remote processor can take some time to read/write to
the MU and the previous timeout was not based on a temporal
value. It is better to use a temporal variable so the code
will always have the same behavior.There is no specification about the timeout to set, just to have
something in the range of few seconds, so chosen 3.This patch changes the timeout to be based on time.
Signed-off-by: Franck LENORMAND
Reviewed-by: Horia Geantă -
In case the reception of the message fails, the client is not
informed.This patch sends the error to client using mbox_chan_received_data
with error code encoded in the address of the message.Signed-off-by: Franck LENORMAND
Reviewed-by: Horia Geantă -
i.MX8/8X SECO firmware IPC is an implementation of passing messages.
But current imx-mailbox driver only support one word message,
i.MX8/8X linux side firmware has to request four TX, four RX and a
TXDB to support IPC to SECO firmware. This is low efficent and
more interrupts triggered compared with one TX and one RX.To make SECO MU work,
- parse the size of msg.
- Only enable TR0/RR0 interrupt for transmit/receive message.
- For TX/RX, only support one TX channel and one RX channel
- For RX, support receive msg of any size, linited by hardcoded value of
30.Signed-off-by: Peng Fan
Signed-off-by: Franck LENORMAND -
Many module driver depends on rpmsg driver, need bring
mailbox driver probed to arch_init() level.Signed-off-by: Robin Gong
25 Oct, 2020
1 commit
-
Pull ARM SoC-related driver updates from Olof Johansson:
"Various driver updates for platforms. A bulk of this is smaller fixes
or cleanups, but some of the new material this time around is:- Support for Nvidia Tegra234 SoC
- Ring accelerator support for TI AM65x
- PRUSS driver for TI platforms
- Renesas support for R-Car V3U SoC
- Reset support for Cortex-M4 processor on i.MX8MQ
There are also new socinfo entries for a handful of different SoCs and
platforms"* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits)
drm/mediatek: reduce clear event
soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
soc: mediatek: cmdq: add jump function
soc: mediatek: cmdq: add write_s_mask value function
soc: mediatek: cmdq: add write_s value function
soc: mediatek: cmdq: add read_s function
soc: mediatek: cmdq: add write_s_mask function
soc: mediatek: cmdq: add write_s function
soc: mediatek: cmdq: add address shift in jump
soc: mediatek: mtk-infracfg: Fix kerneldoc
soc: amlogic: pm-domains: use always-on flag
reset: sti: reset-syscfg: fix struct description warnings
reset: imx7: add the cm4 reset for i.MX8MQ
dt-bindings: reset: imx8mq: add m4 reset
reset: Fix and extend kerneldoc
reset: reset-zynqmp: Added support for Versal platform
dt-bindings: reset: Updated binding for Versal reset driver
reset: imx7: Support module build
soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk
soc: fsl: qman: convert to use be32_add_cpu()
...
17 Oct, 2020
1 commit
-
If the txdone is done by polling, it is possible for msg_submit() to start
the timer while txdone_hrtimer() callback is running. If the timer needs
recheduling, it could already be enqueued by the time hrtimer_forward_now()
is called, leading hrtimer to loudly complain.WARNING: CPU: 3 PID: 74 at kernel/time/hrtimer.c:932 hrtimer_forward+0xc4/0x110
CPU: 3 PID: 74 Comm: kworker/u8:1 Not tainted 5.9.0-rc2-00236-gd3520067d01c-dirty #5
Hardware name: Libre Computer AML-S805X-AC (DT)
Workqueue: events_freezable_power_ thermal_zone_device_check
pstate: 20000085 (nzCv daIf -PAN -UAO BTYPE=--)
pc : hrtimer_forward+0xc4/0x110
lr : txdone_hrtimer+0xf8/0x118
[...]This can be fixed by not starting the timer from the callback path. Which
requires the timer reloading as long as any message is queued on the
channel, and not just when current tx is not done yet.Fixes: 0cc67945ea59 ("mailbox: switch to hrtimer for tx_complete polling")
Reported-by: Da Xue
Reviewed-by: Sudeep Holla
Tested-by: Sudeep Holla
Acked-by: Jerome Brunet
Tested-by: Jerome Brunet
Signed-off-by: Jassi Brar
13 Oct, 2020
4 commits
-
platform_get_irq() returns -ERRNO on error. In such case casting to u32
and comparing to 0 would pass the check.Fixes: 623a6143a845 ("mailbox: mediatek: Add Mediatek CMDQ driver")
Signed-off-by: Krzysztof Kozlowski
Signed-off-by: Jassi Brar -
The MHU drives the signal using a 32-bit register, with all 32 bits
logically ORed together. The MHU provides a set of registers to enable
software to set, clear, and check the status of each of the bits of this
register independently. The use of 32 bits for each interrupt line
enables software to provide more information about the source of the
interrupt. For example, each bit of the register can be associated with
a type of event that can contribute to raising the interrupt.This patch adds a separate the MHU controller driver for doorbel mode
of operation using the extended DT binding to add support the same.Signed-off-by: Sudeep Holla
Signed-off-by: Jassi Brar -
Since we will be soon adding a separate driver based on this ARM MHU
driver to support doorbell mode, let us add explicit check to match
the default compatible for this driver. This is needed as the probe
and match reuses the AMBA device ids currently and don't have any
explicit compatible check.Signed-off-by: Sudeep Holla
Signed-off-by: Jassi Brar -
In preparation for unconditionally passing the
struct tasklet_struct pointer to all tasklet
callbacks, switch to using the new tasklet_setup()
and from_tasklet() to pass the tasklet pointer explicitly.Signed-off-by: Romain Perier
Signed-off-by: Allen Pais
Signed-off-by: Jassi Brar
18 Sep, 2020
1 commit
-
Enable support for the BPMP on Tegra234 to avoid relying on Tegra194
being enabled to pull in the needed OF device ID table entry.On simulation platforms the BPMP hasn't booted up yet by the time we
probe the BPMP driver and the BPMP hasn't had a chance to mark the
doorbell as ringable by the CCPLEX. This corresponding check in the
BPMP driver will therefore fail. Work around this by disabling the
check on simulation platforms.Reviewed-by: Jon Hunter
Signed-off-by: Thierry Reding
15 Aug, 2020
1 commit
-
Patch series "iomap: Constify ioreadX() iomem argument", v3.
The ioread8/16/32() and others have inconsistent interface among the
architectures: some taking address as const, some not.It seems there is nothing really stopping all of them to take pointer to
const.This patch (of 4):
The ioreadX() and ioreadX_rep() helpers have inconsistent interface. On
some architectures void *__iomem address argument is a pointer to const,
on some not.Implementations of ioreadX() do not modify the memory under the address so
they can be converted to a "const" version for const-safety and
consistency among architectures.[krzk@kernel.org: sh: clk: fix assignment from incompatible pointer type for ioreadX()]
Link: http://lkml.kernel.org/r/20200723082017.24053-1-krzk@kernel.org
[akpm@linux-foundation.org: fix drivers/mailbox/bcm-pdc-mailbox.c]
Link: http://lkml.kernel.org/r/202007132209.Rxmv4QyS%25lkp@intel.comSuggested-by: Geert Uytterhoeven
Signed-off-by: Krzysztof Kozlowski
Signed-off-by: Andrew Morton
Reviewed-by: Geert Uytterhoeven
Reviewed-by: Arnd Bergmann
Cc: Richard Henderson
Cc: Ivan Kokshaysky
Cc: Matt Turner
Cc: "James E.J. Bottomley"
Cc: Helge Deller
Cc: Michael Ellerman
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Yoshinori Sato
Cc: Rich Felker
Cc: Kalle Valo
Cc: "David S. Miller"
Cc: Jakub Kicinski
Cc: Dave Jiang
Cc: Jon Mason
Cc: Allen Hubbe
Cc: "Michael S. Tsirkin"
Cc: Jason Wang
Link: http://lkml.kernel.org/r/20200709072837.5869-1-krzk@kernel.org
Link: http://lkml.kernel.org/r/20200709072837.5869-2-krzk@kernel.org
Signed-off-by: Linus Torvalds
04 Aug, 2020
8 commits
-
Do success callback in channel when shutdown. For those task not finish,
callback with error code thus client has chance to cleanup or reset.Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
Reviewed-by: Bibby Hsieh
Signed-off-by: Jassi Brar -
Add gce v4 hardware support with different thread number and shift.
Signed-off-by: Dennis YC Hsieh
Reviewed-by: CK Hu
Reviewed-by: Matthias Brugger
Reviewed-by: Bibby Hsieh
Signed-off-by: Jassi Brar -
Some gce hardware shift pc and end address in register to support
large dram addressing.
Implement gce address shift when write or read pc and end register.
And add shift bit in platform definition.Signed-off-by: Dennis YC Hsieh
Signed-off-by: Jassi Brar -
MSM8994 has an APCS block similar to 8916, but
with a different clock driver due to the former
one having 2 clusters.Signed-off-by: Konrad Dybcio
Acked-by: Rob Herring
Reviewed-by: Bjorn Andersson
Signed-off-by: Jassi Brar -
The Qualcomm SDM660 platform has a APCS HMSS GLOBAL block, add the
compatible for this.Signed-off-by: Konrad Dybcio
Reviewed-by: Bjorn Andersson
Acked-by: Rob Herring
Signed-off-by: Jassi Brar -
When CONFIG_PM and CONFIG_PM_SLEEP are unset, the following warnings
occur:drivers/mailbox/imx-mailbox.c:638:12: warning: 'imx_mu_runtime_resume'
defined but not used [-Wunused-function]
638 | static int imx_mu_runtime_resume(struct device *dev)
| ^~~~~~~~~~~~~~~~~~~~~
drivers/mailbox/imx-mailbox.c:629:12: warning: 'imx_mu_runtime_suspend'
defined but not used [-Wunused-function]
629 | static int imx_mu_runtime_suspend(struct device *dev)
| ^~~~~~~~~~~~~~~~~~~~~~
drivers/mailbox/imx-mailbox.c:611:12: warning: 'imx_mu_resume_noirq'
defined but not used [-Wunused-function]
611 | static int imx_mu_resume_noirq(struct device *dev)
| ^~~~~~~~~~~~~~~~~~~
drivers/mailbox/imx-mailbox.c:601:12: warning: 'imx_mu_suspend_noirq'
defined but not used [-Wunused-function]
601 | static int imx_mu_suspend_noirq(struct device *dev)
| ^~~~~~~~~~~~~~~~~~~~Mark these functions as __maybe_unused, which is the standard procedure
for PM functions.Fixes: bb2b2624dbe2 ("mailbox: imx: Add runtime PM callback to handle MU clocks")
Signed-off-by: Nathan Chancellor
Reviewed-by: Dong Aisheng
Signed-off-by: Jassi Brar -
The acpi_get_table() should be coupled with acpi_put_table() if
the mapped table is not used at runtime to release the table
mapping.In acpi_pcc_probe(), the PCCT table entries will be used as private
data for communication chan at runtime, but the table should be put
for error path.Signed-off-by: Hanjun Guo
Signed-off-by: Jassi Brar -
Rationale:
Reduces attack surface on kernel devs opening the links for MITM
as HTTPS traffic is much harder to manipulate.Deterministic algorithm:
For each file:
If not .svg:
For each line:
If doesn't contain `\bxmlns\b`:
For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`:
If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`:
If both the HTTP and HTTPS versions
return 200 OK and serve the same content:
Replace HTTP with HTTPS.Signed-off-by: Alexander A. Klimov
Signed-off-by: Jassi Brar
11 Jun, 2020
2 commits
-
The Qualcomm ipq6018 has apcs block, add compatible for the same. Also,
the ipq6018 apcs provides a clock functionality similar to msm8916 but
the clock driver is different.Create a child device based on the apcs compatible for the clock
controller functionality.Signed-off-by: Sivaprakash Murugesan
Signed-off-by: Jassi Brar -
Some apcs mailbox devices supports a clock driver, the compatible
strings of devices supporting clock driver along with the clock driver
name are maintained in a separate structure within the mailbox driver.
And the clock driver is added based on device match.With increase in number of devices supporting the clock feature move the
clock driver name inside the driver data. so that we can use a single
API to get the register offset of mailbox driver and clock driver name
together, and the clock driver will be added based on the driver data.Signed-off-by: Sivaprakash Murugesan
Signed-off-by: Jassi Brar
08 Jun, 2020
3 commits
-
IPC MU has no power domain assigned and there could be IPC during
noirq suspend phase, so IRQF_NO_SUSPEND flag is needed for IPC MU.
However, for other MUs, they have power domain assigned and their
power will be turned off during noirq suspend phase, but with
IRQF_NO_SUSPEND set, their interrupts are NOT disabled even after
their power turned off, it will cause system crash when mailbox
driver trys to handle pending interrupts but the MU power is already
turned off.So, IRQF_NO_SUSPEND flag should ONLY be added to IPC MU which has
power domain managed by SCU, then all other MUs' pending interrupts
after noirq suspend phase will be handled after system resume.Signed-off-by: Anson Huang
Signed-off-by: Jassi Brar -
Some of i.MX8M SoCs have MU clock, they need to be managed in runtime
to make sure the MU clock can be off in runtime, add runtime PM callback
to handle MU clock.And on i.MX8MP, the MU clock is combined with power domain and runtime
PM is enabled for the clock driver, during noirq suspend/resume phase,
runtime PM is disabled by device suspend, but the MU context save/restore
needs to enable MU clock for register access, calling clock prepare/enable
will trigger runtime resume failure and lead to system suspend failed.Actually, the MU context save/restore is ONLY necessary for SCU IPC MU,
other MUs especially on i.MX8MP platforms which have MU clock assigned,
they need to runtime request/free mailbox channel in the consumer driver,
so no need to save/restore MU context for them, hence it can avoid this
issue, so the MU context save/restore is ONLY applied to i.MX platforms
MU instance without clock present.Signed-off-by: Anson Huang
Signed-off-by: Jassi Brar -
For "mem" mode suspend on i.MX8 SoCs, MU settings could be
lost because its power is off, so save/restore is needed
for MU settings during suspend/resume. However, the restore
can ONLY be done when MU settings are actually lost, for the
scenario of settings NOT lost in "freeze" mode suspend, since
there could be still IPC going on multiple CPUs, restoring the
MU settings could overwrite the TIE by mistake and cause system
freeze, so need to make sure ONLY restore the MU settings when
it is powered off, Anson fixes this by checking whether restore
is actually needed when resume.Signed-off-by: Dong Aisheng
Signed-off-by: Anson Huang
Signed-off-by: Jassi Brar
31 May, 2020
8 commits
-
Add support for the Inter-Processor Communication Controller (IPCC)
block from Qualcomm that coordinates the interrupts (inbound & outbound)
for Multiprocessor (MPROC), COMPUTE-Level0 (COMPUTE-L0) & COMPUTE-Level1
(COMPUTE-L1) protocols for the Application Processor Subsystem (APSS).This driver is modeled as an irqchip+mailbox driver. The irqchip part
helps in receiving the interrupts from the IPCC clients such as modems,
DSPs, PCI-E etc... and forwards them to respective entities in APSS.On the other hand, the mailbox part is used to send interrupts to the IPCC
clients from the entities of APSS.Reviewed-by: Bjorn Andersson
Signed-off-by: Raghavendra Rao Ananta
Signed-off-by: Venkata Narendra Kumar Gutta
Signed-off-by: Bjorn Andersson
[mani: moved to mailbox, added static mbox channels and cleanups]
Signed-off-by: Manivannan Sadhasivam
Signed-off-by: Jassi Brar -
In case of error, the function devm_ioremap() returns NULL pointer not
ERR_PTR(). So we should check whether the return value of devm_ioremap()
is NULL instead of IS_ERR.Fixes: 4981b82ba2ff ("mailbox: ZynqMP IPI mailbox controller")
Signed-off-by: Wei Yongjun
Signed-off-by: Jassi Brar -
The i.MX8 SCU message header size is the number of "u32" elements,
not "u8", so fix the check.Reported-by: coverity-bot
Addresses-Coverity-ID: 1461658 ("Memory - corruptions")
Signed-off-by: Peng Fan
Reviewed-by: Leonard Crestez
Acked-by: Oleksij Rempel
Signed-off-by: Jassi Brar -
The Spreadtrum mailbox controller supports 8 channels to communicate
with MCUs, and it contains 2 different parts: inbox and outbox, which
are used to send and receive messages by IRQ mode.Signed-off-by: Baolin Wang
Signed-off-by: Jassi Brar -
The function platform_get_irq can log an error already.
Thus omit a redundant message for the exception handling in the
calling function.This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
Signed-off-by: Jassi Brar -
devm_mbox_controller_register() may fail, and in the case of failure the
priv->clk clock that was previously enabled, should be disabled.Fixes: 2bb7005696e2 ("mailbox: Add support for i.MX messaging unit")
Signed-off-by: Fabio Estevam
Reviewed-by: Peng Fan
Acked-by: Oleksij Rempel
[Jassi: fixed merge/am conflict]
Signed-off-by: Jassi Brar -
This called from mbox_request_channel(). The caller is expecting error
pointers and not NULL so this "return NULL;" will lead to an Oops.Fixes: 0a67003b1985 ("mailbox: imx: add SCU MU support")
Signed-off-by: Dan Carpenter
Signed-off-by: Jassi Brar -
Some power hungry sub-systems like VPU has its own MUs which also
use mailbox driver, current mailbox driver uses platform driver
model and MU's power will be ON after driver probed and left ON
there, it may cause the whole sub-system can NOT enter lower power
mode, take VPU driver for example, it has runtime PM support, but
due to its MU always ON, the VPU sub-system will be always ON and
consume many power during kernel idle.To save power in kernel idle, mailbox driver needs to support
runtime PM in order to power off MU when it is unused. However,
the runtime suspend/resume can ONLY be implemented in mailbox's
.shutdown/.startup callback, so its consumer needs to call
mbox_request_channel()/mbox_free_channel() in consumer driver's
runtime PM callback, then the MU's power will be ON/OFF along with
consumer's runtime PM status.Signed-off-by: Anson Huang
Signed-off-by: Jassi Brar
