Eric Lee / smarc-fsl-linux-kernel

06 Jul, 2018

1 commit

10 Sep, 2017

1 commit

  • 4dfc27880   Merge tag 'iommu-updates-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu ... Browse Code »

    Pull IOMMU updates from Joerg Roedel:
    "Slightly more changes than usual this time:

    - KDump Kernel IOMMU take-over code for AMD IOMMU. The code now tries
    to preserve the mappings of the kernel so that master aborts for
    devices are avoided. Master aborts cause some devices to fail in
    the kdump kernel, so this code makes the dump more likely to
    succeed when AMD IOMMU is enabled.

    - common flush queue implementation for IOVA code users. The code is
    still optional, but AMD and Intel IOMMU drivers had their own
    implementation which is now unified.

    - finish support for iommu-groups. All drivers implement this feature
    now so that IOMMU core code can rely on it.

    - finish support for 'struct iommu_device' in iommu drivers. All
    drivers now use the interface.

    - new functions in the IOMMU-API for explicit IO/TLB flushing. This
    will help to reduce the number of IO/TLB flushes when IOMMU drivers
    support this interface.

    - support for mt2712 in the Mediatek IOMMU driver

    - new IOMMU driver for QCOM hardware

    - system PM support for ARM-SMMU

    - shutdown method for ARM-SMMU-v3

    - some constification patches

    - various other small improvements and fixes"

    * tag 'iommu-updates-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (87 commits)
    iommu/vt-d: Don't be too aggressive when clearing one context entry
    iommu: Introduce Interface for IOMMU TLB Flushing
    iommu/s390: Constify iommu_ops
    iommu/vt-d: Avoid calling virt_to_phys() on null pointer
    iommu/vt-d: IOMMU Page Request needs to check if address is canonical.
    arm/tegra: Call bus_set_iommu() after iommu_device_register()
    iommu/exynos: Constify iommu_ops
    iommu/ipmmu-vmsa: Make ipmmu_gather_ops const
    iommu/ipmmu-vmsa: Rereserving a free context before setting up a pagetable
    iommu/amd: Rename a few flush functions
    iommu/amd: Check if domain is NULL in get_domain() and return -EBUSY
    iommu/mediatek: Fix a build warning of BIT(32) in ARM
    iommu/mediatek: Fix a build fail of m4u_type
    iommu: qcom: annotate PM functions as __maybe_unused
    iommu/pamu: Fix PAMU boot crash
    memory: mtk-smi: Degrade SMI init to module_init
    iommu/mediatek: Enlarge the validate PA range for 4GB mode
    iommu/mediatek: Disable iommu clock when system suspend
    iommu/mediatek: Move pgtable allocation into domain_alloc
    iommu/mediatek: Merge 2 M4U HWs into one iommu domain
    ...

    Linus Torvalds
     

16 Aug, 2017

2 commits

  • daae2d25a   iommu/amd: Don't copy GCR3 table root pointer ... Browse Code »

    When iommu is pre_enabled in kdump kernel, if a device is set up with
    guest translations (DTE.GV=1), then don't copy GCR3 table root pointer
    but move the device over to an empty guest-cr3 table and handle the
    faults in the PPR log (which answer them with INVALID). After all these
    PPR faults are recoverable for the device and we should not allow the
    device to change old-kernels data when we don't have to.

    Signed-off-by: Baoquan He
    Signed-off-by: Joerg Roedel

    Baoquan He
     
  • 4c232a708   iommu/amd: Detect pre enabled translation ... Browse Code »

    Add functions to check whether translation is already enabled in IOMMU.

    Signed-off-by: Baoquan He
    Signed-off-by: Joerg Roedel

    Baoquan He
     

18 Jul, 2017

1 commit

  • 2543a786a   iommu/amd: Allow the AMD IOMMU to work with memory encryption ... Browse Code »

    The IOMMU is programmed with physical addresses for the various tables
    and buffers that are used to communicate between the device and the
    driver. When the driver allocates this memory it is encrypted. In order
    for the IOMMU to access the memory as encrypted the encryption mask needs
    to be included in these physical addresses during configuration.

    The PTE entries created by the IOMMU should also include the encryption
    mask so that when the device behind the IOMMU performs a DMA, the DMA
    will be performed to encrypted memory.

    Signed-off-by: Tom Lendacky
    Reviewed-by: Thomas Gleixner
    Reviewed-by: Borislav Petkov
    Acked-by: Joerg Roedel
    Cc:
    Cc: Alexander Potapenko
    Cc: Andrey Ryabinin
    Cc: Andy Lutomirski
    Cc: Arnd Bergmann
    Cc: Borislav Petkov
    Cc: Brijesh Singh
    Cc: Dave Young
    Cc: Dmitry Vyukov
    Cc: Jonathan Corbet
    Cc: Konrad Rzeszutek Wilk
    Cc: Larry Woodman
    Cc: Linus Torvalds
    Cc: Matt Fleming
    Cc: Michael S. Tsirkin
    Cc: Paolo Bonzini
    Cc: Peter Zijlstra
    Cc: Radim Krčmář
    Cc: Rik van Riel
    Cc: Toshimitsu Kani
    Cc: kasan-dev@googlegroups.com
    Cc: kvm@vger.kernel.org
    Cc: linux-arch@vger.kernel.org
    Cc: linux-doc@vger.kernel.org
    Cc: linux-efi@vger.kernel.org
    Cc: linux-mm@kvack.org
    Link: http://lkml.kernel.org/r/3053631ea25ba8b1601c351cb7c541c496f6d9bc.1500319216.git.thomas.lendacky@amd.com
    Signed-off-by: Ingo Molnar

    Tom Lendacky
     

30 Mar, 2017

3 commits

  • 1650dfd1a   x86/events, drivers/amd/iommu: Prepare for multiple IOMMUs support ... Browse Code »

    Currently, amd_iommu_pc_get_set_reg_val() cannot support multiple
    IOMMUs. Modify it to allow callers to specify an IOMMU. This is in
    preparation for supporting multiple IOMMUs.

    Signed-off-by: Suravee Suthikulpanit
    Signed-off-by: Borislav Petkov
    Signed-off-by: Peter Zijlstra (Intel)
    Cc: Alexander Shishkin
    Cc: Arnaldo Carvalho de Melo
    Cc: Jiri Olsa
    Cc: Jörg Rödel
    Cc: Linus Torvalds
    Cc: Peter Zijlstra
    Cc: Stephane Eranian
    Cc: Thomas Gleixner
    Cc: Vince Weaver
    Cc: iommu@lists.linux-foundation.org
    Link: http://lkml.kernel.org/r/1487926102-13073-8-git-send-email-Suravee.Suthikulpanit@amd.com
    Signed-off-by: Ingo Molnar

    Suravee Suthikulpanit
     
  • f5863a00e   x86/events/amd/iommu.c: Modify functions to query max banks and counters ... Browse Code »

    Currently, amd_iommu_pc_get_max_[banks|counters]() use end-point device
    ID to locate an IOMMU and check the reported max banks/counters. The
    logic assumes that the IOMMU_BASE_DEVID belongs to the first IOMMU, and
    uses it to acquire a reference to the first IOMMU, which does not work
    on certain systems. Instead, modify the function to take an IOMMU index,
    and use it to query the corresponding AMD IOMMU instance.

    Currently, hardcode the IOMMU index to 0 since the current AMD IOMMU
    perf implementation supports only a single IOMMU. A subsequent patch
    will add support for multiple IOMMUs, and will use a proper IOMMU index.

    Signed-off-by: Suravee Suthikulpanit
    Signed-off-by: Borislav Petkov
    Signed-off-by: Peter Zijlstra (Intel)
    Cc: Alexander Shishkin
    Cc: Arnaldo Carvalho de Melo
    Cc: Jiri Olsa
    Cc: Jörg Rödel
    Cc: Linus Torvalds
    Cc: Peter Zijlstra
    Cc: Stephane Eranian
    Cc: Thomas Gleixner
    Cc: Vince Weaver
    Cc: iommu@lists.linux-foundation.org
    Link: http://lkml.kernel.org/r/1487926102-13073-7-git-send-email-Suravee.Suthikulpanit@amd.com
    Signed-off-by: Ingo Molnar

    Suravee Suthikulpanit
     
  • 6b9376e30   x86/events, drivers/iommu/amd: Introduce amd_iommu_get_num_iommus() ... Browse Code »

    Introduce amd_iommu_get_num_iommus(), which returns the value of
    amd_iommus_present. The function is used to replace direct access to the
    variable, which is now declared as static.

    This function will also be used by AMD IOMMU perf driver.

    Signed-off-by: Suravee Suthikulpanit
    Signed-off-by: Borislav Petkov
    Signed-off-by: Peter Zijlstra (Intel)
    Cc: Alexander Shishkin
    Cc: Arnaldo Carvalho de Melo
    Cc: Jiri Olsa
    Cc: Jörg Rödel
    Cc: Linus Torvalds
    Cc: Peter Zijlstra
    Cc: Stephane Eranian
    Cc: Thomas Gleixner
    Cc: Vince Weaver
    Cc: iommu@lists.linux-foundation.org
    Link: http://lkml.kernel.org/r/1487926102-13073-6-git-send-email-Suravee.Suthikulpanit@amd.com
    Signed-off-by: Ingo Molnar

    Suravee Suthikulpanit
     

05 Sep, 2016

3 commits

24 Jun, 2015

1 commit

  • 6eae81a5e   Merge tag 'iommu-updates-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu ... Browse Code »

    Pull IOMMU updates from Joerg Roedel:
    "This time with bigger changes than usual:

    - A new IOMMU driver for the ARM SMMUv3.

    This IOMMU is pretty different from SMMUv1 and v2 in that it is
    configured through in-memory structures and not through the MMIO
    register region. The ARM SMMUv3 also supports IO demand paging for
    PCI devices with PRI/PASID capabilities, but this is not
    implemented in the driver yet.

    - Lots of cleanups and device-tree support for the Exynos IOMMU
    driver. This is part of the effort to bring Exynos DRM support
    upstream.

    - Introduction of default domains into the IOMMU core code.

    The rationale behind this is to move functionalily out of the IOMMU
    drivers to common code to get to a unified behavior between
    different drivers. The patches here introduce a default domain for
    iommu-groups (isolation groups).

    A device will now always be attached to a domain, either the
    default domain or another domain handled by the device driver. The
    IOMMU drivers have to be modified to make use of that feature. So
    long the AMD IOMMU driver is converted, with others to follow.

    - Patches for the Intel VT-d drvier to fix DMAR faults that happen
    when a kdump kernel boots.

    When the kdump kernel boots it re-initializes the IOMMU hardware,
    which destroys all mappings from the crashed kernel. As this
    happens before the endpoint devices are re-initialized, any
    in-flight DMA causes a DMAR fault. These faults cause PCI master
    aborts, which some devices can't handle properly and go into an
    undefined state, so that the device driver in the kdump kernel
    fails to initialize them and the dump fails.

    This is now fixed by copying over the mapping structures (only
    context tables and interrupt remapping tables) from the old kernel
    and keep the old mappings in place until the device driver of the
    new kernel takes over. This emulates the the behavior without an
    IOMMU to the best degree possible.

    - A couple of other small fixes and cleanups"

    * tag 'iommu-updates-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (69 commits)
    iommu/amd: Handle large pages correctly in free_pagetable
    iommu/vt-d: Don't disable IR when it was previously enabled
    iommu/vt-d: Make sure copied over IR entries are not reused
    iommu/vt-d: Copy IR table from old kernel when in kdump mode
    iommu/vt-d: Set IRTA in intel_setup_irq_remapping
    iommu/vt-d: Disable IRQ remapping in intel_prepare_irq_remapping
    iommu/vt-d: Move QI initializationt to intel_setup_irq_remapping
    iommu/vt-d: Move EIM detection to intel_prepare_irq_remapping
    iommu/vt-d: Enable Translation only if it was previously disabled
    iommu/vt-d: Don't disable translation prior to OS handover
    iommu/vt-d: Don't copy translation tables if RTT bit needs to be changed
    iommu/vt-d: Don't do early domain assignment if kdump kernel
    iommu/vt-d: Allocate si_domain in init_dmars()
    iommu/vt-d: Mark copied context entries
    iommu/vt-d: Do not re-use domain-ids from the old kernel
    iommu/vt-d: Copy translation tables from old kernel
    iommu/vt-d: Detect pre enabled translation
    iommu/vt-d: Make root entry visible for hardware right after allocation
    iommu/vt-d: Init QI before root entry is allocated
    iommu/vt-d: Cleanup log messages
    ...

    Linus Torvalds
     

11 Jun, 2015

1 commit

24 Apr, 2015

1 commit

  • 7c71d306c   irq_remapping/amd: Enhance AMD IR driver to support hierarchical irqdomains ... Browse Code »

    Signed-off-by: Jiang Liu
    Acked-by: Joerg Roedel
    Cc: Konrad Rzeszutek Wilk
    Cc: David Cohen
    Cc: Sander Eikelenboom
    Cc: David Vrabel
    Cc: Tony Luck
    Cc: Greg Kroah-Hartman
    Cc: iommu@lists.linux-foundation.org
    Cc: Bjorn Helgaas
    Cc: Benjamin Herrenschmidt
    Cc: Rafael J. Wysocki
    Cc: Randy Dunlap
    Cc: Yinghai Lu
    Cc: Borislav Petkov
    Cc: Dimitri Sivanich
    Cc: Joerg Roedel
    Link: http://lkml.kernel.org/r/1428905519-23704-12-git-send-email-jiang.liu@linux.intel.com
    Signed-off-by: Thomas Gleixner

    Jiang Liu
     

13 Feb, 2015

1 commit

  • a26be149f   Merge tag 'iommu-updates-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu ... Browse Code »

    Pull IOMMU updates from Joerg Roedel:
    "This time with:

    - Generic page-table framework for ARM IOMMUs using the LPAE
    page-table format, ARM-SMMU and Renesas IPMMU make use of it
    already.

    - Break out the IO virtual address allocator from the Intel IOMMU so
    that it can be used by other DMA-API implementations too. The
    first user will be the ARM64 common DMA-API implementation for
    IOMMUs

    - Device tree support for Renesas IPMMU

    - Various fixes and cleanups all over the place"

    * tag 'iommu-updates-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (36 commits)
    iommu/amd: Convert non-returned local variable to boolean when relevant
    iommu: Update my email address
    iommu/amd: Use wait_event in put_pasid_state_wait
    iommu/amd: Fix amd_iommu_free_device()
    iommu/arm-smmu: Avoid build warning
    iommu/fsl: Various cleanups
    iommu/fsl: Use %pa to print phys_addr_t
    iommu/omap: Print phys_addr_t using %pa
    iommu: Make more drivers depend on COMPILE_TEST
    iommu/ipmmu-vmsa: Fix IOMMU lookup when multiple IOMMUs are registered
    iommu: Disable on !MMU builds
    iommu/fsl: Remove unused fsl_of_pamu_ids[]
    iommu/fsl: Fix section mismatch
    iommu/ipmmu-vmsa: Use the ARM LPAE page table allocator
    iommu: Fix trace_map() to report original iova and original size
    iommu/arm-smmu: add support for iova_to_phys through ATS1PR
    iopoll: Introduce memory-mapped IO polling macros
    iommu/arm-smmu: don't touch the secure STLBIALL register
    iommu/arm-smmu: make use of generic LPAE allocator
    iommu: io-pgtable-arm: add non-secure quirk
    ...

    Linus Torvalds
     

04 Feb, 2015

1 commit

15 Jan, 2015

1 commit

  • c392f56c9   iommu/irq_remapping: Kill function irq_remapping_supported() and related code ... Browse Code »

    Simplify irq_remapping code by killing irq_remapping_supported() and
    related interfaces.

    Joerg posted a similar patch at https://lkml.org/lkml/2014/12/15/490,
    so assume an signed-off from Joerg.

    Signed-off-by: Jiang Liu
    Signed-off-by: Joerg Roedel
    Tested-by: Joerg Roedel
    Cc: Tony Luck
    Cc: iommu@lists.linux-foundation.org
    Cc: H. Peter Anvin
    Cc: Benjamin Herrenschmidt
    Cc: Yinghai Lu
    Cc: Borislav Petkov
    Cc: David Rientjes
    Cc: HATAYAMA Daisuke
    Cc: Jan Beulich
    Cc: Richard Weinberger
    Cc: Oren Twaig
    Link: http://lkml.kernel.org/r/1420615903-28253-14-git-send-email-jiang.liu@linux.intel.com
    Signed-off-by: Thomas Gleixner

    Jiang Liu
     

19 Jun, 2013

1 commit

  • 30861ddc9   perf/x86/amd: Add IOMMU Performance Counter resource management ... Browse Code »

    Add functionality to check the availability of the AMD IOMMU Performance
    Counters and export this functionality to other core drivers, such as in this
    case, a perf AMD IOMMU PMU. This feature is not bound to any specific AMD
    family/model other than the presence of the IOMMU with P-C enabled.

    The AMD IOMMU P-C support static counting only at this time.

    Signed-off-by: Steven Kinney
    Signed-off-by: Suravee Suthikulpanit
    Signed-off-by: Peter Zijlstra
    Link: http://lkml.kernel.org/r/1370466709-3212-2-git-send-email-suravee.suthikulpanit@amd.com
    Signed-off-by: Ingo Molnar

    Steven L Kinney
     

28 Sep, 2012

1 commit

12 Dec, 2011

8 commits

21 Jun, 2011

1 commit