Eric Lee / smarc-fsl-linux-kernel

11 Feb, 2019

1 commit

  • b77cf11f0   iommu: Allow io-pgtable to be used outside of drivers/iommu/ ... Browse Code »

    Move io-pgtable.h to include/linux/ and export alloc_io_pgtable_ops
    and free_io_pgtable_ops. This enables drivers outside drivers/iommu/ to
    use the page table library. Specifically, some ARM Mali GPUs use the
    ARM page table formats.

    Cc: Will Deacon
    Cc: Robin Murphy
    Cc: Joerg Roedel
    Cc: Matthias Brugger
    Cc: Rob Clark
    Cc: linux-arm-kernel@lists.infradead.org
    Cc: iommu@lists.linux-foundation.org
    Cc: linux-mediatek@lists.infradead.org
    Cc: linux-arm-msm@vger.kernel.org
    Signed-off-by: Rob Herring
    Signed-off-by: Joerg Roedel

    Rob Herring
     

21 Mar, 2018

1 commit

  • 70ca608b2   iommu/mediatek: Fix protect memory setting ... Browse Code »

    In MediaTek's IOMMU design, When a iommu translation fault occurs
    (HW can NOT translate the destination address to a valid physical
    address), the IOMMU HW output the dirty data into a special memory
    to avoid corrupting the main memory, this is called "protect memory".
    the register(0x114) for protect memory is a little different between
    mt8173 and mt2712.

    In the mt8173, bit[30:6] in the register represents [31:7] of the
    physical address. In the 4GB mode, the register bit[31] should be 1.
    While in the mt2712, the bits don't shift. bit[31:7] in the register
    represents [31:7] in the physical address, and bit[1:0] in the
    register represents bit[33:32] of the physical address if it has.

    Fixes: e6dec9230862 ("iommu/mediatek: Add mt2712 IOMMU support")
    Reported-by: Honghui Zhang
    Signed-off-by: Yong Wu
    Signed-off-by: Joerg Roedel

    Yong Wu
     

22 Aug, 2017

2 commits

  • 7c3a2ec02   iommu/mediatek: Merge 2 M4U HWs into one iommu domain ... Browse Code »

    In theory, If there are 2 M4U HWs, there should be 2 IOMMU domains.
    But one IOMMU domain(4GB iova range) is enough for us currently,
    It's unnecessary to maintain 2 pagetables.

    Besides, This patch can simplify our consumer code largely. They don't
    need map a iova range from one domain into another, They can share the
    iova address easily.

    Signed-off-by: Yong Wu
    Signed-off-by: Joerg Roedel

    Yong Wu
     
  • e6dec9230   iommu/mediatek: Add mt2712 IOMMU support ... Browse Code »

    The M4U IP blocks in mt2712 is MTK's generation2 M4U which use the
    ARM Short-descriptor like mt8173, and most of the HW registers are
    the same.

    The difference is that there are 2 M4U HWs in mt2712 while there's
    only one in mt8173. The purpose of 2 M4U HWs is for balance the
    bandwidth.

    Normally if there are 2 M4U HWs, there should be 2 iommu domains,
    each M4U has a iommu domain.

    Signed-off-by: Yong Wu
    Signed-off-by: Joerg Roedel

    Yong Wu
     

20 Jul, 2017

1 commit

  • 98a8f63e5   iommu/mtk: Avoid redundant TLB syncs locally ... Browse Code »

    Under certain circumstances, the io-pgtable code may end up issuing two
    TLB sync operations without any intervening invalidations. This goes
    badly for the M4U hardware, since it means the second sync ends up
    polling for a non-existent operation to finish, and as a result times
    out and warns. The io_pgtable_tlb_* helpers implement a high-level
    optimisation to avoid issuing the second sync at all in such cases, but
    in order to work correctly that requires all pagetable operations to be
    serialised under a lock, thus is no longer applicable to all io-pgtable
    users.

    Since we're the only user actually relying on this flag for correctness,
    let's reimplement it locally to avoid the headache of trying to make the
    high-level version concurrency-safe for other users.

    CC: Yong Wu
    CC: Matthias Brugger
    Tested-by: Yong Wu
    Signed-off-by: Robin Murphy
    Signed-off-by: Will Deacon

    Robin Murphy
     

10 Feb, 2017

1 commit

10 Nov, 2016

2 commits

09 Aug, 2016

1 commit

21 Jun, 2016

1 commit