19 Oct, 2011
1 commit
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Conflicts:
block/blk-core.c
include/linux/blkdev.hSigned-off-by: Jens Axboe
17 Oct, 2011
1 commit
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* 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm:
ARM: 7128/1: vic: Don't write to the read-only register VIC_IRQ_STATUS
ARM: 7122/1: localtimer: add header linux/errno.h explicitly
ARM: 7117/1: perf: fix HW_CACHE_* events on Cortex-A9
ARM: 7113/1: mm: Align bank start to MAX_ORDER_NR_PAGES
15 Oct, 2011
3 commits
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This is unneeded and causes an abort on the SPMP8000 platform.
Acked-by: Linus Walleij
Signed-off-by: Zoltan Devai
Signed-off-by: Russell King -
Per the text in Documentation/SubmitChecklist as below, we should
explicitly have header linux/errno.h in localtimer.h for ENXIO
reference.1: If you use a facility then #include the file that defines/declares
that facility. Don't depend on other header files pulling in ones
that you use.Otherwise, we may run into some compiling error like the following one,
if any file includes localtimer.h without CONFIG_LOCAL_TIMERS defined.arch/arm/include/asm/localtimer.h: In function ‘local_timer_setup’:
arch/arm/include/asm/localtimer.h:53:10: error: ‘ENXIO’ undeclared (first use in this function)Signed-off-by: Shawn Guo
Signed-off-by: Russell King -
Using COHERENT_LINE_{MISS,HIT} for cache misses and references
respectively is completely wrong. Instead, use the L1D events which
are a better and more useful approximation despite ignoring instruction
traffic.Reported-by: Alasdair Grant
Reported-by: Matt Horsnell
Reported-by: Michael Williams
Cc: stable@kernel.org
Cc: Jean Pihet
Signed-off-by: Will Deacon
Signed-off-by: Russell King
14 Oct, 2011
3 commits
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* 'stable' of git://github.com/cmetcalf-tilera/linux-tile:
tile: revert change from to in asm files -
* 'x86-urgent-for-linus' of git://tesla.tglx.de/git/linux-2.6-tip:
x86: Default to vsyscall=native for now -
SFI tables reside in RAM and should not be modified once they are
written. Current code went to set pentry->irq to zero which causes
subsequent reads to fail with invalid SFI table checksum. This will
break kexec as the second kernel fails to validate SFI tables.To fix this we use temporary variable for irq number.
Signed-off-by: Mika Westerberg
Reviewed-by: Kirill A. Shutemov
Cc: stable@kernel.org
Signed-off-by: Linus Torvalds
13 Oct, 2011
1 commit
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The 32-bit TILEPro support uses some #defines in
for atomic support routines in assembly. To make this more explicit,
I've turned those includes into includes of , which
should hopefully make it clear that they shouldn't be bombed into
in any cleanups.Signed-off-by: Chris Metcalf
11 Oct, 2011
1 commit
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This UML breakage:
linux-2.6.30.1[3800] vsyscall fault (exploit attempt?) ip:ffffffffff600000 cs:33 sp:7fbfb9c498 ax:ffffffffff600000 si:0 di:606790
linux-2.6.30.1[3856] vsyscall fault (exploit attempt?) ip:ffffffffff600000 cs:33 sp:7fbfb13168 ax:ffffffffff600000 si:0 di:606790Is caused by commit 3ae36655 ("x86-64: Rework vsyscall emulation and add
vsyscall= parameter") - the vsyscall emulation code is not fully cooked
yet as UML relies on some rather fragile SIGSEGV semantics.Linus suggested in https://lkml.org/lkml/2011/8/9/376 to default
to vsyscall=native for now, this patch implements that.Signed-off-by: Adrian Bunk
Acked-by: Andrew Lutomirski
Cc: H. Peter Anvin
Link: http://lkml.kernel.org/r/20111005214047.GE14406@localhost.pp.htv.fi
Signed-off-by: Ingo Molnar
10 Oct, 2011
3 commits
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* 'fixes' of git://git.linaro.org/people/arnd/arm-soc:
ARM: mach-ux500: enable fix for ARM errata 754322
ARM: OMAP: musb: Remove a redundant omap4430_phy_init call in usb_musb_init
ARM: OMAP: Fix i2c init for twl4030
ARM: OMAP4: MMC: fix power and audio issue, decouple USBC1 from MMC1 -
This fixes a compilation error in cpu-tegra.c which was introduced in
dc8d966bccde ("ARM: convert PCI defines to variables") which removed the
now obsolete mach/hardware.h from the mach-tegra subtree.Signed-off-by: Marc Dietrich
Signed-off-by: Olof Johansson
Cc: Sergei Shtylyov
Signed-off-by: Linus Torvalds -
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (29 commits)
MIPS: Call oops_enter, oops_exit in die
staging/octeon: Software should check the checksum of no tcp/udp packets
MIPS: Octeon: Enable C0_UserLocal probing.
MIPS: No branches in delay slots for huge pages in handle_tlbl
MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTC
MIPS: Octeon: Select CONFIG_HOLES_IN_ZONE
MIPS: PM: Use struct syscore_ops instead of sysdevs for PM (v2)
MIPS: Compat: Use 32-bit wrapper for compat_sys_futex.
MIPS: Do not use EXTRA_CFLAGS
MIPS: Alchemy: DB1200: Disable cascade IRQ in handler
SERIAL: Lantiq: Set timeout in uart_port
MIPS: Lantiq: Fix setting the PCI bus speed on AR9
MIPS: Lantiq: Fix external interrupt sources
MIPS: tlbex: Fix build error in R3000 code.
MIPS: Alchemy: Include Au1100 in PM code.
MIPS: Alchemy: Fix typo in MAC0 registration
MIPS: MSP71xx: Fix build error.
MIPS: Handle __put_user() sleeping.
MIPS: Allow forced irq threading
MIPS: i8259: Mark cascade interrupt non-threaded
...
09 Oct, 2011
1 commit
07 Oct, 2011
2 commits
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This applies ARM errata fix 754322 for all ux500 platforms.
Cc: stable@kernel.org
Signed-off-by: srinidhi kasagar
Signed-off-by: Linus Walleij -
In summary, this DMI quirk uses the _CRS info by default for the ASUS
M2V-MX SE by turning on `pci=use_crs` and is similar to the quirk
added by commit 2491762cfb47 ("x86/PCI: use host bridge _CRS info on
ASRock ALiveSATA2-GLAN") whose commit message should be read for further
information.Since commit 3e3da00c01d0 ("x86/pci: AMD one chain system to use pci
read out res") Linux gives the following oops:parport0: PC-style at 0x378, irq 7 [PCSPP,TRISTATE]
HDA Intel 0000:20:01.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
HDA Intel 0000:20:01.0: setting latency timer to 64
BUG: unable to handle kernel paging request at ffffc90011c08000
IP: [] azx_probe+0x3ad/0x86b [snd_hda_intel]
PGD 13781a067 PUD 13781b067 PMD 1300ba067 PTE 800000fd00000173
Oops: 0009 [#1] SMP
last sysfs file: /sys/module/snd_pcm/initstate
CPU 0
Modules linked in: snd_hda_intel(+) snd_hda_codec snd_hwdep snd_pcm_oss snd_mixer_oss snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event tpm_tis tpm snd_seq tpm_bios psmouse parport_pc snd_timer snd_seq_device parport processor evdev snd i2c_viapro thermal_sys amd64_edac_mod k8temp i2c_core soundcore shpchp pcspkr serio_raw asus_atk0110 pci_hotplug edac_core button snd_page_alloc edac_mce_amd ext3 jbd mbcache sha256_generic cryptd aes_x86_64 aes_generic cbc dm_crypt dm_mod raid1 md_mod usbhid hid sg sd_mod crc_t10dif sr_mod cdrom ata_generic uhci_hcd sata_via pata_via libata ehci_hcd usbcore scsi_mod via_rhine mii nls_base [last unloaded: scsi_wait_scan]
Pid: 1153, comm: work_for_cpu Not tainted 2.6.37-1-amd64 #1 M2V-MX SE/System Product Name
RIP: 0010:[] [] azx_probe+0x3ad/0x86b [snd_hda_intel]
RSP: 0018:ffff88013153fe50 EFLAGS: 00010286
RAX: ffffc90011c08000 RBX: ffff88013029ec00 RCX: 0000000000000006
RDX: 0000000000000000 RSI: 0000000000000246 RDI: 0000000000000246
RBP: ffff88013341d000 R08: 0000000000000000 R09: 0000000000000040
R10: 0000000000000286 R11: 0000000000003731 R12: ffff88013029c400
R13: 0000000000000000 R14: 0000000000000000 R15: ffff88013341d090
FS: 0000000000000000(0000) GS:ffff8800bfc00000(0000) knlGS:00000000f7610ab0
CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b
CR2: ffffc90011c08000 CR3: 0000000132f57000 CR4: 00000000000006f0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
Process work_for_cpu (pid: 1153, threadinfo ffff88013153e000, task ffff8801303c86c0)
Stack:
0000000000000005 ffffffff8123ad65 00000000000136c0 ffff88013029c400
ffff8801303c8998 ffff88013341d000 ffff88013341d090 ffff8801322d9dc8
ffff88013341d208 0000000000000000 0000000000000000 ffffffff811ad232
Call Trace:
[] ? __pm_runtime_set_status+0x162/0x186
[] ? local_pci_probe+0x49/0x92
[] ? do_work_for_cpu+0x0/0x1b
[] ? do_work_for_cpu+0x0/0x1b
[] ? do_work_for_cpu+0xb/0x1b
[] ? kthread+0x7a/0x82
[] ? kernel_thread_helper+0x4/0x10
[] ? kthread+0x0/0x82
[] ? kernel_thread_helper+0x0/0x10
Code: f4 01 00 00 ef 31 f6 48 89 df e8 29 dd ff ff 85 c0 0f 88 2b 03 00 00 48 89 ef e8 b4 39 c3 e0 8b 7b 40 e8 fc 9d b1 e0 48 8b 43 38 8b 10 66 89 14 24 8b 43 14 83 e8 03 83 f8 01 77 32 31 d2 be
RIP [] azx_probe+0x3ad/0x86b [snd_hda_intel]
RSP
CR2: ffffc90011c08000
---[ end trace 8d1f3ebc136437fd ]---Trusting the ACPI _CRS information (`pci=use_crs`) fixes this problem.
$ dmesg | grep -i crs # with the quirk
PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bugThe match has to be against the DMI board entries though since the vendor entries are not populated.
DMI: System manufacturer System Product Name/M2V-MX SE, BIOS 0304 10/30/2007
This quirk should be removed when `pci=use_crs` is enabled for machines
from 2006 or earlier or some other solution is implemented.Using coreboot [1] with this board the problem does not exist but this
quirk also does not affect it either. To be safe though the check is
tightened to only take effect when the BIOS from American Megatrends is
used.15:13 < ruik> but coreboot does not need that
15:13 < ruik> because i have there only one root bus
15:13 < ruik> the audio is behind a bridge$ sudo dmidecode
BIOS Information
Vendor: American Megatrends Inc.
Version: 0304
Release Date: 10/30/2007[1] http://www.coreboot.org/
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=30552
Cc: stable@kernel.org (2.6.34)
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: H. Peter Anvin
Cc: x86@kernel.org
Signed-off-by: Paul Menzel
Signed-off-by: Bjorn Helgaas
Acked-by: Jesse Barnes
Signed-off-by: Linus Torvalds
02 Oct, 2011
2 commits
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This allows pause_on_oops and mtdoops to work.
Signed-off-by: Nathan Lynch
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2810/
Signed-off-by: Ralf Baechle -
The VM subsystem assumes that there are valid memmap entries from
the bank start aligned to MAX_ORDER_NR_PAGES.On the Ux500 we have a lot of mem=N arguments on the commandline
triggering this bug several times over and causing kernel
oops messages.Cc: stable@kernel.org
Cc: Michael Bohan
Cc: Nicolas Pitre
Signed-off-by: Johan Palsson
Signed-off-by: Rabin Vincent
Signed-off-by: Linus Walleij
Signed-off-by: Russell King
01 Oct, 2011
4 commits
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…for-linus' of git://tesla.tglx.de/git/linux-2.6-tip
* 'irq-urgent-for-linus' of git://tesla.tglx.de/git/linux-2.6-tip:
irq: Fix check for already initialized irq_domain in irq_domain_add
irq: Add declaration of irq_domain_simple_ops to irqdomain.h* 'x86-urgent-for-linus' of git://tesla.tglx.de/git/linux-2.6-tip:
x86/rtc: Don't recursively acquire rtc_lock* 'sched-urgent-for-linus' of git://tesla.tglx.de/git/linux-2.6-tip:
posix-cpu-timers: Cure SMP wobbles
sched: Fix up wchan borkage
sched/rt: Migrate equal priority tasks to available CPUs -
Current code calls omap4430_phy_init() twice in usb_musb_init().
Calling omap4430_phy_init() once is enough.
This patch removes the first omap4430_phy_init() call, which using an
uninitialized pointer as parameter.This patch elimates below build warning:
arch/arm/mach-omap2/usb-musb.c: In function 'usb_musb_init':
arch/arm/mach-omap2/usb-musb.c:141: warning: 'dev' may be used uninitialized in this functionSigned-off-by: Axel Lin
Bjarne Steinsbo
Acked-by: Felipe Balbi
Signed-off-by: Tony Lindgren -
Looks like 2600 kHz rate does not work reliably on 2430,
so just use the 100 kHz rate.Otherwise the system often fails to boot properly with:
omap_i2c omap_i2c.2: timeout waiting for bus ready
omap_i2c omap_i2c.2: timeout waiting for bus ready
twl: i2c_write failed to transfer all messages
omap_i2c omap_i2c.2: timeout waiting for bus ready
twl: i2c_write failed to transfer all messages
omap_i2c omap_i2c.2: timeout waiting for bus ready
twl: i2c_write failed to transfer all messages
twl: clock init err [-110]
omap_i2c omap_i2c.2: timeout waiting for bus ready
twl: i2c_write failed to transfer all messages
TWL4030 Unable to unlock IDCODE registers --110Signed-off-by: Tony Lindgren
-
Remove OMAP4_USBC1_ICUSB_PWRDNZ_MASK during enable/disable PWRDNZ mode for
MMC1_PBIAS and associated extended-drain MMC1 I/O cell. This is in accordance
with the control module programming guide. This fixes a bug where if trying to
use gpio_98 or gpio_99 and MMC1 at the same time the GPIO signal will be
affected by a changing SDMMC1_VDDS.Software must keep MMC1_PBIAS cell and MMC1_IO cell PWRDNZ signals low whenever
SDMMC1_VDDS ramps up/down or changes for cell protection purposes.MMC1 is based on SDMMC1_VDDS whereas USBC1 is based on SIM_VDDS therefore
they can operate independently.Signed-off-by: Bryan Buckley
Acked-by: Kishore Kadiyala
Tested-by: Balaji T K
Signed-off-by: Tony Lindgren
30 Sep, 2011
4 commits
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* 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6:
[S390] cio: fix cio_tpi ignoring adapter interrupts
[S390] gmap: always up mmap_sem properly
[S390] Do not clobber personality flags on exec -
* git://github.com/davem330/sparc:
sparc64: Force the execute bit in OpenFirmware's translation entries.
sparc: Make '-p' boot option meaningful again.
sparc, exec: remove redundant addr_limit assignment
sparc64: Future proof Niagara cpu detection. -
Apple Quad G5 has some oddity in it's device-tree which causes the new
generic matching code to fail to relate nodes for PCI-E devices below U4
with their respective struct pci_dev. This breaks graphics on those
machines among others.This fixes it using a quirk which copies the node pointer from the host
bridge for the root complex, which makes the generic code work for the
children afterward.Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Linus Torvalds -
In the OF 'translations' property, the template TTEs in the mappings
never specify the executable bit. This is the case even though some
of these mappings are for OF's code segment.Therefore, we need to force the execute bit on in every mapping.
This problem can only really trigger on Niagara/sun4v machines and the
history behind this is a little complicated.Previous to sun4v, the sun4u TTE entries lacked a hardware execute
permission bit. So OF didn't have to ever worry about setting
anything to handle executable pages. Any valid TTE loaded into the
I-TLB would be respected by the chip.But sun4v Niagara chips have a real hardware enforced executable bit
in their TTEs. So it has to be set or else the I-TLB throws an
instruction access exception with type code 6 (protection violation).We've been extremely fortunate to not get bitten by this in the past.
The best I can tell is that the OF's mappings for it's executable code
were mapped using permanent locked mappings on sun4v in the past.
Therefore, the fact that we didn't have the exec bit set in the OF
translations we would use did not matter in practice.Thanks to Greg Onufer for helping me track this down.
Signed-off-by: David S. Miller
27 Sep, 2011
5 commits
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* 'samsung-fixes-3' of git://github.com/kgene/linux-samsung:
ARM: EXYNOS4: Rename sclk_cam clocks for FIMC driver
ARM: S5PV210: Rename sclk_cam clocks for FIMC media driver
ARM: S5P: fix incorrect loop iterator usage on gpio-interrupt
ARM: S3C2443: Fix bit-reset in setrate of clk_armdiv -
The sclk_cam clocks are now controlled by the top level FIMC media
device driver bound to "s5p-fimc-md" platform device.
Rename sclk_cam clocks so they accessible by the corresponding
driver.Signed-off-by: Sylwester Nawrocki
Signed-off-by: Kyungmin Park
Signed-off-by: Kukjin Kim -
The sclk_cam clocks are now controlled by the top level FIMC media
device driver bound to "s5p-fimc-md" platform device.
Rename sclk_cam clocks so they accessible by the corresponding
driver.Signed-off-by: Sylwester Nawrocki
Signed-off-by: Kyungmin Park
Signed-off-by: Kukjin Kim -
* 'kvm-updates/3.1' of git://github.com/avikivity/kvm:
KVM: x86 emulator: fix Src2CL decode
KVM: MMU: fix incorrect return of spte -
* 'fixes' of http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm:
ARM: 7099/1: futex: preserve oldval in SMP __futex_atomic_op
ARM: dma-mapping: free allocated page if unable to map
ARM: fix vmlinux.lds.S discarding sections
ARM: nommu: fix warning with checksyscalls.sh
ARM: 7091/1: errata: D-cache line maintenance operation by MVA may not succeed
26 Sep, 2011
8 commits
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If gmap_unmap_segment figures that the segment was not mapped in the
first place, it need to up mmap_sem on exit.Cc:
Signed-off-by: Carsten Otte
Signed-off-by: Martin Schwidefsky -
Analog to git commit 59e4c3a2fe9cb1681bb2cff508ff79466f7585ba
do not clear the additional personality flags on exec. We
need to inherit the personality bits in PER_MASK across exec.Signed-off-by: Martin Schwidefsky
-
The SMP implementation of __futex_atomic_op clobbers oldval with the
status flag from the exclusive store. This causes it to always read as
zero when performing the FUTEX_OP_CMP_* operation.This patch updates the ARM __futex_atomic_op implementations to take a
tmp argument, allowing us to store the strex status flag without
overwriting the register containing oldval.Cc: stable@kernel.org
Reported-by: Minho Ban
Reviewed-by: Nicolas Pitre
Signed-off-by: Will Deacon
Signed-off-by: Russell King -
If the attempt to map a page for DMA fails (eg, because we're out of
mapping space) then we must not hold on to the page we allocated for
DMA - doing so will result in a memory leak.Cc:
Reported-by: Bryan Phillippe
Tested-by: Bryan Phillippe
Signed-off-by: Russell King -
Loop iterator value after terminating list_for_each_entry()
is not NULL. This patch fixes incorrect iterator usage in
GPIO interrupt code for SAMSUNG S5P platforms.Signed-off-by: Marek Szyprowski
Signed-off-by: Kyungmin Park
Signed-off-by: Kukjin Kim -
The changed statement should set the old armdiv bits to 0
and not everything else, before setting the new value.Signed-off-by: Heiko Stuebner
Signed-off-by: Kukjin Kim -
Src2CL decode (used for double width shifts) erronously decodes only bit 3
of %rcx, instead of bits 7:0.Fix by decoding %cl in its entirety.
Signed-off-by: Avi Kivity
Signed-off-by: Marcelo Tosatti -
__update_clear_spte_slow should return original spte while the
current code returns low half of original spte combined with high
half of new spte.Signed-off-by: Zhao Jin
Reviewed-by: Xiao Guangrong
Signed-off-by: Marcelo Tosatti
24 Sep, 2011
1 commit
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Octeon2 processor cores have a UserLocal register. Remove the hard
coded negative probe and allow the standard probing to detect this
feature.Signed-off-by: David Daney
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2578/
Signed-off-by: Ralf Baechle
