28 Jun, 2007
1 commit
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Currently iSeries will recalibrate the cputime_factors in the first
settimeofday() call.It seems the reason for doing this is to ensure a resaonable time delta after
time_init(). On current kernels (with udev), this call is made 40-60 seconds
into the boot process, by moving it to a late initcall it is called
approximately 5 seconds after time_init() is called. This is sufficient to
recalibrate the timebase.Signed-off-by: Tony Breeds
CC: Stephen Rothwell
Signed-off-by: Paul Mackerras
25 Jun, 2007
1 commit
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For POWERPC, stolen time accounts for cycles lost to the hypervisor or
PURR cycles attributed to the other SMT thread. Hence, when a PURR is
available, we should still calculate stolen time, irrespective of being
virtualised.Signed-off-by: Michael Neuling
Signed-off-by: Paul Mackerras
07 Feb, 2007
1 commit
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This covers common CPM access functions, CPM interrupt controller code,
micropatch and a few compatibility things to kee the same driver base
working with arch/ppc. This version is refined with all the comments
(mostly PIC-related) addressed.Signed-off-by: Vitaly Bordug
Signed-off-by: Paul Mackerras
22 Nov, 2006
1 commit
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This reverts commit 7a69af63e788a324d162201a0b23df41bcf158dd.
As advised by David Brownell:
http://marc.theaimsgroup.com/?l=linux-kernel&m=116387226902131&w=2
Signed-off-by: Kim Phillips
Signed-off-by: Paul Mackerras
25 Oct, 2006
1 commit
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The Cell CPU timebase has an erratum. When reading the entire 64 bits
of the timebase with one mftb instruction, there is a handful of cycles
window during which one might read a value with the low order 32 bits
already reset to 0x00000000 but the high order bits not yet incremeted
by one. This fixes it by reading the timebase again until the low order
32 bits is no longer 0. That might introduce occasional latencies if
hitting mftb just at the wrong time, but no more than 70ns on a cell
blade, and that was considered acceptable.Signed-off-by: Benjamin Herrenschmidt
Acked-by: Olof Johansson
Signed-off-by: Paul Mackerras
02 Oct, 2006
1 commit
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Add powerpc get/set_rtc_time interface to new generic rtc class. This
abstracts rtc chip specific code from the platform code for rtc-over-i2c
platforms. Specific RTC chip support is now configured under
Device Drivers -> Real Time Clock. Setting time of day from the RTC
on startup is also configurable.this time without the potentially platform breaking initcall.
Signed-off-by: Kim Phillips
Signed-off-by: Paul Mackerras
31 Aug, 2006
1 commit
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This fixes a hang on ppc32.
The problem was that I was comparing a 32-bit quantity with a 64-bit
quantity, and consequently time wasn't advancing. This makes us use a
64-bit quantity on all platforms, which ends up simplifying the code
since we can now get rid of the tb_last_stamp variable (which actually
fixes another bug that Ben H and I noticed while going carefully through
the code).This works fine on my G4 tibook. Let me know how it goes on your
machines.Acked-by: Olaf Hering
Acked-by: Mikael Pettersson
Signed-off-by: Linus Torvalds
28 Jun, 2006
1 commit
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If we ever build a combined kernel including iSeries, then this will
be needed.Signed-off-by: Stephen Rothwell
Signed-off-by: Paul Mackerras
26 Apr, 2006
1 commit
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Signed-off-by: David Woodhouse
24 Feb, 2006
1 commit
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This implements accurate task and cpu time accounting for 64-bit
powerpc kernels. Instead of accounting a whole jiffy of time to a
task on a timer interrupt because that task happened to be running at
the time, we now account time in units of timebase ticks according to
the actual time spent by the task in user mode and kernel mode. We
also count the time spent processing hardware and software interrupts
accurately. This is conditional on CONFIG_VIRT_CPU_ACCOUNTING. If
that is not set, we do tick-based approximate accounting as before.To get this accurate information, we read either the PURR (processor
utilization of resources register) on POWER5 machines, or the timebase
on other machines on* each entry to the kernel from usermode
* each exit to usermode
* transitions between process context, hard irq context and soft irq
context in kernel mode
* context switches.On POWER5 systems with shared-processor logical partitioning we also
read both the PURR and the timebase at each timer interrupt and
context switch in order to determine how much time has been taken by
the hypervisor to run other partitions ("steal" time). Unfortunately,
since we need values of the PURR on both threads at the same time to
accurately calculate the steal time, and since we can only calculate
steal time on a per-core basis, the apportioning of the steal time
between idle time (time which we ceded to the hypervisor in the idle
loop) and actual stolen time is somewhat approximate at the moment.This is all based quite heavily on what s390 does, and it uses the
generic interfaces that were added by the s390 developers,
i.e. account_system_time(), account_user_time(), etc.This patch doesn't add any new interfaces between the kernel and
userspace, and doesn't change the units in which time is reported to
userspace by things such as /proc/stat, /proc//stat, getrusage(),
times(), etc. Internally the various task and cpu times are stored in
timebase units, but they are converted to USER_HZ units (1/100th of a
second) when reported to userspace. Some precision is therefore lost
but there should not be any accumulating error, since the internal
accumulation is at full precision.Signed-off-by: Paul Mackerras
13 Jan, 2006
1 commit
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At present the lppaca - the structure shared with the iSeries
hypervisor and phyp - is contained within the PACA, our own low-level
per-cpu structure. This doesn't have to be so, the patch below
removes it, making a separate array of lppaca structures.This saves approximately 500*NR_CPUS bytes of image size and kernel
memory, because we don't need aligning gap between the Linux and
hypervisor portions of every PACA. On the other hand it means an
extra level of dereference in many accesses to the lppaca.The patch also gets rid of several places where we assign the paca
address to a local variable for no particular reason.Signed-off-by: David Gibson
Signed-off-by: Paul Mackerras
01 Nov, 2005
1 commit
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Signed-off-by: Kelly Daly
23 Oct, 2005
1 commit
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The 601 doesn't have the timebase register; instead it has an RTCL
register that counts nanoseconds and wraps at 1000000000, and an
RTCU register that counts seconds. This makes the necessary changes
for the merged time code to use the RTCL/U registers when the kernel
is running on a 601.Signed-off-by: Paul Mackerras
22 Oct, 2005
1 commit
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This moves smp_space_timers from arch/ppc64/kernel/smp.c to
arch/powerpc/kernel/time.c and makes it initialize last_jiffy[]
instead of paca[].next_jiffy_update_tb, since last_jiffy[] is
now what the time code uses. It also declares smp_space_timers
in include/asm-powerpc/time.h and gets rid of an ifdef in
div128_by_32.Signed-off-by: Paul Mackerras
20 Oct, 2005
2 commits
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I had the sense of the test for when to use the old 601-style RTC
registers inverted. pmac_calibrate_decr and via_calibrate_decr
weren't setting ppc_tb_freq, on which all the further calculations
depended. Lastly, update_gtod was losing the top 32 bits of
the new tb_to_xs value.Signed-off-by: Paul Mackerras
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We now use the merged time.c for both 32-bit and 64-bit compilation
with ARCH=powerpc, and for ARCH=ppc64, but not for ARCH=ppc32.
This removes setup_default_decr (folds its function into time_init)
and moves wakeup_decrementer into time.c. This also makes an
asm-powerpc/rtc.h.Signed-off-by: Paul Mackerras