12 Jul, 2007

2 commits

  • Based on replies to a respective query, remove the pci_dac_dma_...() APIs
    (except for pci_dac_dma_supported() on Alpha, where this function is used
    in non-DAC PCI DMA code).

    Signed-off-by: Jan Beulich
    Cc: Andi Kleen
    Cc: Jesse Barnes
    Cc: Christoph Hellwig
    Acked-by: David Miller
    Cc: Jeff Garzik
    Cc:
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    Jan Beulich
     
  • I'm not sure if this is going to fly, weak symbols work on the compilers I'm
    using, but whether they work for all of the affected architectures I can't say.
    I've cc'ed as many arch maintainers/lists as I could find.

    But assuming they do, we can use a weak empty definition of
    pcibios_add_platform_entries() to avoid having an empty definition on every
    arch.

    Signed-off-by: Michael Ellerman
    Signed-off-by: Greg Kroah-Hartman

    Michael Ellerman
     

08 Dec, 2006

1 commit

  • The current PowerPC code makes pci_unmap_addr(), pci_unmap_addr_set(),
    and friends trivial for all 32-bit kernels. This is reasonable, since
    for those kernels it is true that pci_unmap_single() does not need the
    DMA address from the original DMA mapping -- in fact, it is a NOP.

    However, I recently tried the tg3 driver on a PowerPC 440SPe machine,
    which runs a 32-bit kernel and has non-cache-coherent PCI DMA. I
    found that the tg3 driver crashed in pci_dma_sync_single_for_cpu(),
    since for non-coherent systems, that function must invalidate the
    cache for the DMA address range requested, and therefore it does use
    the address passed in. tg3 uses a DMA address it stashes away with
    pci_unmap_addr_set() and retrieves with pci_unmap_addr(). Of course,
    since pci_unmap_addr() is defined to (0) right now, this doesn't work.

    It seems to me that the tg3 driver is using pci_unmap_addr() in a
    legitimate way -- I wouldn't want to have to teach all drivers that
    they should use pci_unmap_addr() if they only need the address for
    unmapping functions, but if they want the pci_dma_sync functions, then
    they have to store the DMA address without the helper macros.
    The right fix therefore seems to be in the definition of the macros in
    -- we should use the trivial versions only for 32-bit
    kernels for coherent systems, and the real versions for both 64-bit
    kernels and non-coherent systems.

    Signed-off-by: Roland Dreier
    Signed-off-by: Paul Mackerras

    Roland Dreier
     

28 Jun, 2006

1 commit


29 Oct, 2005

1 commit

  • Change the phys_mem_access_prot() function to take a pfn instead of an
    address. This allows mmap64() to work on /dev/mem for addresses above 4G
    on 32-bit architectures. We start with a pfn in mmap_mem(), so there's no
    need to convert to an address; in fact, it's actively bad, since the
    conversion can overflow when the address is above 4G.

    Similarly fix the ppc32 page_is_ram() function to avoid a conversion to an
    address by directly comparing to max_pfn. Working with max_pfn instead of
    high_memory fixes page_is_ram() to give the right answer for highmem pages.

    Signed-off-by: Roland Dreier
    Cc: Anton Blanchard
    Cc: Benjamin Herrenschmidt
    Signed-off-by: Andrew Morton
    Signed-off-by: Paul Mackerras

    Roland Dreier
     

20 Oct, 2005

1 commit


09 Sep, 2005

1 commit

  • There were three changes necessary in order to allow
    sparc64 to use setup-res.c:

    1) Sparc64 roots the PCI I/O and MEM address space using
    parent resources contained in the PCI controller structure.
    I'm actually surprised no other platforms do this, especially
    ones like Alpha and PPC{,64}. These resources get linked into the
    iomem/ioport tree when PCI controllers are probed.

    So the hierarchy looks like this:

    iomem --|
    PCI controller 1 MEM space --|
    device 1
    device 2
    etc.
    PCI controller 2 MEM space --|
    ...
    ioport --|
    PCI controller 1 IO space --|
    ...
    PCI controller 2 IO space --|
    ...

    You get the idea. The drivers/pci/setup-res.c code allocates
    using plain iomem_space and ioport_space as the root, so that
    wouldn't work with the above setup.

    So I added a pcibios_select_root() that is used to handle this.
    It uses the PCI controller struct's io_space and mem_space on
    sparc64, and io{port,mem}_resource on every other platform to
    keep current behavior.

    2) quirk_io_region() is buggy. It takes in raw BUS view addresses
    and tries to use them as a PCI resource.

    pci_claim_resource() expects the resource to be fully formed when
    it gets called. The sparc64 implementation would do the translation
    but that's absolutely wrong, because if the same resource gets
    released then re-claimed we'll adjust things twice.

    So I fixed up quirk_io_region() to do the proper pcibios_bus_to_resource()
    conversion before passing it on to pci_claim_resource().

    3) I was mistakedly __init'ing the function methods the PCI controller
    drivers provide on sparc64 to implement some parts of these
    routines. This was, of course, easy to fix.

    So we end up with the following, and that nasty SPARC64 makefile
    ifdef in drivers/pci/Makefile is finally zapped.

    Signed-off-by: David S. Miller
    Signed-off-by: Greg Kroah-Hartman

    David S. Miller
     

05 Aug, 2005

1 commit

  • In yenta_socket, we default to using the resource setting of the CardBus
    bridge. However, this is a PCI-bus-centric view of resources and thus needs
    to be converted to generic resources first. Therefore, add a call to
    pcibios_bus_to_resource() call in between. This function is a mere wrapper on
    x86 and friends, however on some others it already exists, is added in this
    patch (alpha, arm, ppc, ppc64) or still needs to be provided (parisc -- where
    is its pcibios_resource_to_bus() ?).

    Signed-off-by: Dominik Brodowski
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman
    Signed-off-by: Linus Torvalds

    Dominik Brodowski
     

13 Jul, 2005

1 commit


12 Jul, 2005

1 commit


28 Jun, 2005

3 commits

  • With CONFIG_PCI=n:

    In file included from include/linux/pci.h:917,
    from lib/iomap.c:6:
    include/asm/pci.h:104: warning: `enum pci_dma_burst_strategy' declared inside parameter list
    include/asm/pci.h:104: warning: its scope is only this definition or declaration, which is probably not what you want.
    include/asm/pci.h: In function `pci_dma_burst_advice':
    include/asm/pci.h:106: dereferencing pointer to incomplete type
    include/asm/pci.h:106: `PCI_DMA_BURST_INFINITY' undeclared (first use in this function)
    include/asm/pci.h:106: (Each undeclared identifier is reported only once
    include/asm/pci.h:106: for each function it appears in.)
    make[1]: *** [lib/iomap.o] Error 1

    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    Andrew Morton
     
  • After seeing, at best, "guesses" as to the following kind
    of information in several drivers, I decided that we really
    need a way for platforms to specifically give advice in this
    area for what works best with their PCI controller implementation.

    Basically, this new interface gives DMA bursting advice on
    PCI. There are three forms of the advice:

    1) Burst as much as possible, it is not necessary to end bursts
    on some particular boundary for best performance.

    2) Burst on some byte count multiple. A DMA burst to some multiple of
    number of bytes may be done, but it is important to end the burst
    on an exact multiple for best performance.

    The best example of this I am aware of are the PPC64 PCI
    controllers, where if you end a burst mid-cacheline then
    chip has to refetch the data and the IOMMU translations
    which hurts performance a lot.

    3) Burst on a single byte count multiple. Bursts shall end
    exactly on the next multiple boundary for best performance.

    Sparc64 and Alpha's PCI controllers operate this way. They
    disconnect any device which tries to burst across a cacheline
    boundary.

    Actually, newer sparc64 PCI controllers do not have this behavior.
    That is why the "pdev" is passed into the interface, so I can
    add code later to check which PCI controller the system is using
    and give advice accordingly.

    Signed-off-by: David S. Miller
    Signed-off-by: Greg Kroah-Hartman

    David S. Miller
     
  • This is an updated version of Ben's fix-pci-mmap-on-ppc-and-ppc64.patch
    which is in 2.6.12-rc4-mm1.

    It fixes the patch to work on PPC iSeries, removes some debug printks
    at Ben's request, and incorporates your
    fix-pci-mmap-on-ppc-and-ppc64-fix.patch also.

    Originally from Benjamin Herrenschmidt

    This patch was discussed at length on linux-pci and so far, the last
    iteration of it didn't raise any comment. It's effect is a nop on
    architecture that don't define the new pci_resource_to_user() callback
    anyway. It allows architecture like ppc who put weird things inside of
    PCI resource structures to convert to some different value for user
    visible ones. It also fixes mmap'ing of IO space on those archs.

    Signed-off-by: Benjamin Herrenschmidt
    Signed-off-by: Michael Ellerman
    Signed-off-by: Andrew Morton
    Signed-off-by: Greg Kroah-Hartman

    Michael Ellerman
     

17 Apr, 2005

1 commit

  • Initial git repository build. I'm not bothering with the full history,
    even though we have it. We can create a separate "historical" git
    archive of that later if we want to, and in the meantime it's about
    3.2GB when imported into git - space that would just make the early
    git days unnecessarily complicated, when we don't have a lot of good
    infrastructure for it.

    Let it rip!

    Linus Torvalds