03 May, 2007
2 commits
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GCC (4.1 at least) unrolls it anyway, but I can't believe this code
was ever justifiable. (I've also submitted a patch which cleans up
i386, which is even uglier).Signed-off-by: Rusty Russell
Signed-off-by: Andi Kleen
Cc: Andi Kleen
Signed-off-by: Andrew Morton -
The set_seg_base function isn't used anywhere (2.6.21-rc3-git1)
Signed-off-by: Rusty Russell
Signed-off-by: Andi Kleen
07 Dec, 2006
1 commit
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Code that wants to use struct desc_struct cannot do so on i386 because
desc.h contains other code that will only compile on x86_64.So extract the structure definitions into a asm-x86_64/desc_defs.h.
Signed-off-by: Avi Kivity
Signed-off-by: Andi Kleeninclude/asm-x86_64/desc.h | 53 -------------------------------
include/asm-x86_64/desc_defs.h | 69 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 70 insertions(+), 52 deletions(-)
12 Jan, 2006
2 commits
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This patch is on the same lines as Zachary Amsden's i386 GDT page alignemnt
patch in -mm, but for x86_64.Patch to align and pad x86_64 GDT on page boundries.
[AK: some minor cleanups and fixed incorrect TLS initialization
in CPU init.]Signed-off-by: Nippun Goel
Signed-off-by: Ravikiran Thirumalai
Signed-off-by: Shai Fultheim
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds -
This
- switches the INT3 handler to run on an IST stack (to cope with
breakpoints set by a kernel debugger on places where the kernel's
%gs base hasn't been set up, yet); the IST stack used is shared with
the INT1 handler's
[AK: this also allows setting a kprobe on the interrupt/exception entry
points]
- allows nesting of INT1/INT3 handlers so that one can, with a kernel
debugger, debug (at least) the user-mode portions of the INT1/INT3
handling; the nesting isn't actively enabled here since a kernel-
debugger-free kernel doesn't need itSigned-Off-By: Jan Beulich
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds
15 Nov, 2005
2 commits
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Here's a patch that builds on Natalie Protasevich's IRQ compression
patch and tries to work for MPS boots as well as ACPI. It is meant for
a 4-node IBM x460 NUMA box, which was dying because it had interrupt
pins with GSI numbers > NR_IRQS and thus overflowed irq_desc.The problem is that this system has 270 GSIs (which are 1:1 mapped with
I/O APIC RTEs) and an 8-node box would have 540. This is much bigger
than NR_IRQS (224 for both i386 and x86_64). Also, there aren't enough
vectors to go around. There are about 190 usable vectors, not counting
the reserved ones and the unused vectors at 0x20 to 0x2F. So, my patch
attempts to compress the GSI range and share vectors by sharing IRQs.Cc: "Protasevich, Natalie"
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds
14 Nov, 2005
1 commit
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Fix the x86_64 TSS limit in TSS descriptor.
Signed-off-by: Suresh Siddha
Acked-by: Andi Kleen
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
18 Sep, 2005
1 commit
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include/asm/desc.h: In function `load_LDT':
include/asm/desc.h:209: warning: implicit declaration of function `get_cpu'
include/asm/desc.h:211: warning: implicit declaration of function `put_cpu'Cc: Andi Kleen
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
13 Sep, 2005
1 commit
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They should be identical in the kernel now, but this
makes it consistent with other code.Signed-off-by: Adrian Bunk
Signed-off-by: Andi Kleen
Signed-off-by: Linus Torvalds
29 Jul, 2005
1 commit
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Minor cleanup.
Move things into their include files, remove obsolete includes, fix
indentation, remove obsolete special cases etc.I also added the per cpu section to asm-generic/sections.h and fixed
init/main.c to use it.Signed-off-by: Andi Kleen
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
17 Apr, 2005
1 commit
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Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.Let it rip!